TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 3V-17V, 300mA Step Down Converter With Adjustable Enable Threshold And Hysteresis Check for Samples: TPS62125 FEATURES DESCRIPTION • • The TPS62125 is a high efficiency synchronous step down converter optimized for low and ultra low power applications providing up to 300mA output current. The wide input voltage range of 3V to 17V supports four cell alkaline and 1 to 4 cell Li-Ion batteries in series configuration as well as 9V to 15V powered applications. The device includes a precise low power enable comparator which can be used as an input supply voltage supervisor (SVS) to address system specific power up and down requirements. The enable comparator consumes only 6µA quiescent current and features an accurate threshold of 1.2V typical as well as an adjustable hysteresis. With this feature, the converter can generate a power supply rail by extracting energy from a storage capacitor fed from high impedance sources such as solar panels or current loops. With its DCS - Control TM scheme the converter provides power save mode operation to maintain highest efficiency over the entire load current range. At light loads the converter operates in PFM mode (pulse frequency modulation) and transitions seamlessly and automatically in PWM (pulse width modulation) mode at higher load currents. The DCS - ControlTM scheme is optimized for low output ripple voltage in PFM mode in order to reduce output noise to a minimum and features excellent AC load regulation. An open drain power good output indicates once the output voltage is in regulation. 1 • • • • • • • • • • • • • Wide Input Voltage Range 3V to 17V Input SVS (Supply Voltage Supervisor) with Adjustable Threshold / Hysteresis Consuming typ. 6µA Quiescent Current Wide Output Voltage Range 1.2V to 10V Typ. 13 µA Quiescent Current 350nA typ. Shutdown Current Seamless Power Save Mode Transition DCS-ControlTM Scheme Low Output Ripple Voltage Up to 1MHz Switching Frequency Highest Efficiency over Wide VIN and VOUT Range Pin to Pin Compatible with TPS62160/70 100% Duty Cycle Mode Power Good Open Drain Output Output Discharge Function Small 2x2mm2 SON 8 pin Package APPLICATIONS • • • • • Embedded processing 4 cell alkaline, 1-4 cell Li-Ion battery powered applications 9V - 15V standby power supply Energy harvesting Inverter (negative VOUT) 95 10mA 100mA 90 TPS62125 VIN SW R1 1.8M VOS CIN 10µF EN VOUT = 3.3V up to 300mA L 15µH FB R2 576k EN_hys 250mA 1.0mA 80 COUT 10µF 75 70 0.25mA 65 Rpullup GND 85 Efficiency (%) VIN = 4V to 17V PG VOUT = 3.3V L = 15mH VLF302515 COUT = 10mF 60 0.1mA 55 PWR GOOD 50 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Input Voltage VIN(V) 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA –40°C to 85°C (1) (2) PART NUMBER (1) VOUT PACKAGE MARKING TPS62125 adjustable SAQ TPS62126 (2) 1.8V TBD For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com samples available, contact TI for further information ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE Pin voltage range (2) UNIT MIN MAX VIN - 0.3 20 V SW - 0.3 VIN +0.3V V EN - 0.3 VIN +0.3V V FB – 0.3 3.6 V VOS, PG - 0.3 12 V EN_hys – 0.3 7 V mA Power Good sink current IPG 10 EN_hys sink current IEN_hys 3 HBM Human body model 2 CDM Charge device model 1 ESD rating (3) Machine model kV 100 V Maximum operating junction temperature, TJ –40 125 °C Storage temperature range, Tstg –65 150 °C (1) (2) (3) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal GND. The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF capacitor discharged directly into each pin. THERMAL INFORMATION TPS62125 THERMAL METRIC (1) DSG UNITS 8 PINS θJA Junction-to-ambient thermal resistance 65.2 θJC(top) Junction-to-case(top) thermal resistance 93.3 θJB Junction-to-board thermal resistance 30.1 ψJT Junction-to-top characterization parameter 0.5 ψJB Junction-to-board characterization parameter 47.4 θJC(bottom) Junction-to-case(bottom) thermal resistance 7.2 (1) 2 °C/W For more information about traditional and new thermal metrics, see the IC PackageThermal Metrics application report, SPRA953 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 RECOMMENDED OPERATING CONDITIONS MIN Supply voltage VIN Output current capability MAX 17 3V ≤ VIN < 6V 200 6V ≤ VIN ≤ 17V 300 Operating ambient temperature TA (1) , (Unless Otherwise Noted) Operating junction temperature range, TJ (1) NOM 3 UNIT V mA –40 85 °C –40 125 °C In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA(max)) is dependent on the maximum operating junction temperature (TJ(max)) and the maximum power dissipation of the device in the application (PD(max)). see the IC Package Thermal Metrics application report, SPRA953. ELECTRICAL CHARACTERISTICS TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted), VIN = 12V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 3.0 17 V 1.2 10 V 23 µA SUPPLY VIN Input voltage range (1) VOUT Output voltage range IQ Quiescent current IOUT = 0mA, Device not switching, EN = VIN, regulator sleeps 13 IOUT = 0mA, Device switching, VIN = 7.2V, VOUT = 1.2V, L = 22µH 14 µA VIN = 5V, EN = 1.1V, enable comparator active, device DC/DC converter off 6 11 IActive Active mode current consumption VIN = 5 V = VOUT, TA = 25°C, high-side MOSFET switch fully turned on (100% Mode) 230 275 µA ISD Shutdown current (2) Enable comparator off, EN < 0.4V, VOUT = SW = 0 V, VIN = 5V 0.35 2.4 µA VUVLO Undervoltage lockout threshold Falling VIN 2.8 2.85 V Rising VIN 2.9 2.95 V 1.16 1.20 1.24 V 1.12 1.15 1.19 V ENABLE COMPARATOR THRESHOLD AND HYSTERESIS (EN, EN_hys) VTH EN ON EN pin threshold rising edge VTH EN OFF EN pin threshold falling edge VTH EN Hys EN pin hysteresis IIN Input bias current into EN pin EN = 1.3V VEN_hyst EN_hys pin output low IEN_hyst = 1mA, EN = 1.1V IIN Input bias current into EN_hyst pin EN_hyst = 1.3V EN EN_hyst 3.0 V ≤ VIN ≤ 17V 50 0 mV 50 nA 0.4 V 0 50 nA 2.4 4 VIN = 12V, I = 100mA 1.5 2.6 VIN = 3V, I = 100mA 0.75 1.3 VIN = 12V, I = 100mA 0.6 1 750 900 POWER SWITCH high-side MOSFET on-resistance RDS(ON) low-side MOSFET on-resistance VIN = 3 V, I = 100mA Ω Switch current limit high-side MOSFET VIN = 12V Thermal shutdown Increasing junction temperature 150 °C Thermal shutdown hysteresis Decreasing junction temperature 20 °C tONmin Minimum ON time VIN = 5V, VOUT = 2.5 V 500 ns tOFFmin Minimum OFF time VIN = 5 V 60 ns ILIMF TSD 600 mA OUTPUT (1) (2) The part is functional down to the falling UVLO (Under Voltage Lockout) threshold Current into VIN pin Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 3 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted), VIN = 12V PARAMETER VREF_FB TEST CONDITIONS MIN Internal reference voltage of error amplifier TYP MAX 0.808 Referred to internal reference (VREF_FB) Feedback voltage line regulation IOUT = 100mA, 5V ≤ VIN ≤ 17V, VOUT = 3.3V Feedback voltage load regulation VOUT = 3.3V; IOUT = 1mA to 300mA, VIN = 12V Input bias current into FB pin VFB = 0.8 V tStart Regulator start-up time Time from EN high to device starts switching, VIN = 5V tRamp Output voltage ramp time Time to ramp up VOUT = 1.8V, no load 200 ILK_SW Leakage current into SW pin (4) 1.8 2.85 µA IIN_VOS Bias current into VOS pin VOS = VIN = VSW = 1.8 V, EN = GND, device in shutdown mode. 0 50 nA IIN_FB (3) 0 V Feedback voltage accuracy VFB –2.5 UNIT 2.5 -0.05 (3) -0.004 0 % %/V %/mA 50 50 nA µs POWER GOOD OUTPUT (PG) Rising VFB feedback voltage 93 95 97 Falling VFB feedback voltage 87 90 93 VTH_PG Power Good threshold voltage VOL PG pin Output low voltage Current into PG pin IPG= 0.4mA 0.3 V VOH PG pin Output high voltage Open drain output, external pull up resistor 10 V IIN_PG Bias current into PG pin V(PG) = 3V, EN = 1.3V, FB = 0.85 V 50 nA (3) (4) 4 0 % VOUT = 3.3V, L = 15µH, COUT = 10µF An internal resistor divider network with typ. 1MΩ total resistance is connected between SW pin and GND. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 DEVICE INFORMATION PIN ASSIGNMENTS DSG PACKAGE (TOP VIEW) 8 1 2 3 4 TH E ER XP M OS A ED L PA D GND VIN EN EN_hys 7 6 5 PG SW VOS FB PIN FUNCTIONS PIN NAME NO. I/O DESCRIPTION GND 1 PWR GND supply pin. VIN 2 PWR VIN power supply pin. EN 3 IN Input pin for the enable comparator. Pulling this pin to GND turns the device into shutdown mode. The DC/DC converter is enabled once the rising voltage on this pin trips the enable comparator threshold, VTH EN ON of typ. 1.2V. The DC/DC converter is turned off once a falling voltage on this pin trips the threshold, VTH EN OFF of typ. 1.15V. The comparator threshold can be increased by connecting an external resistor to pin EN_hys. See also application section. This pin must be terminated. EN_hys 4 OUT Enable Hysteresis Open-Drain Output. This pin is pulled to GND when the voltage on the EN pin is below the comparator threshold VTH EN ON of typ. 1.2V and the comparator has not yet tripped. The pin is high impedance once the enable comparator has tripped and the voltage at the pin EN is above the threshold VTH EN ON. The pin is pulled to GND once the falling voltage on the EN pin trips the threshold VTH EN OFF (1.15V typ.). This pin can be used to increase the hysteresis of the enable comparator. If not used, tie this pin to GND, or leave it open. FB 5 IN This is the feedback pin for the regulator. An external resistor divider network connected to this pin sets the output voltage. In case of fixed output voltage option, the resistor divider is integrated and the pin need to be connected directly to the output voltage. VOS 6 IN This is the output voltage sense pin for the DCS - ControlTM circuitry. This pin must be connected to the output voltage of the DC/DC converter. SW 7 OUT This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to this pin. Do not tie this pin to VIN, VOUT or GND. PG 8 OUT Open drain power good output. This pin is internally pulled to GND when the device is disabled or the output voltage is below the PG threshold. The pin is floating when the output voltage is in regulation and above the PG threshold. For Power Good indication, the pin van be connected via a pull up resistor to a voltage rail up to 10V. The pin can sink a current up to 0.4mA and maintain the specified high / low voltage levels. It can be used to discharge the output capacitor with up to 10mA. In this case the current into the pin must be limited with an appropriate pull up resistor. More details can be found in the application section. If not used, leave the pin open, or connect to GND. Exposed Thermal PAD Exposed Thermal Pad. This pad must be connected to GND. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 5 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com FUNCTIONAL BLOCK DIAGRAM ON/ SD VREF EN 1.2V VREF_FB 0.808V Softstart Softstart PG Comparator EN VREF PG VTH_PG UVLO Comparator FB VIN EN Comparator VUVLO EN_hys DC-DC ON/OFF EN_comp Peak Current Limit Comparator GND Limit High Side Timer DCS Control VOS VIN Control Logic Min. On VOS VIN PMOS Min. OFF Direct Control & Compensation Gate Driver Anti Shoot-Through SW VREF_FB FB Error amplifier NMOS Comparator GND fixed VOUT Thermal Shutdown Zero Current Comparator PARAMETER MEASUREMENT INFORMATION TPS62125 VIN VIN L VOUT SW R1 CIN 10µF EN COUT 10µF (VOUT= < 3.3V) 2x 10µF (3.3V< VOUT< = 6.7V) 10µF+ 22µF ( VOUT> 6.7V) FB R2 EN_hys VOS Rpullup GND PG PWR GOOD L: LPS3314 10mH, 15mH, LPS4018 22mH, VLF302515 15mH CIN / COUT: 10mF 0805/25V GRM21BR61E106 22mF GRM31CR61 16V X5R, 10mF GRM21B 16V X5R 6 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 TYPICAL CHARACTERISTICS Table 1. Table Of Graphs PARAMETER Efficiency Output Voltage VOUT peak to peak Output Ripple Voltage VOUTpp Switching frequency fSW Shutdown current Quiescent Current EN Comparator Thresholds RDSON Typical Operation Line transient response Hotplug Figure 1, Figure 3, Figure 5, Figure 7, Figure 9, Figure 11 vs. Input Voltage, VOUT = 1.8V, vs. Input voltage, VOUT = 3.3V, VOUT = 5V, VOUT = 6.8V, VOUT = 8V, VOUT = 10V Figure 2, Figure 4, Figure 6, Figure 8, Figure 10, Figure 12 vs. Output Current, VOUT = 3.3V Figure 13 vs. Input Voltage, VOUT = 3.3V Figure 14 vs. Output current, VOUT = 5.0V Figure 15 vs. Input Voltage, VOUT = 5V Figure 16 vs. Output current, VOUT = 6.7V Figure 17 vs. Input Voltage, VOUT = 6.7V Figure 18 vs. Output current, VOUT = 8V Figure 19 vs. Input Voltage, VOUT = 8V Figure 20 vs. Output Current, VOUT = 3.3V Figure 21 vs. Output Current, VOUT = 3.3V Figure 22 vs. Output Current, VOUT 5.0V Figure 23 vs. Output Current, VOUT = 8V Figure 24 vs. Input Voltage Figure 25 vs. Input Voltage Figure 26 vs. EN Voltage, rising VEN Figure 27 vs. EN Voltage, falling VEN Figure 28 vs. Input Voltage Figure 29 High Side Switch Figure 30 Low Side Switch Figure 31 Power Save Mode VOUT=3.3V, IOUT = 1mA Figure 32 PWM Mode VOUT= 3.3V, IOUT = 100mA Figure 33 Load Transient 5mA to 200mA, VOUT = 3.3V Figure 34 AC Load Regulation 5mA to 200mA 10kHz, VOUT = 3.3V Figure 35 Load Transient 1mA to 50mA, VOUT = 5V Figure 36 Load Transient 10mA to 200mA, VOUT = 5V Figure 37 AC Load Regulation VOUT = 5V Figure 38 VIN = 9V to 12V, IOUT = 100mA Figure 39 VIN overshoot exceeding Abs Max ratings Figure 40 VIN overshoot reduction with additional tantalum polymer capacitor Figure 41 Short circuit and overcurrent protection Input SVS Operation FIGURE vs. Output Current VOUT = 1.8V, VOUT = 3.3V, VOUT = 5V, VOUT = 6.8V, VOUT = 8V , VOUT = 10V Figure 42 VOUT = 5.0V Figure 43 No Input SVS Operation VOUT = 5.0V, VIN tracks VOUT Figure 44 Operation from a 0.5mA current source VOUT 3.3V, 20mA pulse load Figure 45 1.8V VOUT Figure 46 3.3V VOUT Figure 47 5V VOUT Figure 48 8V VOUT Figure 49 Startup EN On/Off Output Discharge Figure 50 using PG pin, triggered by EN Comparator Figure 51 VOUT ramp down with falling VIN Figure 52 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 7 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com 95 95 90 90 85 85 80 80 Efficiency (%) Efficiency (%) 10mA VIN = 3V VIN = 5V VIN = 7.5V VIN = 9V VIN = 12V VIN = 15V 75 70 65 60 50 0.01 0.1 1 10 Output Current IOUT (mA) 250mA 1.0mA 75 VOUT = 1.8V L = 15mH LPS3314 COUT = 10mF 70 0.25mA 65 60 VOUT = 1.8V L = 15mH LPS3314 COUT = 10mF 55 100mA 100 0.1mA 55 50 1000 Figure 1. Efficiency vs. Output Current VOUT = 1.8V 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Input Voltage VIN (V) Figure 2. Efficiency vs. Input Voltage, VOUT = 1.8V 100 95 10mA 95 90 85 250mA 1.0mA 80 Efficiency (%) Efficiency (%) 85 80 VIN = 4.0V VIN = 5V VIN = 7.5V VIN = 9V VIN = 12V VIN = 15V 75 70 65 55 50 0.01 0.1 1 10 Output Current (mA) 100 75 70 0.25mA 65 VOUT = 3.3V L = 15mH VLF302515 COUT = 10mF 60 1000 VOUT = 3.3V L = 15mH VLF302515 COUT = 10mF 60 0.1mA 55 50 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Input Voltage VIN(V) Figure 3. Efficiency vs. Output current, VOUT = 3.3V 8 100mA 90 Figure 4. Efficiency vs. Input voltage, VOUT = 3.3V Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 100 100 95 95 90 90 10mA 250mA 85 85 VIN = 6.0V VIN = 7.5V VIN = 9.0V VIN = 12V VIN = 15V 80 75 Efficiency (%) Efficiency (%) 100mA 70 80 70 65 60 60 55 55 50 0.01 0.1 1 10 100 Output Current IOUT (mA) 0.25mA 75 VOUT = 5V L = 10mH LPS3314 COUT = 2x10mF 65 1.0mA 50 1000 VOUT = 5V L = 10mH LPS3314 COUT = 2x10mF 6 Figure 5. Efficiency vs. Output Current, VOUT = 5V 7 8 9 10 11 12 13 14 Input Voltage VIN (V) 100 95 95 90 90 10mA 75 70 VOUT = 6.7V L = 10mH LPS3314 COUT = 2x10mF 65 0.25mA VOUT = 6.7V L = 10mH LPS3314 COUT = 2x10mF 65 55 100 1000 Figure 7. Efficiency vs. Output current, VOUT = 6.8V 250mA 70 55 1 10 Output Currernt IOUT (mA) 17 1.0mA 75 60 0.1 16 80 60 50 0.01 100mA 85 Efficiency (%) Efficiency (%) 85 VIN = 7.5V VIN = 9V VIN = 12V VIN = 15V 15 Figure 6. Efficiency vs. Input Voltage, VOUT = 5V 100 80 0.1mA 50 7 8 9 10 11 12 13 14 Input Voltage VIN (V) 0.1mA 15 16 17 Figure 8. Efficiency vs. Input Voltage, VOUT = 6.8V Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 9 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com 100 100 95 95 90 90 10mA 250mA 1.0mA 85 85 VIN = 9.0V VIN = 12V VIN = 15V 80 Efficiency (%) Efficiency (%) 100mA 75 VOUT = 8V L = 10mH LPS3314 COUT = 10mF+22mF 70 65 80 0.25mA 75 70 60 60 55 55 50 0.01 0.1 1 10 100 Output Current IOUT (mA) VOUT = 8V L = 10mH LPS3314 COUT = 10mF + 22mF 65 50 1000 Figure 9. Efficiency vs. Output Current, VOUT = 8V 9 10 11 12 13 14 Input Voltage VIN (V) 0.1mA 15 16 17 Figure 10. Efficiency vs. Input Voltage, VOUT = 8V 100 100 95 95 90 90 85 85 10mA 100mA 250mA VIN = 12V VIN = 15V 80 Efficiency (%) Efficiency (%) 1.0mA 75 VOUT = 10V L = 10mH LPS3314 COUT = 10mF + 22mF 70 70 65 60 60 55 55 0.1 1 10 100 Output Currernt IOUT (mA) 1000 Figure 11. Efficiency vs. Output Current, VOUT = 10V 0.25mA 75 65 50 0.01 10 80 50 VOUT = 10V L = 10mH LPS3314 COUT = 10mF+22mF 11 12 13 14 15 Input Voltage VIN (V) 0.1mA 16 17 Figure 12. Efficiency vs. Input Voltage, VOUT = 10V Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 3.4 3.432 VOUT 3.3V L = 15mH, COUT = 10mF VIN = 5V, TA = -40°C VIN = 7.5V, TA = -40°C VIN = 12V, TA = -40°C 3.35 Output Voltage (V) 3.366 3.333 VIN = 5V, TA= 25°C VIN = 7.5V, TA = 25°C VIN = 12V, TA = 25°C VIN = 5V, TA = 85°C VIN = 7.5V, TA = 85° VIN = 12V, TA = 85° 3.300 3.267 3.234 0.01 0.1 1 10 Output Current [mA] 3.3 IOUT = 1mA IOUT = 25mA IOUT = 100mA IOUT = 150mA 3.25 100 3.2 1000 5 6 7 8 9 10 11 12 13 Input Voltage (V) 14 15 16 17 Figure 13. Output Voltage vs. Output Current, VOUT = 3.3V Figure 14. Output Voltage vs. Input Voltage, VOUT = 3.3V 5.20 5.15 5.15 Output Voltage [V] VOUT 3.3V L = 15mH, COUT = 10mF VOUT 5.0V L = 10mH, COUT = 2x10mF 5.10 VIN = 7.5V, TA = 25°C VIN = 12V, TA = 25°C VIN = 7.5V, TA = -40°C VIN = 12V, TA = -40°C VIN = 7.5V, TA = 85° VIN = 12V, TA = 85° 5.05 5.05 5 5.00 4.95 4.95 4.9 4.90 0.01 0.1 1 10 Output Current [mA] 100 VOUT 5.0V L = 10mH, COUT = 2x10mF 5.1 Output Voltage (V) Output Voltage [V] 3.399 1000 4.85 IOUT = 1mA IOUT = 25mA IOUT = 100mA IOUT = 250mA 7 8 9 10 11 12 13 14 15 16 17 Input Voltage (V) Figure 15. Output Voltage vs. Output current, VOUT = 5.0V Figure 16. Output Voltage vs. Input Voltage, VOUT = 5V Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 11 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com 6.968 6.9 VOUT 6.7V L = 10mH, COUT = 2x10mF 6.85 6.901 VIN = 12V, TA = 25°C VIN = 9V, TA = -40°C 6.834 6.8 VIN = 9V, TA = 25°C Output Voltage [V] Output Voltage [V] VIN = 12V, TA = -40°C 6.767 VIN = 9V, TA = 85° 6.700 VIN = 12V, TA = 85° VOUT 6.7V L = 10mH, COUT = 2x10mF 0.1 6.7 6.65 IOUT = 1mA IOUT = 25mA IOUT = 100mA IOUT = 250mA 6.6 6.633 6.566 0.01 6.75 1 10 Output Current [mA] 100 6.55 6.5 1000 Figure 17. Output Voltage vs. Output Current, VOUT = 6.7V 8 11 12 13 14 Input Voltage [V] 15 16 17 8.24 VOUT 8.0V L = 10mH, COUT = 10mF + 22mF 8.24 VOUT 8.0V L = 10mH, COUT = 10mF + 22mF 8.16 8.16 VIN = 15V, TA = 25°C Output Voltage [V] VIN = 15V, TA = -40°C Output Voltage [V] 10 Figure 18. Output voltage vs. Input voltage, VOUT = 6.7V 8.32 VIN = 12V, TA = -40°C 8.08 8.08 8 7.92 8.00 VIN = 12V, TA = 25°C 7.84 0.01 0.1 IOUT = 1mA IOUT = 25mA IOUT = 100mA IOUT = 250mA VIN = 12V, TA = 85° VIN = 15V, TA = 85° 7.92 1 10 Output Current [mA] 7.84 100 1000 7.76 9 10 11 12 13 14 15 16 17 Input Voltage [V] Figure 19. Output Voltage vs. Output Current, VOUT = 8V 12 9 Figure 20. Output Voltage vs. Input Voltage, VOUT = 8V Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 1000 40 VIN = 12V 900 VOUT = 3.3V L = 15mH COUT = 10mF Switch Frequency fSW( kHz) Output Ripple Voltage (mVpp) 50 30 20 VIN = 15V 800 700 VIN = 7.5V 600 500 VIN = 5V 400 300 VIN = 5.0V VIN = 7.5V VIN = 12V VIN = 15V 10 0 0 50 100 150 200 Output Current (mA) 250 100 0 300 Figure 21. Output Ripple Voltage vs. Output Current, VOUT = 3.3V 1100 50 100 150 200 Output Current (mA) 250 300 Figure 22. Switch Frequency vs. Output Current, VOUT = 3.3V 1100 VIN = 15V VIN = 12V VIN = 7.5V 900 VIN = 15V VIN = 12V 1000 Switch Frequency FSW ( kHz) 1000 Frequency ( kHz) 0 1200 1200 800 700 600 500 900 800 VIN = 10V 700 600 500 400 400 VOUT = 5.0V L = 10mH COUT = 2x10mF 300 200 300 VOUT = 8.0V L = 10mH COUT = 10mF + 22mF 200 100 100 0 VOUT = 3.3V L = 15mH COUT = 10mF 200 0 50 100 150 200 Output Current (mA) 250 300 Figure 23. Switch Frequency vs. Output Current, VOUT 5.0V 0 0 50 100 150 200 Output Current (mA) 250 300 Figure 24. Switch Frequency vs. Output Current, VOUT = 8V Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 13 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com 25 1.5 1.4 1.3 TA = 85°C 1.2 20 Quiescent Current IQ (mA) Shutdown Current - ISD [mA] 1.1 TA = 60°C 1.0 0.9 TA = 25°C 0.8 TA = 0°C 0.7 0.6 TA = -40°C 0.5 IQ no switching: TA= 85°C IQ no switching: TA= 60°C 15 IQ no switching: TA= 25°C 10 IQ no switching: TA= -40°C 0.4 0.3 IQ device switching: TA= 25°C, VOUT = 1.8V, IOUT = 0mA no load, EN = VIN 5 0.2 0.1 0 3 4 5 6 7 0 8 9 10 11 12 13 14 15 16 17 Input Voltage - VIN [V] 3 Figure 25. Shutdown Current vs. Input Voltage 4 5 6 7 Figure 26. Quiescent Current vs. Input Voltage 1000 25 VIN = 6V TA = 85°C 20 Quiescent Current (mA) 100 Quiescent Current (mA) 8 9 10 11 12 13 14 15 16 17 Input Voltage (V) VIN = 6V TA = 25°C VIN = 6V TA = 85°C VIN = 6V TA = -40°C VIN = 12V TA = 25°C VIN = 12V TA = 85°C VIN = 12V TA = −40°C 10 VIN = 12V TA = 85°C VIN = 6V TA = 25°C 15 VIN = 12V TA = 25°C VIN = 6V TA = -40°C VIN = 12V TA = −40°C 10 1 5 0.1 0 200 400 600 800 1000 Voltage VEN (mV) 1200 1400 Figure 27. Quiescent Current vs. EN Voltage, rising VEN 14 0 0 200 400 600 800 1000 Voltage VEN (mV) 1200 1400 Figure 28. Quiescent Current vs. VEN Voltage, falling VEN Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 1.25 1.245 1.24 1.235 1.23 1.225 1.22 1.215 1.21 1.205 1.2 1.195 1.19 1.185 1.18 1.175 1.17 1.165 1.16 1.155 1.15 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 3 2.8 2.6 2.4 VTH EN ON TA = 25°C VTH EN ON TA = -40°C 2.2 VTH EN ON TA = 85°C TA = 85°C 2 RDSON (W) EN Comparator Threshold - VTH EN (V) www.ti.com TA = 60°C 1.8 1.6 1.4 1.2 1 VTH EN OFF TA = 25°C VTH EN OFF TA = -40°C VTH EN OFF TA = 85°C EN Comparator Threshold - VTH EN (V) TA = 25°C 0.6 0.4 0.2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Input Voltage VIN (V) 0 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Input Voltage VIN [V] Figure 29. EN Comparator Thresholds vs. Input Voltage 1.25 1.245 1.24 1.235 1.23 1.225 1.22 1.215 1.21 1.205 1.2 1.195 1.19 1.185 1.18 1.175 1.17 1.165 1.16 1.155 1.15 TA = 0°C TA = -40°C 0.8 Figure 30. RDSON High Side Switch VOUT = 3.3 V 3.3V offset, 50mV/Div ILoad = 1mA VIN = 12V L = 15 mH COUT = 10 mF VTH EN ON TA = 25°C VTH EN ON TA = -40°C VTH EN ON TA = 85°C SW pin 10V/Div VTH EN OFF TA = 25°C VTH EN OFF TA = -40°C 3 4 5 6 7 Inductor current 200mA/Div VTH EN OFF TA = 85°C 8 9 10 11 12 13 14 15 16 17 Input Voltage VIN (V) Figure 31. RDSON Low Side Switch (Rectifier) Figure 32. Power Save Mode VOUT=3.3V, IOUT = 1mA Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 15 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 VOUT = 3.3 V 3.3V offset, 50mV/Div ILoad = 100mA www.ti.com VIN = 12V L = 15 mH COUT = 10 mF VIN = 12V L = 15 mH COUT = 10 mF VOUT = 3.3 V 3.3V offset, 50mV/Div SW pin 10V/Div SW pin 10V/Div IOUT 5mA to 200mA 200mA/Div Inductor current 200mA/Div Inductor current 200mA/Div Figure 33. PWM Mode VOUT= 3.3V, IOUT = 100mA VOUT = 3.3 V 3.3V offset, 50mV/Div VIN = 12V L = 15 mH COUT = 10 mF Figure 34. Load Transient 5mA to 200mA, VOUT = 3.3V VIN = 12V L = 10 mH COUT = 2x 10 mF VOUT = 5.0 V 5V offset, 50mV/Div SW pin 10V/Div Inductor current 200mA/Div IOUT AC 10kHz 5mA to 200mA 200mA/Div Inductor current 200mA/Div ILoad = 1mA to 50mA 50mA / Div Figure 35. AC Load Regulation, VOUT = 3.3V VOUT = 5.0 V 5V offset, 50mV/Div VIN = 12V L = 10 mH COUT = 2x 10 mF VIN = 12V L = 10 mH COUT = 2x 10 mF VOUT = 5.0 V 5V offset, 50mV/Div Inductor current 200mA/Div Inductor current 200mA/Div ILoad = 10mA to 200mA 200mA / Div ILoad = AC 5kHz 1mA to 250mA 200mA / Div Figure 37. Load Transient 10mA to 200mA, VOUT = 5V 16 Figure 36. Load Transient 1mA to 50mA, VOUT = 5V Figure 38. AC Load Regulation VOUT = 5V Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 VIN overshoot 25V VIN = 9V to 12V IOUT = 100mA L = 15 mH COUT = 10 mF VIN = 12V, Hotplug CIN = 10mF ceramic capacitor VOUT = 3.3 V, 50mV/Div Current into input capacitor 20A/div IIN Figure 39. Line transient response VIN = 9V to 12V VIN overshoot reduction to 15V Figure 40. VIN Hotplug overshoot VOUT = 5.0 V 2V/Div VIN = 12V, Hotplug CIN = 10mF additional 22mF tantalum-polymer input capacitor type Poscap 20TQC22MYFB VIN = 12V CIN = 10uF ceramic + 22uF Poscap VOUT Startup L = 10 mH COUT = 2x 10 mF IIN 200mA/Div IIN Current into CIN IL 1A/Div Current into input capacitors 20A/div IOUT 1A/Div Figure 41. VIN Hotplug overshoot reduction with Poscap Short IOUT = 10mA Short Figure 42. Short circuit and overcurrent protection Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 17 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 VIN : ramped up/down 0V to 12V, 175mV/ms 2.5V/Div REN1 = 820kW REN2 = 110kW REN2 = 82kW www.ti.com VOUT = 5.0 V L = 10 mH COUT = 2x10 mF Load = 100W VIN_Start = 10V VIN : ramped up/down 0V to 12V, 175mV/ms 2.5V/Div EN = VIN VIN_Stop = 6V UVLO VOUT 2.5V/Div VOUT 2.5V/Div PG 5V/Div PG 5V/Div IIN 200mA/Div IIN 200mA/Div Figure 43. Input supply voltage supervisor (SVS), VOUT = 5.0V VIN: 0.5mA current source 2.5V/Div REN1 = 680kW REN2 = 110kW REN2 = 120kW VIN_startup = 6.82V VIN_stop = 4.55V VOUT = 5.0 V L = 10 mH COUT = 2x10 mF Load = 100W VIN tracks VOUT UVLO Figure 44. Operation with EN = VIN, VIN tracks VOUT CIN = 10mF ceramic + 22mF Poscap VIN = 12V VOUT = 1.8 V L = 15 mH COUT = 10 mF Load = 180W VOUT = 3.3 V L = 15 mH, COUT = 10 mF 7ms/20mA Pulse Load VOUT 2.0V/Div Startup in 20mA Load IOUT 20mA/Div 0.5mA Source Current IIN: 0.5mA/Div Figure 45. 0.5mA current source, 20mA pulse load 18 Submit Documentation Feedback Figure 46. Startup 1.8V VOUT Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 VIN = 12V VOUT = 3.3 V L = 15 mH COUT = 10 mF Load = 330W VIN = 12V VOUT = 5.0 V L = 10 mH COUT = 2x10 mF Load = 500W Figure 47. Startup 3.3V VOUT Figure 48. Startup 5.0V VOUT VIN = 12V VOUT = 3.3 V COUT = 10uF L = 15mH RLoad = 100 W RPullup PG = 100kW to VOUT VIN = 12V VOUT = 8.0 V L = 10 mH COUT = 2x10 mF Load = 800W 1V/Div 2V/Div 1V/Div Figure 49. Startup 8V VOUT VIN 1V/Div VIN_stop = 4.55V REN1 = 680kW REN2 = 110kW REN_hys = 120kW Figure 50. VOUT Ramp up/down with EN on/off VIN = 12V to 0V VOUT = 3.3 V COUT = 10uF L = 15mH IOUT = 0mA RPullup PG = 0W to VOUT VOUT 1V/Div VIN 2V/Div VIN_stop = 4.55V REN1 = 680kW REN2 = 110kW REN_hys = 120kW VIN = 12V to 0V VOUT = 3.3 V COUT = 10uF L = 15mH IOUT = 0mA RPullup PG = 100kW to VOUT VOUT 1V/Div PG 1V/Div Figure 51. Output discharge using PG pin, triggered by EN Comparator Figure 52. VOUT ramp down with falling VIN, schematic Figure Figure 60 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 19 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com DETAILED DESCRIPTION DCS - ControlTM The TPS62125 high efficiency synchronous switch mode buck converter includes TI's DCS - Control™ (Direct Control with Seamless Transition into Power Save Mode), an advanced regulation topology, which combines the advantages of hysteretic and voltage mode control. Characteristics of DCS - ControlTM are excellent AC load regulation and transient response, low output ripple voltage and a seamless transition between PFM and PWM mode operation. DCS - ControlTM includes an AC loop which senses the output voltage (VOS pin) and directly feeds the information to a fast comparator stage. This comparator sets the switching frequency, which is constant for steady state operating conditions, and provides immediate response to dynamic load changes. In order to achieve accurate DC load regulation, a voltage feedback loop is used. The internally compensated regulation network achieves fast and stable operation with small external components and low ESR capacitors. The DCS ControlTM topology supports PWM (Pulse Width Modulation) mode for medium and high load conditions and a Power Save Mode at light loads. During PWM mode, it operates in continuous conduction. The switch frequency is up to 1MHz with a controlled frequency variation depending on the input voltage. If the load current decreases, the converter seamless enters Power Save Mode to maintain high efficiency down to very light loads. In Power Save Mode the switching frequency varies linearly with the load current. Since DCS - ControlTM supports both operation modes within one single building block, the transition from PWM to Power Save Mode is seamless without effects on the output voltage. The TPS62125 offers both excellent DC voltage and superior load transient regulation, combined with very low output voltage ripple, minimizing interference with RF circuits. At high load currents the converter operates in quasi fixed frequency PWM mode operation and at light loads in PFM (Pulse Frequency Modulation) mode to maintain highest efficiency over the full load current range. In PFM Mode, the device generates a single switching pulse to ramp up the inductor current and recharge the output capacitor, followed by a sleep period where most of the internal circuits are shutdown to achieve a quiescent current of typically 13µA. During this time, the load current is supported by the output capacitor. The duration of the sleep period depends on the load current and the inductor peak current. Pulse Width Modulation (PWM) Operation The TPS62125 operates with pulse width modulation in continuous conduction mode (CCM) with a nominal switching frequency of about 1MHz. The frequency variation in PWM mode is controlled and depends on VIN, VOUT and the inductance. The device operates in PWM mode as long the output current is higher than half the inductor's ripple current. To maintain high efficiency at light loads, the device enters Power Save Mode at the boundary to discontinuous conduction mode (DCM). This happens if the output current becomes smaller than half the inductor's ripple current. Power Save Mode With decreasing load current, the TPS62125 transitions seamlessly from PWM Mode to Power Save Mode once the inductor current becomes discontinuous. This ensures a high efficiency at light loads. In Power Save Mode the converter operates in Pulse Frequency Modulation (PFM Mode) and the switching frequency decreases linearly with the load current. DCS - ControlTM features a small and predictable output voltage ripple in Power Save Mode. The transition between PWM Mode and Power Save Mode occurs seamlessly in both directions. The minimum On Time TONmin for a single pulse can be estimated by: TON = VOUT ´ 1ms VIN (1) Therefore the peak inductor current in PFM mode is approximately: (VIN - VOUT ) ´ T ILPFMpeak = ON L (2) The transition from PFM mode to PWM mode operation and back occurs at a load current of approximately ½ ILPFMpeak. With: 20 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 TON: high-side MOSFET switch on time [µs] VIN: Input voltage [V] VOUT: Output voltage [V] L : Inductance [µH] ILPFMpeak : PFM inductor peak current [mA] The maximum switching frequency can be estimated by: f SW max » 1 = 1MHz 1ms (3) 100% DUTY CYCLE LOW DROPOUT OPERATION The device increases the On Time of the high-side MOSFET switch as the input voltage comes close to the output voltage in order to keep the output voltage in regulation. This reduces the switching frequency. With further decreasing input voltage VIN, the high-side MOSFET switch is turned on completely. In this case, the converter provides a low input-to-output voltage difference. This is particularly useful in applications with a widely variable supply voltage to achieve longest operation time by taking full advantage of the whole supply voltage span. The minimum input voltage to maintain output voltage regulation depends on the load current and output voltage, and can be calculated as: VIm in = VOUT min + I OUT ´ ( RDSON max + RL ) (4) With: IOUT = output current RDS(ON)max = maximum high side switch RDS(ON). RL = DC resistance of the inductor VOUTmin = minimum output voltage the load can accept UNDER-VOLTAGE LOCKOUT In addition to the EN Comparator, the device includes an under-voltage lockout circuit which prevents the device from misoperation at low input voltages. Both circuits are fed to an AND gate and prevents the converter from turning on the high-side MOSFET switch or low-side MOSFET under undefined conditions. The UVLO threshold is set to 2.9V typical for rising VIN and 2.8V typical for falling VIN. The hysteresis between rising and falling UVLO threshold ensures proper start up. Fully functional operation is permitted for an input voltage down to the falling UVLO threshold level. The converter starts operation again once the input voltage trips the rising UVLO threshold level and the voltage at the EN pin trips VTH_EN_ON. SOFT START The TPS62125 has an internal soft-start circuit which controls the ramp up of the output voltage and limits the inrush current during start-up. This limits input voltage drop. The soft-start system generates a monotonic ramp up of the output voltage and reaches an output voltage of 1.8V typ. within 240µs after the EN pin was pulled high. For higher output voltages, the ramp up time of the output voltage can be estimated with a ramp up slew rate of about 12mV/us. TPS62125 is able to start into a pre biased output capacitor. The converter starts with the applied bias voltage and ramps the output voltage to its nominal value. In case the output voltage is higher than the nominal value, the device starts switching once the output has been discharged by an external load or leakage current to its nominal output voltage value. During start up the device can provide an output current of half of the high-side MOSFET switch current limit ILIMF. Large output capacitors and high load currents may exceed the current capability of the device during start up. In this case the start up ramp of the output voltage will be slower. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 21 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com ENABLE COMPARATOR (EN / EN_hys) The EN pin is connected to an On/Shutdown detector (ON/SD) and an input of the Enable Comparator. With a voltage level of 0.4V or less at the EN pin, the ON/SD detector turns the device into Shutdown mode and the quiescent current is reduced to typically 350nA. In this mode the EN comparator as well the entire internal-control circuitry are switched off. A voltage level of typ. 900mV (rising) at the EN pin triggers the ON/Shutdown detector and activates the internal reference VREF (Typ.1.2V), the EN comparator and the UVLO comparator. In applications with slow rising voltage levels at the EN pin, the quiescent current profile before this trip point needs to be considered, see Figure 27. Once the ON/SD detector has tripped, the quiescent current consumption of the device is typ. 6µA. The TPS62125 starts regulation once the voltage at the EN pin trips the threshold VEN_TH ON (typ. 1.2V) and the input voltage is above the UVLO threshold. It enters softstart and ramps up the output voltage. For proper operation, the EN pin must be terminated and must not be left floating. The quiescent current consumption of the TPS62125 is typ. 13µA under no load condition (not switching). See Figure 25. The DC/DC regulator stops operation once the voltage on the EN pin falls below the threshold VEN_TH OFF (typ. 1.15V) or the input voltage falls below UVLO threshold. The enable comparator features a built in hysteresis of typ. 50mV. This hysteresis can be increased with an external resistor connected to pin EN_hys. See more details in application information section. POWER GOOD OUTPUT / OUTPUT DISCHARGE (PG) The Power Good Output (PG pin) is an open drain output. The circuit is active once the device is enabled. It is driven by an internal comparator connected to the FB pin voltage and an internal reference. The PG output provides a high level (open drain high impedance) once the feedback voltage exceeds typical 95% of its nominal value. The PG output is driven to low level once the FB pin voltage falls below typ. 90% of its nominal value VREF_FB. The PG output goes high (high impedance) with a delay of typically 2µs. A pull up resistor is needed to generate a high level. The PG pin can be connected via a pull up resistors to a voltage up to 10V. This pin can also be used to discharge the output capacitor. See section Application Information for more details. The PG output is pulled low if the voltage on the EN pin falls below the threshold VEN_TH is below the undervoltage lockout threshold UVLO. OFF or the input voltage SHORT-CIRCUIT PROTECTION The TPS62125 integrates a high-side MOSFET switch current limit, ILIMF, to protect the device against a short circuit. The current in the high-side MOSFET switch is monitored by a current limit comparator and once the current reaches the limit of ILIMF , the high-side MOSFET switch is turned off and the low-side MOSFET switch is turned on to ramp down the inductor current. The high-side MOSFET switch is turned on again once the zero current comparator trips and the inductor current has become zero. In this case, the output current is limited to half of the high-side MOSFET switch current limit, ½ ILIMF, typ. 300mA. THERMAL SHUTDOWN As soon as the junction temperature, TJ, exceeds 150°C (typical) the device goes into thermal shutdown. In this mode, the high-side and low-side MOSFETs are turned-off. The device continues its operation when the junction temperature falls below the thermal shutdown hysteresis. 22 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 APPLICATION INFORMATION OUTPUT VOLTAGE SETTING The output voltage can be calculated by: æ R ö VOUT = VREF _ FB ´ çç1 + 1 ÷÷ è R2 ø æ R VOUT = 0.8V ´ çç1 + 1 è R2 ö æV R1 = R2 ´ ç OUT - 1÷ ø è 0.8V ö ÷÷ ø (5) The internal reference voltage for the error amplifier,VREF_FB, is nominal 0.808V. However for the feedback resistor divider selection, it is recommended to use the value 0.800V as the reference. Using this value, the output voltage sets 1% higher and provides more headroom for load transients as well for line and load regulation. The current through the feedback resistors R1 and R2 should be higher than 1µA. In applications operating over full temperature range or in noisy environments, this current may be increased for robust operation. However, higher currents through the feedback resistors impact the light load efficiency of the converter. Table 2 shows a selection of suggested values for the feedback divider network for most common output voltages. Table 2. Suggested Values for Feedback Divider Network Output Voltage 1.2V 1.8V 3.3V 5V 6.7V 8V R1 [kΩ] 180 300 1800 1100 1475 1800 R2 [kΩ] 360 240 576 210 200 200 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 23 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com ENABLE THRESHOLD AND HYSTERESIS SETTING ON/SD VIN VIN VREF 1.2V REN1 EN EN Comparator VTH_EN REN2 EN_hys REN HYS GND Figure 53. Using the Enable Comparator Threshold and Hysteresis for an input SVS (supply voltage supervisor) The enable comparator can be used as an adjustable input supply voltage supervisor (SVS) to start and stop the DC/DC converter depending on the input voltage level. The input voltage level, VIN_startup, at which the device starts up is set by the resistors REN1 and REN2 and can be calculated by : æ R V IN _ startup = V EN _ TH _ ON ´ çç1 + EN 1 REN 2 è ö æ R ÷÷ = 1.2V ´ çç1 + EN 1 REN 2 ø è ö ÷÷ ø (6) The resistor values REN1 and REN2 can be calculated by: æ V ö æV ö R E N 1 = R E N 2 ´ ç IN _ startup - 1 ÷ = R E N 2 ´ çç IN _ startup - 1 ÷÷ çV ÷ è 1 . 2V ø è E N _ TH _ O N ø R EN 2 = R EN 1 ö æ V IN _ startup ç - 1÷ ÷ çV ø è EN _ TH _ O N = (7) R EN 1 ö æ V IN _ startup çç - 1 ÷÷ ø è 1 . 2V (8) The input voltage level VIN_stop at which the device will stop operation is set by REN1, REN2 and REN be calculated by: æ R EN 1 V IN _ stop = V EN _ TH _ OFF ´ ç 1 + ç R EN 2 + R EN _ hys è ö æ R EN 1 ÷ = 1 . 15V ´ ç 1 + ÷ ç R EN 2 + R EN _ hys ø è ö ÷ ÷ ø HYS and can (9) The resistor value REN_hyscan be calculated according to: R EN _ hys = R EN 1 æ V IN _ stop ö ç - 1÷ çV ÷ è EN _ TH _ OFF ø - R EN 2 = R EN 1 ö æ V IN _ stop çç - 1 ÷÷ ø è 1 .15V - R EN 2 (10) The current through the resistors REN1, REN2 and REN HYS should be higher than 1µA. In applications operating over the full temperature range and in noisy environments, the resistor values can be reduced to smaller values. 24 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 VIN DC/DC start VIN_startup Hysteresis VIN_stop DC/DC stop VOUT Proper VOUT ramp up Figure 54. Using the EN comparator as input SVS for proper VOUT ramp up POWER GOOD (PG) PULL UP / OUTPUT DISCHARGE RESISTOR The Power Good open collector output needs an external pull up resistor to indicate a high level. The pull up resistor can be connected to a voltage level up to 10V. The output can sink current up to 0.4mA with specifed output low level of less than 0.3V. The lowest value for the pull up resistor can be calculated by: R Pullup min = VOUT - 0.3V 0.0004 A (11) VOUT TPS62125 COUT RPullup RIPG PG Comparator PG VPG Power Good max 10V VTH_PG FB Figure 55. PG open collector output The PG pin can be used to discharge the output capacitor. The PG output has an internal resistance RIPGof typical 600Ω and minimum 400Ω. The maximum sink current into the PG pin is 10mA. In order to limit the discharge current to the maximum allowable sink current into the PG pin, the external pull up resistor RPull up can be calculated to: RPullup min = VOUT I PG _ max - RIPG _ min = VOUT - 400W 0.01A (12) In case a negative value is calculated, the external pull up resistor can be removed and the PG pin can be directly connected to the output. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 25 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR) The external components have to fulfill the needs of the application, but also the stability criteria of the devices control loop. The TPS62125 is optimized to work within a range of L and C combinations. The LC output filter inductance and capacitance have to be considered together, creating a double pole, responsible for the corner frequency of the converter. Table 3 can be used to simplify the output filter component selection. Table 3. Recommended LC Output Filter Combinations Output Capacitor Value [µF] (2) Inductor Value [µH] (1) 10µF 15 √ 22 √ (3) 15 √ (3) 22 √ (3) 2 x 10µF 22µF 47µF √ √ √ √ √ √ √ √ √ √ √ √ VOUT 1.2V - 1.8V VOUT 1.8V - 3.3V VOUT 3.3V - 5V 10 √ √ √ 15 √ (3) √ (3) √ 22 VOUT 5V - 10V (1) (2) (3) 10 √ (3) √ (3) √ 15 √ √ √ 22 √ √ √ Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by 20% and -30%. Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by 20% and -50%. This LC combination is the standard value and recommended for most applications. More detailed information on further LC combinations can be found in application note SLVA515. INDUCTOR SELECTION The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage ripple and the efficiency. The selected inductor has to be rated for its DC resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VIN or VOUT and can be estimated according to Equation 13. Equation 14 calculates the maximum inductor current under static load conditions. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 14. This is recommended because during heavy load transient the inductor current will rise above the calculated value. A more conservative way is to select the inductor saturation current according to the high-side MOSFET switch current limit ILIMF. (VIN - VOUT ) DIL = ´ TON L (13) ΔIL ILmax = Ioutmax + 2 (14) With: TON = see equation (3) L = Inductance ΔIL = Peak to Peak inductor ripple current ILmax = Maximum Inductor current 26 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 In DC/DC converter applications, the efficiency is essentially affected by the inductor AC resistance (i.e. quality factor) and by the inductor DCR value. To achieve high efficiency operation, care should be taken in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current. The total losses of the coil consist of both the losses in the DC resistance (RDC) and the following frequencydependent components: • The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies) • Additional losses in the conductor from the skin effect (current displacement at high frequencies) • Magnetic field losses of the neighboring windings (proximity effect) • Radiation losses The following inductor series from different suppliers have been used with the TPS62125. Table 4. List of Inductors INDUCTANCE [µH] DCR [Ω] DIMENSIONS [mm3] INDUCTOR TYPE SUPPLIER 10 / 15 0.33 max / 0.44 max 3.3 x 3.3 x 1.4 LPS3314 Coilcraft 22 0.36 max 3.9 x 3.9 x 1.8 LPS4018 Coilcraft 15 0.33 max 3.0 x 2.5 x 1.5 VLF302515 TDK 10/15 0.44 max / 0.7 max 3.0 x 3.0 x 1.5 LPS3015 Coilcraft 10 0.38 typ. 3.2 × 2.5 × 1.7 LQH32PN Murata OUTPUT CAPACITOR SELECTION Ceramic capacitors with low ESR values provide the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies. At light load currents the converter operates in Power Save Mode and the output voltage ripple is dependent on the output capacitor value and the PFM peak inductor current. Higher output capacitor values minimize the voltage ripple in PFM Mode and tighten DC output accuracy in PFM Mode. In order to achieve specified regulation performance and low output voltage ripple, the DC-bias characteristic of ceramic capacitors must be considered. The effective capacitance of ceramic capacitors drops with increasing DC - bias Voltage. Due to this effect, it is recommended for output voltages above 3.3V to use at least 1 x 22µF or 2 x 10µF ceramic capacitors on the output. INPUT CAPACITOR SELECTION Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is required for best input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. For most applications, a 10µF ceramic capacitor is recommended. The voltage rating and DC bias characteristic of ceramic capacitors need to be considered. The input capacitor can be increased without any limit for better input voltage filtering. For applications powered from high impedance sources, a tantalum polymer capacitor should be used to buffer the input voltage for the TPS62125. Tantalum polymer capacitors provide a constant capacitance vs. DC bias characteristic compared to ceramic capacitors. In this case, a 10µF ceramic capacitor should be used in parallel to the tantalum polymer capacitor to provide low ESR. Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on the input can induce large ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even damage the part by exceeding the maximum ratings. In case the power is supplied via a connector e.g. from a wall adapter, a hot-plug event can cause voltage overshoots on the VIN pin exceeding the absolute maximum ratings and can damage the device, too. In this case a tantalum polymer capacitor or overvoltage protection circuit reduces the voltage overshoot, see Figure 41. Table 5 shows a list of input/output capacitors. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 27 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com Table 5. List of Capacitor CAPACITANCE [µF] SIZE CAPACITOR TYPE USAGE SUPPLIER 10 0805 GRM21B 25V X5R CIN /COUT Murata 10 0805 GRM21B 16V X5R COUT Murata 22 1206 GRM31CR61 16V X5R COUT Murata 22 B2 (3.5x2.8x1.9) 20TQC22MYFB CIN / input protection Sanyo LAYOUT CONSIDERATIONS As for all switching power supplies, the layout is an important step in the design. Proper function of the device demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If the layout is not carefully done, the regulator could show frequency variations, poor line and/or load regulation, stability issues as well as EMI problems. It is critical to provide a low inductance, low impedance ground path. Therefore, use wide and short traces for the paths conducting AC current of the DC/DC converter. The area of the AC current loop (input capacitor - TPS62125 - inductor - output capacitor) should be routed as small as possible to avoid magnetic field radiation. Therefore the input capacitor should be placed as close as possible to the IC pins as well as the inductor and output capacitor. Use a common Power GND node and a different node for the signal GND to minimize the effects of ground noise. Keep the common path to the GND pin, which returns both the small signal components and the high current of the output capacitors as short as possible to avoid ground noise. A well proven practice is to merge small signal GND and power GND path at the exposed thermal pad. The FB divider network and the FB line should be routed away from the inductor and the SW node to avoid noise coupling. The VOS line should be connected as short as possible to the output, ideally to the VOUT terminal of the inductor. Keep the area of the loop VOS node - inductor - SW node small. The Exposed Thermal Pad must be soldered to the circuit board for mechanical reliability and to achieve appropriate power dissipation. COUT L PG GND Approximate circuit area 2 2 = 51mm (0.079in ) VOUT CIN VIN REN1 REN2 U1 GND R1 R2 REN_hys Figure 56. EVM board Layout 28 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 TPS62125 www.ti.com SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 TYPACAL APPLICATIONS TPS62125 VIN = 4V to 17V VIN SW R1 1.8M VOS EN CIN 10µF VOUT = 3.3V up to 300mA L 15µH FB COUT 10µF R2 576k EN_hys Rpullup GND PG PWR GOOD Figure 57. TPS62125 3.3V Output Voltage Configuration TPS62125 VIN = 6V to 17V VIN SW R1 1.1M VOS EN CIN 10µF VOUT = 5V up to 300mA L 10µH FB R2 210k EN_hys COUT 2 x 10µF or 1 x 22µF Rpullup GND PG PWR GOOD Figure 58. TPS62125 5.0V Output Voltage Configuration VIN_Start = 10V VIN_Stop = 6V TPS62125 VIN REN1 820k CIN 10µF REN2 110k SW R1 1.1M VOS R2 EN VOUT = 5V up to 300mA L 10µH FB R2 210k COUT 2 x 10µF or 1 x 22µF EN_hys REN_hys 82k Rpullup GND PG PWR GOOD Figure 59. TPS62125 5V VOUT, Start up voltage VIN_Start = 10V, Stop voltage VIN_Stop = 6V, see Figure 43 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 29 TPS62125 SLVSAQ5A – MARCH 2012 – REVISED APRIL 2012 www.ti.com VIN_Start = 6.82V VIN_Stop = 4.55V TPS62125 SW VIN Current Source 0.5mA 10V max REN1 610k CIN 22µF Poscap CIN 10µF R1 1.8M VOS FB EN R2 REN2 110k VOUT = 3.3V up to 300mA L 15µH COUT 10µF R2 576k EN_hys REN_hys 120k Rpullup 100k GND PG PWR Good Figure 60. TPS62125 operation from a storage capacitor charged from a 0.5mA current source, VOUT = 3.3V, see Figure 45 CIN 10µF TPS62125 VIN = 5V VOS EN GND R1 1.1M FB Cbypass 10µF R2 210k EN_hys GND L 10µH SW VIN PG COUT 2 x 10µF or 1 x 22µF VOUT = - 5V up to 150mA Figure 61. 5V to -5V inverter configuration, see SLVA514 30 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s) :TPS62125 PACKAGE OPTION ADDENDUM www.ti.com 9-May-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TPS62125DSGR ACTIVE WSON DSG 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS62125DSGT ACTIVE WSON DSG 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 9-May-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS62125DSGR WSON DSG 8 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 TPS62125DSGT WSON DSG 8 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 9-May-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS62125DSGR WSON DSG 8 3000 210.0 185.0 35.0 TPS62125DSGT WSON DSG 8 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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