TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 www.ti.com 200 mA, LOW QUIESCENT CURRENT, ULTRA-LOW NOISE, HIGH PSRR, LOW DROPOUT, LINEAR REGULATORS Check for Samples: TPS79901-Q1, TPS79912-Q1, TPS79915-Q1, TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 FEATURES 1 • • Qualified for Automotive Applications 200-mA Low-Dropout (LDO) Regulator With Enable (EN) Low IQ: 40 μA Multiple Output Voltage Versions Available: – Fixed Outputs of 1.2 V to 4.5 V Using Innovative Factory EEPROM Programming – Adjustable Outputs from 1.2 V to 6.5 V High PSRR: 66 dB at 1 kHz Ultralow Noise: 29.5 μVRMS Fast Start-Up Time: 45 μs Stable With a Low ESR, 2-μF (Typ) Output Capacitance Excellent Load/Line Transient Response 2% Overall Accuracy (Load/Line/Temperature) Very Low Dropout: 100 mV Thin SOT-23 and 2-mm × 2-mm SON-6 Packages 23 • • • • • • • • • • OUT 1 OUT GND 2 EN 3 GND 3 4 ORDERABLE PART NUMBER TSOT-23-5 – DDC Reel of 3000 TPS79915QDDCRQ1 OFC SON-6 – DRV Reel of 3000 TPS79915QDRVRQ1 RAQ 1.8 V TSOT-23-5 – DDC Reel of 3000 TSP79918QDDCRQ1 CEW 2.5 V TSOT-23-5 – DDC Reel of 3000 TPS79925QDDCRQ1 OFM TSOT-23-5 – DDC Reel of 3000 TPS79927QDDCRQ1 OFD SON-6 – DRV Reel of 3000 TPS79927QDRVRQ1 OFK TSOT-23-5 – DDC Reel of 3000 TSP79933QDDCRQ1 PSEQ SON-6 – DRV Reel of 3000 TSP79901QDRVRQ1 CFA Adjustable IN 5 N/C 4 EN TOP-SIDE MARKING DAV (3) 6 ORDERING INFORMATION (1) TPS79912QDRVRQ1 3.3 V GND NR Reel of 3000 2.7 V (2) (3) 5 SON-6 – DRV 1.5 V (1) 1 DRV (SON-6) PACKAGE (TOP VIEW) N/C – No internal connection PACKAGE (2) VOUT 1.2 V –40°C to 125°C DDC (TSOT-23-5) PACKAGE (TOP VIEW) FB 2 Cellular Phones Wireless LANs, Bluetooth® VCOs, RF Handheld Organizers, PDAs TJ The TPS799xx family of low-dropout (LDO) low-power linear regulators offers excellent ac performance with very low ground current. High power-supply rejection ratio (PSRR), low noise, fast start-up, and excellent line and load transient response are provided while consuming a very low 40-μA (typical) ground current. The TPS799xx is stable with ceramic capacitors and uses an advanced BiCMOS fabrication process to yield a dropout voltage of 100 mV (typ) at 200-mA output. The TPS799xx uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over all load, line, process, and temperature variations. It is fully specified from TJ = –40°C to 125°C and is offered in low profile ThinSOT-23 and 2-mm × 2-mm SON packages, ideal for wireless handsets and WLAN cards. IN APPLICATIONS • • • • DESCRIPTION For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For fixed 1.2-V operation, tie FB to OUT. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a registered trademark of Bluetooth SIG, Inc. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008–2012, Texas Instruments Incorporated TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS (1) over operating temperature range (unless otherwise noted) VIN range –0.3 V to 7 V VEN range –0.3 V to VIN + 0.3 V VOUT range –0.3 V to VIN + 0.3 V Peak output current Internally limited Continuous total power dissipation See the Thermal Information table Junction temperature range, TJ –55°C to 150°C Storage junction temperature range , Tstg –55°C to 150°C ESD rating, HBM 2000 V ESD rating, CDM 1000 V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. THERMAL INFORMATION THERMAL METRIC (1) (2) TPS799xxQ1 DRV (6 PINS) DDC (5 PINS) θJA Junction-to-ambient thermal resistance 74.2 178.1 θJCtop Junction-to-case (top) thermal resistance 58.8 70.7 θJB Junction-to-board thermal resistance 145.9 73.4 ψJT Junction-to-top characterization parameter 0.2 2.5 ψJB Junction-to-board characterization parameter 54.4 74.1 θJCbot Junction-to-case (bottom) thermal resistance 7.2 n/a (1) (2) 2 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator. Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1 TPS79933-Q1 TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS over operating temperature range (TJ = –40°C to 125°C), VIN = VOUT(TYP) + 0.3 V or 2.7 V, whichever is greater; IOUT = 1 mA, VEN = VIN, COUT = 2.2 μF, CNR = 0.01 μF (unless otherwise noted) For TPS79901, VOUT = 3.0 V. Typical values are at TJ = 25°C. PARAMETER VIN Input voltage range (1) VFB Internal reference (TPS79901) VOUT Output voltage range (TPS79901) VOUT Output accuracy VOUT TEST CONDITIONS MIN TYP MAX UNIT 6.5 V 1.217 V VFB 6.5 – VDO V Nominal, TJ = 25°C –1.0 +1.0 % Output accuracy (1) Over VIN, IOUT, temperature, VOUT + 0.3 V ≤ VIN ≤ 6.5 V, 500 μA ≤ IOUT ≤ 200 mA –2.0 +2.0 % ΔVOUT%/ ΔVIN Line regulation (1) VOUT(NOM) + 0.3 V ≤ VIN ≤ 6.5 V ΔVOUT%/ ΔIOUT Load regulation 500 μA ≤ IOUT ≤ 200 mA VDO Dropout voltage (2) (VIN = VOUT(NOM) – 0.1 V) VOUT < 3.3 V ICL Output current limit VOUT = 0.9 × VOUT(NOM) IGND Ground pin current 500 μA ≤ IOUT ≤ 200 mA ISHDN Shutdown current (IGND) VEN ≤ 0.4 V, 2.7 V ≤ VIN ≤ 6.5 V IFB Feedback pin current (TPS79901) PSRR Power-supply rejection ratio VN Output noise voltage BW = 10 Hz to 100 kHz, VOUT = 2.8 V TSTR Startup time VEN(HI) Enable high (enabled) VEN(LO) Enable low (shutdown) IEN(HI) Enable pin current, enabled 2.7 1.169 VOUT ≥ 3.3 V ±1.0 0.02 IOUT = 200 mA 200 175 90 160 400 600 mA 40 60 μA 0.15 1.0 μA 0.5 μA f = 100 Hz 70 f = 1 kHz 66 f = 10 kHz 51 f = 100 kHz mV dB 38 CNR = 0.01 μF 10.5 VOUT CNR = none VOUT = 2.85 V, RL = 14 Ω, COUT = 2.2 μF %/mA 100 –0.5 VIN = 3.85 V, VOUT = 2.85 V, CNR = 0.01 μF, IOUT = 100 mA %/V 0.002 μVRMS 94 VOUT CNR = 0.001 μF 45 CNR = 0.047 μF 45 CNR = 0.01 μF 50 CNR = none μs 50 1.2 VIN V 0 0.4 V 1.0 μA VEN = VIN = 6.5 V 0.03 Shutdown, temperature increasing 165 °C Reset, temperature decreasing 145 °C TSD Thermal shutdown temperature TJ Operating junction temperature VUVLO Undervoltage lock-out VIN rising VUVLO,hys Hysteresis VIN falling (1) (2) 1.193 –40 1.90 125 2.20 2.65 70 °C V mV Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater. VDO is not measured for devices with VOUT(NOM) < 2.8 V because minimum VIN = 2.7 V. Copyright © 2008–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1 TPS79933-Q1 3 TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 www.ti.com DEVICE INFORMATION FUNCTIONAL BLOCK DIAGRAMS IN OUT IN OUT 400Ω 400Ω 2µA Current Limit Overshoot Detect Thermal Shutdown EN 3.3MΩ Current Limit Thermal Shutdown EN UVLO Overshoot Detect UVLO Quickstart 1.193V Bandgap 1.193V Bandgap NR FB 500k 500k GND GND Figure 1. Fixed-Voltage Version Figure 2. Adjustable-Voltage Version PIN CONFIGURATIONS DDC (TSOT-23-5) PACKAGE (TOP VIEW) IN 1 5 OUT DRV (SON-6) PACKAGE (TOP VIEW) OUT 1 FB 2 GND 2 EN 3 GND GND 3 4 6 IN 5 N/C 4 EN NR N/C – No internal connection Table 1. PIN DESCRIPTIONS PIN NAME 4 NO. DDC DESCRIPTION DRV IN 1 6 GND 2 3, Pad Input supply EN 3 4 Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. EN can be connected to IN if not used. NR 4 2 Fixed-voltage versions only; connecting an external capacitor to this pin bypasses noise generated by the internal bandgap. This capacitor allows output noise to be reduced to very low levels. FB 4 2 Adjustable version only; this pin is the input to the control loop error amplifier, and is used to set the output voltage of the device. OUT 5 1 Output of the regulator. A small capacitor (total typical capacitance ≥ 2 μF ceramic) is needed from this pin to ground to ensure stability. N/C — 5 Not internally connected. This pin must either be left open or tied to GND. Ground. The pad must be tied to GND. Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1 TPS79933-Q1 TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 www.ti.com TYPICAL CHARACTERISTICS Over operating temperature range (TJ = –40°C to 125°C), VIN = VOUT(TYP) + 0.3 V or 2.7 V, whichever is greater; IOUT = 1 mA, VEN = VIN, COUT = 2.2 μF, CNR = 0.01 μF (unless otherwise noted). For TPS79901, VOUT = 3 V. Typical values are at TJ = 25°C. LOAD REGULATION LINE REGULATION 28.50 1.0 21.38 0.8 IOUT = 100mA Change in VOUT (%) Change in VOUT (mV) 0.6 14.25 TJ = +25°C 7.13 TJ = −40°C 0 −7.13 −14.25 TJ = +125°C −21.38 TJ = −40°C 0.4 TJ = +25°C 0.2 0 −0.2 TJ = +125°C −0.4 TJ = +85°C −0.6 TJ = +85°C −0.8 −1.0 −28.50 0 50 100 150 2.5 200 3.5 4.5 5.5 6.5 7.5 VIN (V) IOUT (mA) Figure 3. Figure 4. OUTPUT VOLTAGE vs JUNCTION TEMPERATURE TPS79901 DROPOUT vs INPUT VOLTAGE 110 2.0 I OUT = 200mA 100 1.5 80 IOUT = 1mA IOUT = 100mA 0.5 0 −0.5 VDO (mV) Change in VOUT (%) 90 1.0 70 60 50 40 IOUT = 200mA −1.0 30 20 −1.5 10 −2.0 0 −40 −25 −15 5 20 35 50 65 80 95 2.5 110 125 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 VIN (V) TJ (°C) Figure 5. Figure 6. GROUND PIN CURRENT vs INPUT VOLTAGE GROUND PIN CURRENT (DISABLED) vs JUNCTION TEMPERATURE 60 600 50 VEN = 0.4V 500 IOUT = 200mA 400 IOUT = 500mA IGND (nA) IGND (mA) 40 30 300 20 200 10 100 VIN = 6.5V VOUT = 2.85V VIN = 3.2V 0 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) Figure 7. Copyright © 2008–2012, Texas Instruments Incorporated 6.0 6.5 7.0 −40 −25 −15 5 20 35 50 65 80 95 110 125 TJ (°C) Figure 8. Submit Documentation Feedback Product Folder Link(s): TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1 TPS79933-Q1 5 TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ = –40°C to 125°C), VIN = VOUT(TYP) + 0.3 V or 2.7 V, whichever is greater; IOUT = 1 mA, VEN = VIN, COUT = 2.2 μF, CNR = 0.01 μF (unless otherwise noted). For TPS79901, VOUT = 3 V. Typical values are at TJ = 25°C. POWER-SUPPLY RIPPLE REJECTION vs VIN – VOUT, IOUT = 1 mA POWER-SUPPLY RIPPLE REJECTION vs VIN – VOUT, IOUT = 100 mA 90 90 1MHz 0.1kHz 1kHz 70 70 60 60 50 40 100kHz 10kHz 0.1kHz 80 30 1kHz 10kHz PSRR (dB) PSRR (dB) 80 50 40 30 100kHz 20 1MHz 20 CNR = 0.01µF COUT = 2.2µF 10 0 0.0 0.5 1.0 CNR = 0.01µF COUT = 2.2µF 10 1.5 2.0 3.0 2.5 3.5 0 0.0 4.0 0.5 1.0 1.5 2.0 2.5 VIN − VOUT (V) VIN − VOUT (V) Figure 9. Figure 10. 3.5 4.0 POWER-SUPPLY RIPPLE REJECTION vs VIN – VOUT, IOUT = 200 mA 90 80 3.0 0.1kHz 1kHz 70 PSRR (dB) 60 10kHz 50 40 30 CNR = 0.01µF COUT = 2.2µF 10 0 0.0 100kHz 1MHz 20 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VIN − VOUT (V) Figure 11. 6 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1 TPS79933-Q1 TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 www.ti.com APPLICATION INFORMATION The TPS799xx family of LDO regulators combines the high performance required of many RF and precision analog applications with ultra-low current consumption. High PSRR is provided by a high gain, high bandwidth error loop with good supply rejection at very low headroom (VIN – VOUT). Fixed voltage versions provide a noise reduction pin to bypass noise generated by the bandgap reference and to improve PSRR while a quick-start circuit fast-charges this capacitor at startup. The combination of high performance and low ground current also make the TPS799xx an excellent choice for portable applications. All versions have thermal and over-current protection and are fully specified from –40°C to 125°C. Figure 12 shows the basic circuit connections for fixed-voltage model. Figure 13 gives the connections for the adjustable output version (TPS79901). R1 and R2 can be calculated for any output voltage using the formula in Figure 13. Sample resistor values for common output voltages are shown in Figure 13. Input and Output Capacitor Requirements Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1-μF to 1-μF low ESR capacitor across the input supply near the regulator. This counteracts reactive input sources and improve transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or the device is located several inches from the power source. If source impedance is not sufficiently low, a 0.1-μF input capacitor may be necessary to ensure stability. The TPS799xx is designed to be stable with standard ceramic capacitors of values 2.2 μF or larger. X5R and X7R type capacitors are best as they have minimal variation in value and ESR over temperature. Maximum ESR should be <1.0 Ω. Feedback Capacitor Requirements (TPS79901 only) The feedback capacitor, CFB, shown in Figure 13 is required for stability. For a parallel combination of R1 and R2 equal to 250 kΩ, any value from 3 pF to 1 nF can be used. Fixed voltage versions have an internal 30-pF feedback capacitor which is quick-charged at start-up. The adjustable version does not have this quick-charge circuit, so values below 5 pF should be used to ensure fast startup; values above 47 pF can be used to implement an output voltage soft-start. Larger value capacitors also improve noise slightly. The TPS79901 is stable in unity-gain configuration (OUT tied to FB) without CFB. Output Noise In most LDOs, the bandgap is the dominant noise source. If a noise reduction capacitor (CNR) is used with the TPS799xx, the bandgap does not contribute significantly to noise. Instead, noise is dominated by the output resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01-μF noise reduction capacitor; for the adjustable version, smaller value resistors in the output resistor divider reduce noise. A parallel combination that gives 2 μA of divider current has the same noise performance as a fixed-voltage version. To further optimize noise, equivalent series resistance of the output capacitor can be set to approximately 0.2 Ω. This configuration maximizes phase margin in the control loop, reducing total output noise by up to 10%. Optional input capacitor. May improve source impedance, noise, or PSRR. Optional input capacitor. May improve source impedance, noise, or PSRR. VIN IN VOUT OUT VIN IN TPS799xx EN GND NR 2.2µF Ceramic EN VOUT = OUT TPS79901 GND (R1 + R2) R2 ´ 1.193 VOUT R1 CFB FB 2.2mF Ceramic R2 VEN Optional bypass capacitor to reduce output noise and increase PSRR. Figure 12. Typical Application Circuit for Fixed Voltage Version VEN Figure 13. Typical Application Circuit for Adjustable Voltage Version Noise can be referred to the feedback point (FB pin) such that with CNR = 0.01 μF, total noise is approximately given by Equation 1: Copyright © 2008–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1 TPS79933-Q1 7 TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 VN = www.ti.com 10.5mVRMS x VOUT V (1) The TPS79901 adjustable version does not have the noise-reduction pin available, so ultra-low noise operation is not possible. Noise can be minimized according to the previous recommendations. Board Layout Recommendations to Improve PSRR and Noise Performance To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device. Internal Current Limit The TPS799xx internal current limit helps protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of output voltage. For reliable operation, the device should not be operated in current limit for extended periods of time. The PMOS pass element in the TPS799xx has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting may be appropriate. Shutdown The enable pin (EN) is active high and is compatible with standard and low voltage TTL-CMOS levels. When shutdown capability is not required, EN can be connected to IN. Dropout Voltage The TPS799xx uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output resistance is the RDS, ON of the PMOS pass element. Because the PMOS device behaves like a resistor in dropout, VDO scales approximately with output current. As with any linear regulator, PSRR and transient response are degraded as (VIN – VOUT) approaches dropout. This effect is shown in Figure 9 through Figure 11 in the Typical Characteristics section. Startup Fixed voltage versions of the TPS799xx use a quick-start circuit to fast-charge the noise reduction capacitor, CNR, if present (see Functional Block Diagrams, Figure 1). This allows the combination of very low output noise and fast start-up times. The NR pin is high impedance so a low leakage CNR capacitor must be used; most ceramic capacitors are appropriate in this configuration. Note that for fastest startup, VIN should be applied first, then the enable pin (EN) driven high. If EN is tied to IN, startup is somewhat slower. The quick-start switch is closed for approximately 135 μs. To ensure that CNR is fully charged during the quick-start time, a 0.01 μF or smaller capacitor should be used. Transient Response As with any regulator, increasing the size of the output capacitor reduces over/undershoot magnitude but increase duration of the transient response. In the adjustable version, adding CFB between OUT and FB improves stability and transient response. The transient response of the TPS799xx is enhanced by an active pulldown that engages when the output overshoots by approximately 5% or more when the device is enabled. When enabled, the pulldown device behaves like a 350-Ω resistor to ground. Undervoltage Lockout (UVLO) The TPS799xx utilizes a UVLO circuit to keep the output shut off until internal circuitry is operating properly. The UVLO circuit has a deglitch feature so that it typically ignores undershoot transients on the input if they are less than 50-μs duration. 8 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1 TPS79933-Q1 TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 www.ti.com Minimum Load The TPS799xx is stable and well behaved with no output load. To meet the specified accuracy, a minimum load of 500 μA is required. Below 500 μA at junction temperatures near 125°C, the output can drift up enough to cause the output pulldown to turn on. The output pulldown limits voltage drift to 5% typically, but ground current could increase by approximately 50 μA. In typical applications, the junction cannot reach high temperatures at light loads since there is no appreciable dissipated power. The specified ground current would then be valid at no load in most applications. THERMAL INFORMATION Thermal Protection Thermal protection disables the output when the junction temperature rises to approximately 165°C, allowing the device to cool. When the junction temperature cools to approximately 145°C, the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage due to overheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to 125°C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least 35°C above the maximum expected ambient condition of your particular application. This configuration produces a worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load. The internal protection circuitry of the TPS799xx has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS799xx into thermal shutdown degrades device reliability. Power Dissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the PCB layout. The PCB area around the device that is free of other components moves the head from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through holes to heat-dissipating layers also improves the heatsink effectiveness. Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the output current times the voltage drop across the output pass element, as shown in Equation 2: P D + ǒVIN*V OUTǓ I OUT (2) Package Mounting Solder pad footprint recommendations for the TPS799xx are available from the Texas Instruments' web site at www.ti.com. Copyright © 2008–2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1 TPS79933-Q1 9 TPS79901-Q1, TPS79912-Q1, TPS79915-Q1 TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 SBVS097E – MARCH 2008 – REVISED JANUARY 2012 www.ti.com REVISION HISTORY Changes from Revision D (June 2011) to Revision E • 10 Page Changed CDM ESD rating from 500 V to 1000 V ................................................................................................................ 2 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated Product Folder Link(s): TPS79901-Q1 TPS79912-Q1 TPS79915-Q1 TPS79918-Q1 TPS79925-Q1 TPS79927-Q1 TPS79933-Q1 PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TPS79901QDRVRQ1 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79912QDRVRQ1 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79915QDDCRQ1 ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79915QDRVRQ1 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79918QDDCRQ1 ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79925QDDCRQ1 ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79927QDDCRQ1 ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79927QDRVRQ1 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS79933QDDCRQ1 ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com (3) 24-Jan-2012 MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS79901-Q1, TPS79912-Q1, TPS79915-Q1, TPS79918-Q1, TPS79925-Q1, TPS79927-Q1, TPS79933-Q1 : • Catalog: TPS79901, TPS79912, TPS79915, TPS79918, TPS79925, TPS79927, TPS79933 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Jan-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS79912QDRVRQ1 Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS79915QDDCRQ1 SOT DDC 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS79915QDRVRQ1 SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS79925QDDCRQ1 SOT DDC 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS79927QDDCRQ1 SOT DDC 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS79927QDRVRQ1 SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS79933QDDCRQ1 SOT DDC 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Jan-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS79912QDRVRQ1 SON DRV 6 3000 195.0 200.0 45.0 TPS79915QDDCRQ1 SOT DDC 5 3000 203.0 203.0 35.0 TPS79915QDRVRQ1 SON DRV 6 3000 195.0 200.0 45.0 TPS79925QDDCRQ1 SOT DDC 5 3000 203.0 203.0 35.0 TPS79927QDDCRQ1 SOT DDC 5 3000 203.0 203.0 35.0 TPS79927QDRVRQ1 SON DRV 6 3000 195.0 200.0 45.0 TPS79933QDDCRQ1 SOT DDC 5 3000 203.0 203.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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