TPS735xx www.ti.com SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 500mA, Low Quiescent Current, Ultra-Low Noise, High PSRR Low Dropout Linear Regulator FEATURES DESCRIPTION • • • The TPS735xx family of low-dropout (LDO), low-power linear regulators offers excellent ac performance with very low ground current. High power-supply rejection ratio (PSRR), low noise, fast start-up, and excellent line and load transient response are provided while consuming a very low 46μA (typical) ground current. The TPS735xx is stable with ceramic capacitors and uses an advanced BiCMOS fabrication process to yield a typical dropout voltage of 250mV at 500mA output. The TPS735xx uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% (VOUT > 2.2V) over all load, line, process, and temperature variations. It is fully specified from TJ = –40°C to +125°C and is offered in low-profile, 2mm x 2mm SON and 3mm × 3mm SON packages that are ideal for wireless handsets, printers, and WLAN cards. 1 2 • • • • • • • • 500mA Low Dropout Regulator with EN Low IQ: 46μA Multiple Output Voltage Versions Available: – Fixed Outputs of 1.0V to 4.3V Using Innovative Factory EEPROM Programming – Adjustable Outputs from 1.25V to 6.0V High PSRR: 60dB at 1kHz Ultra-low Noise: 28μVRMS Fast Start-Up Time: 45μs Stable with a Low-ESR, 2.0μF Typical Output Capacitance Excellent Load/Line Transient Response 2% Overall Accuracy (Load/Line/Temp, VOUT > 2.2V) Very Low Dropout: 280mV at 500mA 2mm × 2mm SON-6 and 3mm × 3mm SON-8 Packages APPLICATIONS • • • • WiFi, WiMax Printers Cellular Phones, SmartPhones Handheld Organizers, PDAs DRB PACKAGE 3mm x 3mm SON (TOP VIEW) OUT 1 N/C 2 NR/FB 3 GND 4 8 IN GND 7 N/C 6 N/C 5 EN DRV PACKAGE 2mm x 2mm SON (TOP VIEW) OUT 1 NR/FB 2 GND 3 GND 6 IN 5 N/C 4 EN 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008–2009, Texas Instruments Incorporated TPS735xx SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PRODUCT VOUT TPS735xx yyy z (1) (2) (2) XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable). YYY is package designator. Z is package quantity. For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Output voltages from 1.0V to 3.6V in 50mV increments are available through the use of innovative factory EEPROM programming; minimum order quantities may apply. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS Over operating temperature range (unless otherwise noted). (1) PARAMETER TPS735xx UNIT VIN range –0.3 to +7.0 V VEN range –0.3 to VIN +0.3 V –0.3 to VIN +0.3 V –0.3 to VFB (TYP) +0.3 V VOUT range VFB range Peak output current Internally limited Continuous total power dissipation See Dissipation Ratings Table Junction temperature range, TJ –55 to +150 Storage temperature range , TSTG –55 to +150 °C ESD rating, HBM 2 kV ESD rating, CDM 500 V (1) °C Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. DISSIPATION RATINGS BOARD TA < +25°C TA = +70°C TA = +85°C 140°C/W 7.1mW/°C 715mW 395mW 285mW 65°C/W 15.4mW/°C 1.54W 845mW 615mW 40°C/W 25mW/°C 2.5W 1.38W 1.0W RθJC RθJA (1) DRV 20°C/W High-K (2) DRV 20°C/W DRB 1.2°C/W Low-K High-K (2) (1) (2) (3) 2 DERATING FACTOR ABOVE TA = +25°C PACKAGE (3) The JEDEC low-K (1s) board used to derive this data was a 3in × 3in (7,62cm × 7,62cm), two-layer board with 2-ounce (56,699g) copper traces on top of the board. The JEDEC high-K (2s2p) board used to derive this data was a 3in × 3in (7,62cm × 7,62cm), multilayer board with 1-ounce (28,35g) internal power and ground planes and 2-ounce (56,699g) copper traces on top and bottom of the board. The RθJC value of the DRB package is junction-to-pad; note that this is not junction-to-case (top center of IC package). Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated TPS735xx www.ti.com SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 ELECTRICAL CHARACTERISTICS Over operating temperature range (TJ = –40°C to +125°C), VIN = VOUT(TYP) + 0.5V or 2.7V, whichever is greater; IOUT = 1mA, VEN = VIN, COUT = 2.2μF, CNR = 0.01μF, unless otherwise noted. For TPS73501, VOUT = 3.0V. Typical values are at TJ = +25°C. PARAMETER TEST CONDITIONS (1) VIN Input voltage range VFB Internal reference (TPS73501) Output voltage range (TPS73501) VOUT Output accuracy % VOUT + 0.3V ≤ VIN ≤ 6.5V 1mA ≤ IOUT ≤ 500mA, VOUT ≤ 2.2V –3.0 ±1.0 +3.0 % VOUT + 0.3V ≤ VIN ≤ VOUT + 3.0V, VIN ≤ 6.5V 1mA ≤ IOUT ≤ 500mA, VOUT > 2.2V –2.0 ±1.0 +2.0 % VOUT + 0.3V ≤ VIN ≤ VOUT + 3.0V, VIN ≤ 6.5V 1mA ≤ IOUT ≤ 500mA, VOUT > 2.2V –3.0 ±1.0 +3.0 % Dropout voltage (2) (VIN = VOUT(NOM) – 0.1V) IOUT = 500mA ICL Output current limit VOUT = 0.9 × VOUT(NOM) VIN = VOUT(NOM) + 0.9V, VIN ≥ 2.7V IGND Ground pin current 500μA ≤ IOUT ≤ 500mA ISHDN Shutdown current (IGND) VEN ≤ 0.4V (1) (2) Feedback pin current (TPS73501) Power-supply rejection ratio VIN = 3.85V, VOUT = 2.85V, CNR = 0.01μF, IOUT = 100mA Output noise voltage BW = 10Hz to 100kHz, VOUT = 2.8V Startup time, VOUT= 0% to 90% VOUT = 2.85V, RL = 14Ω, COUT = 2.2μF Enable pin current, enabled TSD Thermal shutdown temperature TJ Operating junction temperature UVLO % +2.0 VDO Enable low (shutdown) +1.0 ±1.0 500μA ≤ IOUT ≤ 500mA IEN(HI) V –2.0 VOUT(NOM) + 0.3V ≤ VIN ≤ 6.5V VEN(LO) 6.0 –1.0 Load regulation Enable high (enabled) V VFB VOUT + 0.3V ≤ VIN ≤ VOUT > 6.5V 1mA ≤ IOUT ≤ 500mA, VOUT > 2.2V Output accuracy (1) VEN(HI) V 1.232 TJ = +25°C ΔVOUT%/ ΔIOUT TSTR UNIT DRB package over VIN, IOUT, Temp Line regulation (1) VN 6.5 1.208 1.184 ΔVOUT%/ ΔVIN PSRR MAX Nominal DRV package over VIN, IOUT, Temp IFB TYP 2.7 VOUT VOUT MIN 800 0.02 %/V 0.005 %/mA 280 500 mV 1170 1720 mA 45 65 μA 0.15 1.0 μA 0.5 μA –0.5 f = 100Hz 60 dB f = 1kHz 56 dB f = 10kHz 41 dB f = 100kHz 28 dB CNR = 0.01μF 11 x VOUT μVRMS CNR = none 95 x VOUT μVRMS CNR = none 45 μs CNR = 0.001μF 45 μs CNR = 0.01μF 50 μs CNR = 0.047μF 50 1.2 0 VEN = VIN = 6.5V 0.03 Shutdown, temperature increasing 165 Reset, temperature decreasing VIN rising Hysteresis VIN falling 1.90 2.20 V 0.4 V 1.0 μA °C 145 –40 Under-voltage lock-out μs VIN °C +125 °C 2.65 V 70 mV Minimum VIN = VOUT + VDO or 2.7V, whichever is greater. VDO is not measured for devices with VOUT(NOM) < 2.8V because minimum VIN = 2.7V. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 3 TPS735xx SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 www.ti.com DEVICE INFORMATION FUNCTIONAL BLOCK DIAGRAMS IN OUT IN OUT 400W 400W 2mA Current Limit Thermal Shutdown EN 3.3MW Current Limit Overshoot Detect Overshoot Detect Thermal Shutdown EN UVLO UVLO Quickstart 1.208V (1) Bandgap NR 500kW 1.208V Bandgap FB 500kW GND GND NOTE (1): Fixed voltage versions between 1.0V to 1.2V have a 1.0V bandgap circuit instead of a 1.208V bandgap circuit. Figure 1. Fixed Voltage Versions Figure 2. Adjustable Voltage Versions PIN CONFIGURATIONS DRB PACKAGE 3mm × 3mm SON-6 (TOP VIEW) OUT 1 N/C 2 NR/FB 3 DRV PACKAGE 2mm × 2mm SON-6 (TOP VIEW) 8 IN GND GND 4 7 N/C OUT 1 6 N/C 5 EN NR/FB 2 GND 3 GND 6 IN 5 N/C 4 EN PIN DESCRIPTIONS TPS735xx 4 NAME DRV DRB IN 6 8 Input supply. GND 3, Pad 4 Ground. The pad must be tied to GND. EN 4 5 Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. EN can be connected to IN if not used. NR 2 3 Fixed voltage versions only; connecting an external capacitor to this pin bypasses noise generated by the internal bandgap. This allows output noise to be reduced to very low levels. FB 2 3 Adjustable version only; this is the input to the control loop error amplifier, and is used to set the output voltage of the device. OUT 1 1 Output of the regulator. A small capacitor (total typical capacitance ≥ 2.0μF ceramic) is needed from this pin to ground to assure stability. N/C 5 2, 6, 7 Submit Documentation Feedback DESCRIPTION Not internally connected. This pin must either be left open, or tied to GND. Copyright © 2008–2009, Texas Instruments Incorporated TPS735xx www.ti.com SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 TYPICAL CHARACTERISTICS Over operating temperature range (TJ= –40°C to +125°C), VIN = VOUT(TYP) + 0.5V or 2.7V, whichever is greater; IOUT = 1mA, VEN = VIN,COUT = 2.2μF, CNR = 0.01μF, unless otherwise noted. For TPS73501, VOUT = 2.8V. Typical values are at TJ = +25°C. TPS73501 LINE REGULATION TPS73525 LINE REGULATION 0.5 IOUT = 100mA 0.3 TJ = -40°C 0.2 TJ = 0°C 0.1 0 -0.1 TJ = +25°C -0.2 TJ = +85°C -0.3 0.3 0.1 0 -0.1 -0.2 TJ = +85°C -0.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 3.0 6.5 3.5 4.0 4.5 Figure 3. 6.0 6.5 TPS73525 LOAD REGULATION 2.55 Y-axis range is ±2% of 2.8V 2.85 5.5 Figure 4. TPS73501 LOAD REGULATION 2.86 5.0 VIN (V) VIN (V) Y-axis range is ±2% of 2.5V 2.54 2.84 2.53 2.83 TJ = -40°C 2.81 2.80 2.79 VOUT (V) 2.52 2.82 VOUT (V) TJ = +25°C TJ = +125°C -0.4 -0.5 TJ = +85°C 2.78 2.77 2.51 2.47 2.46 2.74 2.45 50 TJ = -40°C 2.49 2.75 0 TJ = 0°C 2.50 2.48 TJ = +125°C 2.76 TJ = +25°C TJ = +125°C 0 100 150 200 250 300 350 400 450 500 50 TJ = +85°C 100 150 200 250 300 350 400 450 500 Load (mA) Load (mA) Figure 5. Figure 6. TPS73525 GROUND PIN CURRENT vs OUTPUT CURRENT TPS73525 GROUND PIN CURRENT (DISABLE) vs TEMPERATURE 60 TJ = +25°C 50 500 TJ = +125°C VEN = 0.4V 450 TJ = +85°C 400 350 TJ = -40°C 30 TJ = 0°C 20 IGND (na) 40 IGND (mA) TJ = 0°C TJ = -40°C 0.2 -0.3 TJ = +125°C -0.4 IOUT = 100mA 0.4 Change in VOUT (%) 0.4 Change in VOUT (%) 0.5 300 250 VIN = 3.3V 200 VIN = 5.0V 150 VIN = 6.5V 100 10 50 0 0 0 50 100 150 200 250 300 350 400 450 500 IOUT (mA) Figure 7. Copyright © 2008–2009, Texas Instruments Incorporated -40 -25 -10 5 20 35 50 65 80 95 110 125 TJ (°C) Figure 8. Submit Documentation Feedback 5 TPS735xx SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ= –40°C to +125°C), VIN = VOUT(TYP) + 0.5V or 2.7V, whichever is greater; IOUT = 1mA, VEN = VIN,COUT = 2.2μF, CNR = 0.01μF, unless otherwise noted. For TPS73501, VOUT = 2.8V. Typical values are at TJ = +25°C. TPS73501 DROPOUT VOLTAGE vs OUTPUT CURRENT POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN – VOUT = 1.0V) 90 400 TJ = +125°C 350 TJ = +25°C 250 200 TJ = 0°C 150 IOUT = 250mA 60 IOUT = 100mA 50 40 30 TJ = -40°C 100 IOUT = 1mA 70 PSRR (dB) 300 VDO (mV) 80 TJ = +85°C IOUT = 500mA 20 50 10 0 0 0 50 COUT = 2.2mF CNR = 0.01mF 10 100 150 200 250 300 350 400 450 500 100 IOUT = 200mA 100k 10M 1M Frequency (Hz) Figure 9. Figure 10. POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN – VOUT = 0.5V) POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN – VOUT = 0.3V) 90 90 80 50 PSRR (dB) PSRR (dB) IOUT = 100mA 40 30 IOUT = 200mA 60 IOUT = 100mA 50 40 30 20 0 IOUT = 1mA 70 IOUT = 200mA 60 10 80 IOUT = 1mA 70 20 COUT = 2.2mF CNR = 0.01mF 10 100 IOUT = 250mA 1k 10k 100k Frequency (Hz) Figure 11. 6 10k 1k IOUT (mA) Submit Documentation Feedback IOUT = 500mA 10 0 1M 10M COUT = 10mF CNR = 0.01mF 10 100 IOUT = 200mA 1k IOUT = 500mA 10k 100k 1M 10M Frequency (Hz) Figure 12. Copyright © 2008–2009, Texas Instruments Incorporated TPS735xx www.ti.com SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ= –40°C to +125°C), VIN = VOUT(TYP) + 0.5V or 2.7V, whichever is greater; IOUT = 1mA, VEN = VIN,COUT = 2.2μF, CNR = 0.01μF, unless otherwise noted. For TPS73501, VOUT = 2.8V. Typical values are at TJ = +25°C. TPS73525 TOTAL NOISE vs CNR TPS73525 TOTAL NOISE vs COUT 140 25 Total Noise (mVRMS) 120 Total Noise (mVRMS) 30 IOUT = 1mA COUT = 2.2mF 100 80 60 40 20 15 10 5 20 0 IOUT = 1mA CNR = 0.01mF 0 0.01 0.1 1 0 10 5 10 Figure 14. TPS73525 TURN-ON RESPONSE (VIN = VEN) TPS73525 EN RESPONSE OVER STABLE VIN COUT = 2.2mF 2.0 1.5 COUT = 10mF VEN 3.0 VOUT 2.5 VEN VOUT COUT = 2.2mF Voltage (V) Voltage (V) 25 3.5 3.0 1.0 20 Figure 13. 3.5 2.5 15 COUT (mF) CNR (nF) 2.0 1.5 1.0 0.5 0.5 0 0 COUT = 10mF -0.5 -0.5 10ms/div 10ms/div Figure 15. Figure 16. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 7 TPS735xx SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) Over operating temperature range (TJ= –40°C to +125°C), VIN = VOUT(TYP) + 0.5V or 2.7V, whichever is greater; IOUT = 1mA, VEN = VIN,COUT = 2.2μF, CNR = 0.01μF, unless otherwise noted. For TPS73501, VOUT = 2.8V. Typical values are at TJ = +25°C. TPS73525 POWER-UP/POWER-DOWN (VIN = VEN) TPS73525 LOAD TRANSIENT RESPONSE 7.0 VIN = 3.0V RL = 5W 6.0 COUT = 10mF VIN = EN VOUT 200mV/div 5.0 Volts (V) COUT = 470mF OSCON 200mV/div VOUT 4.0 COUT = 2.2mF 200mV/div 3.0 2.0 VOUT 1.0 500mA 0 500mA/div IOUT 1mA -1.0 10ms/div 10ms/div Figure 17. Figure 18. TPS73525 LINE TRANSIENT RESPONSE COUT = 470mF OSCON 50mV/div COUT =V10 mF OUT 50mV/div COUT = 2.2mF 50mV/div VOUT VOUT VOUT 4V 0.5V/div 3V VIN 10ms/div Figure 19. 8 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated TPS735xx www.ti.com SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 APPLICATION INFORMATION The TPS735xx family of LDO regulators combines the high performance required of many RF and precision analog applications with ultra-low current consumption. High PSRR is provided by a high gain, high bandwidth error loop with good supply rejection at very low headroom (VIN – VOUT). Fixed voltage versions provide a noise reduction pin to bypass noise generated by the bandgap reference and to improve PSRR while a quick-start circuit fast-charges this capacitor at startup. The combination of high performance and low ground current also make the TPS735xx an excellent choice for portable applications. All versions have thermal and over-current protection and are fully specified from –40°C to +125°C. Figure 20 shows the basic circuit connections for fixed voltage models. Figure 21 gives the connections for the adjustable output version (TPS73501). R1 and R2 can be calculated for any output voltage using the formula in Figure 21. Optional input capacitor. May improve source impedance, noise, or PSRR. VIN IN VOUT OUT TPS735xx EN GND VEN 2.2mF Ceramic NR Optional bypass capacitor to reduce output noise and increase PSRR. Figure 20. Typical Application Circuit for Fixed Voltage Versions Optional input capacitor. May improve source impedance, noise, or PSRR. VIN IN VOUT = R2 GND ´ 1.208 VOUT OUT TPS73501 EN (R1 + R2) R1 CFB FB 2.2mF Ceramic R2 VEN Figure 21. Typical Application Circuit for Adjustable Voltage Versions space space Copyright © 2008–2009, Texas Instruments Incorporated Input and Output Capacitor Requirements Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1μF to 1μF low equivalent series resistance (ESR) capacitor across the input supply near the regulator. The ground of this capacitor should be connected as close as the ground of output capacitor; a capacitor value of 0.1μF is enough in this condition. When it is difficult to place these two ground points close together, a 1μF capacitor is recommended. This capacitor counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated, or if the device is located several inches from the power source. If source impedance is not sufficiently low, a 0.1μF input capacitor may be necessary to ensure stability. The TPS735xx is designed to be stable with standard ceramic output capacitors of values 2.2μF or larger. X5R and X7R type capacitors are best because they have minimal variation in value and ESR over temperature. Maximum ESR of the output capacitor should be < 1.0Ω, so output capacitor type should be either ceramic or conductive polymer electrolytic. Feedback Capacitor Requirements (TPS73501 only) The feedback capacitor, CFB, shown in Figure 21 is required for stability. For a parallel combination of R1 and R2 equal to 250kΩ, any value from 3pF to 1nF can be used. Fixed voltage versions have an internal 30pF feedback capacitor that is quick-charged at start-up. The adjustable version does not have this quick-charge circuit, so values below 5pF should be used to ensure fast startup; values above 47pF can be used to implement an output voltage soft-start. Larger value capacitors also improve noise slightly. The TPS73501 is stable in unity-gain configuration (OUT tied to FB) without CFB. Output Noise In most LDOs, the bandgap is the dominant noise source. If a noise reduction capacitor (CNR) is used with the TPS735xx, the bandgap does not contribute significantly to noise. Instead, noise is dominated by the output resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01μF noise reduction capacitor; for the adjustable version, smaller value resistors in the output resistor divider reduce noise. A parallel combination that gives 2μA of divider current has the same noise performance as a fixed voltage version. To further Submit Documentation Feedback 9 TPS735xx SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 optimize noise, equivalent series resistance of the output capacitor can be set to approximately 0.2Ω. This configuration maximizes phase margin in the control loop, reducing total output noise by up to 10%. Noise can be referred to the feedback point (FB pin) such that with CNR = 0.01μF, total noise is given approximately by Equation 1: 11mVRMS VN = x VOUT V (1) The TPS73501 adjustable version does not have the noise-reduction pin available, so ultra-low noise operation is not possible. Noise can be minimized according to the above recommendations. Board Layout Recommendations to Improve PSRR and Noise Performance To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device. Internal Current Limit The TPS735xx internal current limit helps protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of output voltage. For reliable operation, the device should not be operated in current limit for extended periods of time. The PMOS pass element in the TPS735xx has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting may be appropriate. Shutdown The enable pin (EN) is active high and is compatible with standard and low voltage TTL-CMOS levels. When shutdown capability is not required, EN can be connected to IN. Dropout Voltage The TPS735xx uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output resistance is the RDS, ON of the PMOS pass element. Because the PMOS device behaves like a resistor in dropout, VDO approximately scales with output current. 10 Submit Documentation Feedback www.ti.com As with any linear regulator, PSRR and transient response are degraded as (VIN – VOUT) approaches dropout. This effect is shown in the Typical Characteristics section. Startup and Noise Reduction Capacitor Fixed voltage versions of the TPS735xx use a quick-start circuit to fast-charge the noise reduction capacitor, CNR, if present (see the Functional Block Diagrams). This architecture allows the combination of very low output noise and fast start-up times. The NR pin is high impedance so a low leakage CNR capacitor must be used; most ceramic capacitors are appropriate in this configuration. Note that for fastest startup, VIN should be applied first, then the enable pin (EN) driven high. If EN is tied to IN, startup is somewhat slower. Refer to the Typical Characteristics section. The quick-start switch is closed for approximately 135μs. To ensure that CNR is fully charged during the quick-start time, a 0.01μF or smaller capacitor should be used. Transient Response As with any regulator, increasing the size of the output capacitor reduces over/undershoot magnitude but increases duration of the transient response. In the adjustable version, adding CFB between OUT and FB improves stability and transient response. The transient response of the TPS735xx is enhanced by an active pull-down that engages when the output overshoots by approximately 5% or more when the device is enabled. When enabled, the pull-down device behaves like a 400Ω resistor to ground. Undervoltage Lock-Out (UVLO) The TPS735xx utilizes an undervoltage lock-out circuit to keep the output shut off until internal circuitry is operating properly. The UVLO circuit has a de-glitch feature so that it typically ignores undershoot transients on the input if they are less than 50μs duration. Minimum Load The TPS735xx is stable and well-behaved with no output load. To meet the specified accuracy, a minimum load of 500μA is required. Below 500μA at junction temperatures near +125°C, the output can drift up enough to cause the output pull-down to turn on. The output pull-down limits voltage drift to 5% typically but ground current could increase by approximately 50μA. In typical applications, the junction cannot reach high temperatures at light loads because there is no appreciable dissipated power. The specified ground current would then be valid at no load in most applications. Copyright © 2008–2009, Texas Instruments Incorporated TPS735xx www.ti.com SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 Thermal Information Thermal Protection Power Dissipation Thermal protection disables the output when the junction temperature rises to approximately +165°C, allowing the device to cool. When the junction temperature cools to approximately +145°C the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a result of overheating. The ability to remove heat from the die is different for each package type, presenting different considerations in the PCB layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Dissipation Ratings table. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves the heatsink effectiveness. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to +125°C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least +35°C above the maximum expected ambient condition of your particular application. This configuration produces a worst-case junction temperature of +125°C at the highest expected ambient temperature and worst-case load. The internal protection circuitry of the TPS735xx has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS735xx into thermal shutdown degrades device reliability. Copyright © 2008–2009, Texas Instruments Incorporated Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the output current time the voltage drop across the output pass element, as shown in Equation 2: P D + ǒVIN*V OUTǓ @ I OUT (2) Note: When the device is used in a condition of higher input and lower output voltages with the DRV and DRB packages, PD exceeds the package rating at room temperature. This equation shows an example of the DRB package: PD = (6.5V – 1.0V) × 500mA = 2.75W, which is greater than 2.5W at +25°C. Package Mounting Solder pad footprint recommendations for the TPS735xx are available from the Texas Instruments web site at www.ti.com. Submit Documentation Feedback 11 TPS735xx SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision G (March, 2009) to Revision H Page • Revised bullet point in Features list to show very low dropout of 280mV ............................................................................ 1 • Changed dropout voltage typical specification from 250mV to 280mV ................................................................................ 3 12 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 17-May-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS73501DRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS73501DRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS73512DRBR PREVIEW SON DRB 8 3000 TBD Call TI Call TI 250 Lead/Ball Finish MSL Peak Temp (3) TPS73512DRBT PREVIEW SON DRB 8 TBD Call TI Call TI TPS73515DRBR PREVIEW SON DRB 8 TBD Call TI Call TI TPS73515DRBT PREVIEW SON DRB 8 TBD Call TI Call TI TPS73525DRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS73525DRBRG4 ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS73525DRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS73525DRBTG4 ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS73525DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS73525DRVT ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS73533DRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS73533DRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS73533DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS73533DRVT ACTIVE SON DRV 6 250 CU NIPDAU Level-1-260C-UNLIM Green (RoHS & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 17-May-2010 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS73501DRBR SON DRB 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73501DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73525DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73525DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73533DRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73533DRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS73533DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS73533DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS73501DRBR SON DRB 8 3000 346.0 346.0 29.0 TPS73501DRBT SON DRB 8 250 190.5 212.7 31.8 TPS73525DRBR SON DRB 8 3000 346.0 346.0 29.0 TPS73525DRBT SON DRB 8 250 190.5 212.7 31.8 TPS73533DRBR SON DRB 8 3000 346.0 346.0 29.0 TPS73533DRBT SON DRB 8 250 190.5 212.7 31.8 TPS73533DRVR SON DRV 6 3000 195.0 200.0 45.0 TPS73533DRVT SON DRV 6 250 195.0 200.0 45.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DLP® Products www.dlp.com Communications and Telecom www.ti.com/communications DSP dsp.ti.com Computers and Peripherals www.ti.com/computers Clocks and Timers www.ti.com/clocks Consumer Electronics www.ti.com/consumer-apps Interface interface.ti.com Energy www.ti.com/energy Logic logic.ti.com Industrial www.ti.com/industrial Power Mgmt power.ti.com Medical www.ti.com/medical Microcontrollers microcontroller.ti.com Security www.ti.com/security RFID www.ti-rfid.com Space, Avionics & Defense www.ti.com/space-avionics-defense RF/IF and ZigBee® Solutions www.ti.com/lprf Video and Imaging www.ti.com/video Wireless www.ti.com/wireless-apps Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2010, Texas Instruments Incorporated