TS472 Very low noise microphone preamplifier with 2.0V bias output and active low standby mode Features ■ Low noise: 10nV/√Hz typ. equivalent input noise @ F = 1kHz ■ Fully differential input/output ■ 2.2V to 5.5V single supply operation ■ Low power consumption @20dB: 1.8mA ■ Fast start up time @ 0dB: 5ms typ. ■ Low distortion: 0.1% typ. ■ 40kHz bandwidth regardless of the gain ■ Active low standby mode function (1μA max) ■ Low noise 2.0V microphone bias output ■ Available in flip-chip lead-free package and in QFN24 4x4mm package ■ ESD protection (2kV) Flip-chip - 12 bumps Pin Connections (top view) C1 C2 STDBY VCC OUTPUT BIAS GS OUT+ OUT- IN+ IN- GND BYPASS QFN24 Description The TS472 is a differential-input microphone preamplifier optimized for high-performance, PDA and notebook audio systems. This device features an adjustable gain from 0dB to 40dB with excellent power-supply and common-mode rejection ratios. In addition, the TS472 has a very low-noise microphone bias generator of 2V. Pin Connection (top view) It also includes a complete shutdown function, with active low standby mode. Applications ■ Video and photo cameras with sound input ■ Sound acquisition & voice recognition ■ Video conference systems ■ Notebook computers and PDAs September 2006 Rev 4 1/24 www.st.com 24 Contents TS472 Contents 1 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 7 2/24 5.1 Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.2 Higher cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.3 Lower cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.4 Low-noise microphone bias source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.5 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.6 Wake-up time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.7 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.8 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.9 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.10 Demo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.1 Flip-chip package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.2 QFN24 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 TS472 1 Ordering information Ordering information Table 1. Order codes Temperature range Package Packing Marking TS472EIJT -40°C, +85°C Flip-chip Tape & reel 472 TS472IQT -40°C, +85°C QFN24 4x4mm Tape & reel K472 Part number 3/24 Typical application schematic 2 TS472 Typical application schematic Figure 1 shows a typical application schematic for the TS472. Figure 1. Application schematic (flip-chip) Table 2. External component descriptions Components Cin+, Cin- Input coupling capacitors that block the DC voltage at the amplifier input terminal. Cout+, Cout- Output coupling capacitors that block the DC voltage coming from the amplifier output terminal (pins C2 and D2) and determine Lower cut-off frequency. Rout+, Rout- Output load resistors used to charge the output coupling capacitors Cout. These output resistors can be represented by an input impedance of a following stage. Rpos, Rneg Polarizing resistors for biasing of a microphone. Cs Supply bypass capacitor that provides power supply filtering. Cb Bypass pin capacitor that provides half-supply filtering. C1, C2 4/24 Functional description Low pass filter capacitors allowing to cut the high frequency. TS472 3 Absolute maximum ratings Absolute maximum ratings Table 3. Absolute maximum ratings Symbol VCC Vi Parameter Supply voltage (1) Input voltage Value Unit 6 V -0.3 to VCC+0.3 V Toper Operating free air temperature range -40 to + 85 °C Tstg Storage temperature -65 to +150 °C Maximum junction temperature 150 °C Rthja Thermal resistance junction to ambient: Flip-chip QFN24 180 110 °C/W ESD Human body model 2 kV ESD Machine model 200 V Lead temperature (soldering, 10sec) 250 °C Tj 1. All voltages values are measured with respect to the ground pin. Table 4. Operating conditions Symbol VCC A VSTBY Parameter Supply voltage Typical differential gain (GS connected to 4.7kΩ or bias) Standby voltage input: Device ON Device OFF Value Unit 2.2 to 5.5 V 20 dB 1.5 ≤VSTBY ≤VCC GND ≤VSTBY ≤0.4 V Top Operational free air temperature range -40 to +85 °C Rthja Thermal resistance junction to ambient: Flip-chip QFN24 150 60 °C/W 5/24 Electrical characteristics 4 Electrical characteristics Table 5. Electrical characteristics at VCC = 3V with GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit Equivalent input noise voltage density REQ=100Ω at 1KHz 10 nV -----------Hz Total harmonic distortion + noise 20Hz ≤F ≤ 20kHz, Gain=20dB, Vin=50mVRMS 0.1 % Vin Input voltage, Gain=20dB 10 BW Bandwidth @ -3dB Bandwidth @ -1dB pin A3, B3 floating 40 20 en THD+N G Overall output voltage gain (Rgs variable): Minimum gain, Rgs infinite Maximum gain, Rgs=0 Zin 70 mVRMS kHz -3 39.5 -1.5 41 0 42.5 dB Input impedance referred to GND 80 100 120 kΩ RLOAD Resistive load 10 CLOAD Capacitive load ICC Supply current, Gain=20dB ISTBY Standby current PSRR Power supply rejection ratio, Gain=20dB, F=217Hz, Vripple=200mVpp, inputs grounded Differential output Single-ended outputs, Table 6. kΩ 1.8 100 pF 2.4 mA 1 μA dB -70 -46 Bias output: VCC = 3V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit Vout No load condition 1.9 2 2.1 V Rout Output resistance 80 100 120 W Iout Output bias current PSRR 6/24 TS472 Power supply rejection ratio, F=217Hz, Vripple=200mVpp 70 2 mA 80 dB TS472 Electrical characteristics Table 7. Differential RMS noise voltage Input referred noise voltage (μVRMS) Gain (dB) Unweighted filter A-weighted filter Unweighted filter A-weighted filter 0 15 10 15 10 20 3.4 2.3 34 23 40 1.4 0.9 141 91 Table 8. Table 9. Bias output RMS noise voltage Cout (μF) Unweighted filter (μVRMS) A-weighted filter (μVRMS) 1 5 4.4 10 2.2 1.2 SNR (signal to noise ratio), THD+N < 0.5% Unweighted filter (dB) Gain (dB) Note: Output noise voltage (μVRMS) A-weighted filter (dB) VCC=2.2V VCC=3V VCC=5.5V VCC=2.2V VCC=3V VCC=5.5V 0 75 76 76 79 80 80 20 82 83 83 89 90 90 40 70 72 74 80 82 84 Unweighted filter = 20Hz ≤F ≤20kHz 7/24 Electrical characteristics Table 10. TS472 Index of graphics Description Current consumption vs. power supply voltage Figure 2 and Figure 3 Current consumption vs. standby voltage Figure 4 and Figure 5 Standby threshold voltage vs. power supply voltage Figure 6 Frequency response Figure 7 Bias output voltage vs. bias output current Figure 8 Bias output voltage vs. power supply voltage Figure 9 Bias PSRR vs. frequency Differential output PSRR vs. frequency 8/24 Figure Figure 10 and Figure 11 Figure 12 to Figure 15 Single-ended output PSRR vs. frequency Figure 16 Equivalent input noise voltage density Figure 17 Δgain vs. power supply voltage Figure 18 Dgain vs. ambient temperature Figure 19 Maximum input voltage vs. gain, THD+N<1% Figure 20 Maximum input voltage vs. power supply voltage, THD+N<1% Figure 21 THD+N vs. input voltage Figure 22 to Figure 27 THD+N vs. frequency Figure 28 to Figure 29 Transient response Figure 30 to Figure 31 TS472 Electrical characteristics 2.5 2.5 Current Consumption (mA) 3.0 Tamb=85°C 2.0 1.5 Tamb=25°C 1.0 Tamb=-40°C 0.5 No Loads GS floating 0 Figure 4. Current Consumption (mA) Figure 3. 3.0 0.0 1 2 3 4 Power Supply Voltage (V) 5 Current consumption vs. standby voltage Tamb=85°C 0.5 2.0 Vcc=5V 1.0 0.5 No Loads GS floating Tamb = 25°C 0 Figure 6. 1 2 3 Standby Voltage (V) 4 0 1 Current consumption vs. standby voltage Vcc=5V 0.5 30 0.8 20 PSRR (dB) 6 1.0 1.0 0.4 5 Vcc=3V No Loads GS grounded Tamb = 25°C 0 1 Figure 7. 0.6 2 3 4 Power Supply Voltage (V) 1.5 0.0 5 Standby threshold voltage vs. power supply voltage No Loads GS grounded Figure 5. 2.0 Vcc=3V Tamb=-40°C 1.0 2.5 1.5 Tamb=25°C 1.5 0.0 6 Current consumption vs. power supply voltage 2.0 2.5 0.0 Standby Treshold Voltage (V) Current consumption vs. power supply voltage Current Consumption (mA) Current Consumption (mA) Figure 2. 2 3 Standby Voltage (V) 4 5 Frequency response Cb=1μ F, T AMB =25° C, Gain=20dB, Rout=100kΩ 10 no C1,C2 C1,C2=100pF 0 Cin,Cout=100nF 0.2 0.0 C1,C2=220pF -10 Cin,Cout=10nF No Loads Tamb = 25°C 2.2 3 4 Power Supply Voltage (V) 5 5.5 -20 10 100 1000 Frequency (Hz) 10000 100000 9/24 Electrical characteristics Figure 8. TS472 Bias output voltage vs. bias output Figure 9. current 2.2 2.2 Vcc=2.5-6V Tamb=25°C 2.0 Bias Output Voltage (V) Bias Output Voltage (V) Bias output voltage vs. power supply voltage Tamb=85°C 1.8 Tamb=-40°C 1.6 Ibias=0mA 2.0 Ibias=2mA 1.8 Ibias=4mA 1.6 Tamb=25°C 1.4 1.4 0 1 2 3 Bias Output Current (mA) 4 Figure 10. Bias PSRR vs. frequency 4 Power Supply Voltage (V) 5 5.5 Figure 11. Bias PSRR vs. frequency 0 0 Vripple=200mVpp Vcc=3V Cb=1 μ F Tamb =25 ° C -40 Vripple=200mVpp Vcc=5V Cb=1 μ F Tamb=25 ° C -20 PSRR (dB) -20 PSRR (dB) 3 2.2 Bias floating or 1k Ω to GND -60 Bias = 1k Ω to GND -40 -60 -80 -80 -100 -100 Bias floating 50 100 1000 50 10000 20k 100 1000 Frequency (Hz) Frequency (Hz) Figure 12. Differential output PSRR vs. frequency Figure 13. Differential output PSRR vs. frequency 0 PSRR (dB) -20 -30 0 Vripple=200mVpp Inputs grounded Vcc=3V Cb=1 μ F Cin=100nF Tamb=25 ° C -10 -20 GS grounded -40 GS=bias GS floating -50 PSRR (dB) -10 -30 -70 -70 10/24 100 1000 Frequency (Hz) 10000 20k GS grounded -50 -60 50 Vripple=200mVpp Inputs grounded Vcc=5V Cb=1 μ F Cin=100nF Tamb=25 ° C -40 -60 -80 10000 20k -80 50 GS=bias GS floating 100 1000 Frequency (Hz) 10000 20k TS472 Electrical characteristics Figure 14. Differential output PSRR vs. frequency Figure 15. Differential output PSRR vs. frequency 0 0 V RIPPLE=200mV PP , Inputs grounded -40 Cb=1μ F No Cb V CC =3V, Gain=20dB, Cin=1 μ F, T AMB =25° C -20 PSRR (dB) -20 PSRR (dB) V RIPPLE =200mV PP, Inputs grounded V CC =3V, Minimum Gain, Cin=1μ F, T AMB =25 ° C Cb=100nF -60 -40 Cb=1μ F No Cb -60 -80 -80 -100 50 -100 50 Cb=100nF 100 1k Frequency (Hz) 10k 20k Figure 16. Single-ended output PSRR vs. frequency 1k Frequency (Hz) 10k 20k Figure 17. Equivalent input noise voltage density 0 1000 -20 -30 Cin=100nF R EQ=100 Ω Vcc=3V T AMB =25 ° C en (nV/√ Hz) Vripple=200mVpp Inputs grounded Cb=1μ F Cin=100nF Tamb=25° C -10 PSRR (dB) 100 -40 -50 100 10 -60 -70 Vcc=2.2V -80 100 50 Vcc=5V 1000 Frequency (Hz) 1 10 10000 20k Figure 18. Δgain vs. power supply voltage 10k 100k 0.50 F=1kHz Vin=5mV Tamb=25°C 0.25 Maximum Gain 0.6 F=1kHz V IN =5mV 0.00 Δ Gain (dB) Δ Gain (dB) 1k Frequency (Hz) Figure 19. Δgain vs. ambient temperature 1.0 0.8 100 0.4 0.2 -0.25 Maximum Gain -0.50 0.0 Gain=20dB Minimum Gain -0.2 -0.75 Gain=20dB -0.4 2.2 3 4 Power Supply Voltage (V) 5 5.5 -1.00 -40 Minimum Gain -20 0 20 40 Ambient Temperature (°C) 60 80 11/24 Electrical characteristics TS472 Figure 20. Maximum input voltage vs. gain, THD+N<1% Figure 21. Maximum input voltage vs. power supply voltage, THD+N<1% F=1kHz THD+N<1% 100 50 V CC =3V V CC =2.2V 0 T AMB =25°C, F=1kHz, THD+N<1% 140 T AMB =25°C V CC =5.5V Maximum Input Voltage (mVRMS) Maximum Input Voltage (mVRMS) 150 120 100 80 60 10 20 Gain (dB) 30 2.2 4 Power Supply Voltage (V) GS=bias THD+N (%) 1 0.1 GS=bias 0.1 GS grounded GS grounded Tamb=25°C, Vcc=3V, F=100Hz, Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz 0.01 1E-3 0.01 0.01 0.1 0.3 Tamb=25°C, Vcc=5V, F=100Hz, Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz 1E-3 0.01 Input Voltage (V) 0.1 0.3 Input Voltage (V) Figure 24. THD+N vs. input voltage Figure 25. THD+N vs. input voltage 10 10 GS floating GS floating GS=bias GS=bias 1 THD+N (%) 1 THD+N (%) 5.5 GS floating 1 0.1 0.1 GS grounded GS grounded Tamb=25°C, Vcc=3V, F=1kHz, Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz 1E-3 0.01 Input Voltage (V) 12/24 5 10 GS floating THD+N (%) 3 Figure 23. THD+N vs. input voltage 10 0.01 Gain=20dB 20 40 Figure 22. THD+N vs. input voltage Gain=30dB Gain=40dB 40 0 0 Gain=0dB 0.01 0.1 0.3 1E-3 Tamb=25°C, Vcc=5V, F=1kHz, Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz 0.01 Input Voltage (V) 0.1 0.3 TS472 Electrical characteristics Figure 26. THD+N vs. input voltage Figure 27. THD+N vs. input voltage 10 10 GS floating GS floating GS=bias GS grounded 1 THD+N (%) THD+N (%) 1 0.1 GS=bias 0.1 GS grounded 0.01 Tamb=25°C, Vcc=3V, F=20kHz, Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz 1E-3 0.01 Tamb=25°C, Vcc=5V, F=20kHz, Cb=1 μ F, RL=10k Ω , BW=100Hz-120kHz 0.01 0.1 0.3 1E-3 0.01 Input Voltage (V) Figure 28. THD+N vs. frequency 10 Tamb=25°C Vcc=3V RL=10k Ω Cb=1 μ F BW=100Hz-120kHz GS grounded, Vin=20mV 1 Tamb=25 ° C Vcc=5V RL=10k Ω Cb=1 μ F BW=100Hz-120kHz GS=bias, Vin=100mV THD + N (%) THD + N (%) 0.3 Figure 29. THD+N vs. frequency 10 1 50 100 1000 Frequency (Hz) Figure 30. Transient response GS=bias, Vin=100mV GS grounded, Vin=20mV GS floating, Vin=100mV GS floating, Vin=100mV 0.1 0.1 Input Voltage (V) 10000 20k 0.1 50 100 1000 Frequency (Hz) 10000 20k Figure 31. Transient response 13/24 Application information TS472 5 Application information 5.1 Differential configuration principle The TS472 is a full-differential input/output microphone preamplifier. The TS472 also includes a common mode feedback loop that controls the output bias value to average it at VCC/2. This allows the device to always have a maximum output voltage swing, and by consequence, maximize the input dynamic voltage range. The advantages of a full-differential amplifier are: 5.2 ● Very high PSRR (power supply rejection ratio). ● High common mode noise rejection. ● In theory, the filtering of the internal bias by an external bypass capacitor is not necessary. But, to reach maximum performance in all tolerance situations, it is better to keep this option. Higher cut-off frequency The higher cut-off frequency FCH of the microphone preamplifier depends on the external capacitors C1, C2. TS472 has an internal first order low pass filter (R=40kΩ, C=100pF) to limit the highest cutoff frequency on 40kHz (with a 3dB attenuation). By connecting C1, C2 you can decrease FCH by applying the following formula: 1 F CH = --------------------------------------------------------------------------------------------3 – 12 2π ⋅ 40 × 10 ⋅ ( C 1, 2 + 100 × 10 ) Figure 32 below indicates directly the higher cut-off frequency in Hz versus the value of the output capacitors C1, C2 in nF. Figure 32. Higher cut-off frequency vs. output capacitors Higher Cut-off Frequency (kHz) 40 10 1 200 400 600 C1, C2 (pF) 800 1000 For example, FCH is almost 20kHz with C1,2=100pF. 14/24 TS472 Application information 5.3 Lower cut-off frequency The lower cut-off frequency FCL of the microphone preamplifier depends on the input capacitors Cin and output capacitors Cout. These input and output capacitors are mandatory in an application because of DC voltage blocking. The input capacitors Cin in series with the input impedance of the TS472 (100kΩ) are equivalent to a first order high pass filter. Assuming that FCL is the lowest frequency to be amplified (with a 3dB attenuation), the minimum value of Cin is: 1 C in = -----------------------------------------------------3 2π ⋅ F CL ⋅ 100 × 10 The capacitors Cout in series with the output resistors Rout (or an input impedance of the next stage) are also equivalent to a first order high pass filter. Assuming that FCL is the lowest frequency to be amplified (with a 3dB attenuation), the minimum value of Cout is: 1 C out = -----------------------------------------2π ⋅ F CL ⋅ R out Figure 33. Lower cut-off frequency vs. input capacitors Figure 34. Lower cut-off frequency vs. output capacitors 1000 1000 Rout=10kΩ Typical Zin 100 ZinMIN 10 1 10 Cin (nF) 100 Lower Cut-off frequency (Hz) Lower Cut-off frequency (Hz) ZinMAX 100 Rout=100kΩ 10 1 10 100 1000 Cout (nF) Figure 33 and Figure 34 give directly the lower cut-off frequency (with 3dB attenuation) versus the value of the input or output capacitors Note: In case FCL is kept the same for calculation, take into account that the 1st order high-pass filter on the input and the 1st order high-pass filter on the output create a 2nd order highpass filter in the audio signal path with an attenuation of 6dB on FCL and a rolloff of 40dB⁄ decade. 5.4 Low-noise microphone bias source The TS472 provides a very low noise voltage and power supply rejection BIAS source designed for biasing an electret condenser microphone cartridge. The BIAS output is typically set at 2.0 VDC (no load conditions), and can typically source 2mA with respect to drop-out, determined by the internal resistance 100Ω (for detailed load regulation curves see Figure 8). 15/24 Application information 5.5 TS472 Gain settings The gain in the application depends mainly on: ● the sensitivity of the microphone ● the distance to the microphone ● the audio level of the sound ● the desired output level The sensitivity of the microphone is generally expressed in dB/Pa, referenced to 1V/Pa. For example, the microphone used in testing had an output voltage of 6.3mV for a sound pressure of 1 Pa (where Pa is the pressure unit, Pascal). Expressed in dB, the sensitivity is: 20Log(0.0063) = -44 dB/Pa To facilitate the first approach, Table 11 below gives voltages and gains used with a low cost omnidirectional electret condenser microphone of -44dB/Pa. Table 11. Typical TS472 gain vs. distance to the microphone (sensitivity -44dB/Pa) Distance to microphone Microphone output voltage TS472 Gain 1cm 30mVRMS 20 20cm 3mVRMS 100 The gain of the TS472 microphone preamplifier can be set: 1. From -1.5 dB to 41 dB by connecting an external grounded resistor RGS to the GS pin. It allows to adapt more precisely the gain to each application. Table 12. Selected gain vs. gain select resistor Gain (dB) 0 10 20 30 40 RGS (Ω) 470k 27k 4k7 1k 68 Figure 35. Gain in dB vs. gain select resistor Figure 36. Gain in V/V vs. gain select resistor 50 Tamb=25 ° C Tamb=25 ° C 100 40 Gain (V/V) Gain (dB) 30 20 10 10 0 1 -10 10 100 2. 16/24 1k 10k R GS (Ω ) 100k 1M 10 100 1k 10k R GS (Ω ) 100k 1M To 20dB by applying VGS > 1VDC on Gain Select (GS) pin. This setting can help to reduce a number of external components in an application, because 2.0 VDC is provided by TS472 itself on BIAS pin. TS472 Application information Figure 37 below gives other values of the gain vs. voltage applied on GS pin. Figure 37. Gain vs. gain select voltage Tamb=25° C 40 Gain (dB) 20 0 -20 -40 -60 -80 0.2 0.4 0.6 0.8 V GS (V ) 4 5 Wake-up time When the standby is released to put the device ON, a signal appears on the output a few microseconds later, and the bypass capacitor Cb is charged in a few milliseconds. As Cb is directly linked to the bias of the amplifier, the bias will not work properly until the Cb voltage is correct. In the typical application, when a biased microphone is connected to the differential input via the input capacitors (Cin), (and the output signal is in line with the specification), the wake-up time will depend upon the values of the input capacitors Cin and the gain. When gain is lower than 0dB, the wake-up time is determined only by the bypass capacitor Cb, as described above. For a gain superior to 0dB, see Figure 38 below. Figure 38. Wake-up time in the typical application vs. input capacitors 60 50 Wake-up Time (ms) 5.6 0 Tamb = 25°C Vcc=3V Cb=1μ F 40 Maximum Gain Gain=20dB 30 20 10 0 20 40 60 Input capacitors C IN (nF) 80 100 17/24 Application information 5.7 TS472 Standby mode When the standby command is set, the time required to set the output stages (differential outputs and 2.0V bias output) in high impedance and the internal circuitry in shutdown mode is a few microseconds. 5.8 Layout considerations The TS472 has sensitive pins to connect C1, C2 and Rgs. To obtain high power supply rejection and low noise performance, it is mandatory that the layout track to these component is as short as possible. Decoupling capacitors on VCC and bypass pin are needed to eliminate power supply drops. In addition, the capacitor location for the dedicated pin should be as close to the device as possible. 5.9 Single-ended input configuration It’s possible to use the TS472 in a single-ended input configuration. The schematic in Figure 39 provides an example of this configuration. Figure 39. Single ended input typical application Optional C1 VCC Cs 1uF Cin+ A3 B3 TS472 Cout+ A1 IN+ OUT+ C2 B1 IN- OUT- D2 + Electret Mic Vcc C2 U1 C1 Rpos D3 C3 1uF C2 Cout- G BIAS 2.0V GND STDBY C3 Bias C1 A2 B2 BYPASS D1 Cb 1uF Standby Control 18/24 Positive Output Negative Output Cin- GAIN SELECT Rout+ Rout- TS472 5.10 Application information Demo board A demo board for the TS472 is available. For more information about this demo board, please refer to Application Note AN2240, which can be found on www.st.com. Figure 40. PCB top layer Figure 41. PCB bottom layer Figure 42. Component location 19/24 Package mechanical data 6 TS472 Package mechanical data In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com. 6.1 Flip-chip package Figure 43. TS472 footprint recommendation 75µm min. 100μm max. 500μm 500μm Track Φ=400μm typ. 150μm min. Φ=340μm min. 500μm 500μm Φ=250μm Non Solder mask opening Pad in Cu 18μm with Flash NiAu (2-6μm, 0.2μm max.) Figure 44. Pin-out (top view) 3 C1 2 OUTPUT BIAS 1 C2 STDBY VCC GS OUT+ OUT- IN+ IN- GND BYPASS A B C D Balls are underneath 20/24 TS472 Package mechanical data Figure 45. Marking (top view) ■ ST logo ■ Part number: 472 ■ E Lead free bumps ■ Three digits datecode: YWW ■ The dot indicates pin A1 E 472 YWW Figure 46. Flip-chip - 12 bumps 2.1 mm 1.6 mm ■ Die size: 2.1mm x 1.6mm ± 30µm ■ Die height (including bumps): 600µm ■ Bumps diameter: 315µm ±50µm ■ Bump diameter before reflow: 300µm ±10µm ■ Bump height: 250µm ±40µm ■ Die height: 350µm ±20µm ■ Pitch: 500µm ±50µm ■ Coplanarity: 50µm max 0.5mm 0.5mm ∅ 0.315mm 600µm Figure 47. Tape & reel specification (top view) 1.5 4 1 1 A Die size Y + 70µm A 8 Die size X + 70µm 4 All dimensions are in mm User direction of feed 21/24 Package mechanical data 6.2 QFN24 package Figure 48. QFN24 package mechanical data 22/24 TS472 TS472 7 Revision history Revision history Table 13. Document revision history Date Revision Changes 1-Jul-05 1 Initial release corresponding to product preview version. 1-Oct-05 2 First release of fully mature product datasheet. 1-Dec-05 3 Added single-ended input operation in Section 5: Application information. 12-Sep-2006 4 Added QFN package information. Updated curves, added new ones in Section 4: Electrical characteristics. 23/24 TS472 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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