STMICROELECTRONICS TS2012EIJT

TS2012FC
Filter-free flip-chip stereo 2x2.5 W class D audio power amplifer
Features
■
Operates from VCC= 2.5 V to 5.5 V
■
Dedicated standby mode active low for each
channel
■
Output power per channel: 1.15 W @5 V or
0.63 W @ 3.6 V into 8Ω with 1% THD+N max.
■
Output power per channel: 1.85 W @5 V into
4 Ω with 1% THD+N max.
■
Output short-circuit protection
■
Four gain setting steps: 6, 12, 18, 24 dB
■
Low current consumption
■
PSSR: 63 dB typ @ 217 Hz.
■
Fast startup phase: 7.8 ms
■
Thermal shutdown protection
■
Flip-chip 16-bump lead-free package
Flip chip 16 bumps
Pin connections (top view)
Applications
■
Cellular phone
■
PDA
LOUT-
STDBYL
PGND
ROUT-
LOUT+
STDBYR
AGND
ROUT+
PVCC
G1
G0
AVCC
LIN+
INL+
LIN-
RIN-
RIN+
Description
The TS2012 is a fully differential stereo class D
power amplifier able to drive up to 1.15 W into an
8 Ω load at 5 V per channel. It achieves better
efficiency compared to typical class AB audio
amps.
The device has four different gain settings utilizing
2 digital pins: G0 and G1.
Pop and click reduction circuitry provides low
on/off switch noise while allowing the device to
start within 8 ms.
Two standby pins (active low) allow each channel
to be switched off separately.
The TS2012 is available in a flip-chip 16-bump
lead-free package.
April 2008
Rev 3
1/31
www.st.com
31
Contents
TS2012FC
Contents
1
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
2
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
3.1
Electrical characteristics tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2
Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1
Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.2
Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.3
Common mode feedback loop limitations . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.4
Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.5
Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.6
Wake-up time (tWU) and shutdown time (tSTBY) . . . . . . . . . . . . . . . . . . . . 23
4.7
Consumption in shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.8
Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.9
Output filter considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.10
Short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.11
Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31
TS2012FC
1
Absolute maximum ratings and operating conditions
Absolute maximum ratings and operating conditions
Table 1.
Absolute maximum ratings
Symbol
VCC
Vin
Parameter
Value
Unit
6
V
GND to VCC
V
Supply voltage (1)
Input voltage
(2)
Toper
Operating free air temperature range
-40 to + 85
°C
Tstg
Storage temperature
-65 to +150
°C
150
°C
200
°C/W
Tj
Rthja
Pd
Maximum junction temperature
Thermal resistance junction to ambient
(3)
Power dissipation
Internally
HBM: human body model(5)
ESD
MM: machine model
2
kV
200
V
200
mA
GND to VCC
V
260
°C
(6)
Latch-up Latch-up immunity
VSTBY
Standby pin maximum voltage
Lead temperature (soldering, 10sec)
Output short circuit protection
limited(4)
(7)
1. All voltage values are measured with respect to the ground pin.
2. The magnitude of the input signal must never exceed VCC + 0.3V / GND - 0.3V.
3. The device is protected in case of over temperature by a thermal shutdown active @ 150°C.
4. Exceeding the power derating curves during a long period will cause abnormal operation.
5. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
6. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two
pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin
combinations with other pins floating.
7. Implemented short-circuit protection protects the amplifier against damage by short-circuit between
positive and negative outputs of each channel and between outputs and ground.
3/31
Absolute maximum ratings and operating conditions
Table 2.
Operating conditions
Symbol
Parameter
VCC
Supply voltage
Vin
Input voltage range
Vic
VSTBY
TS2012FC
Input common mode voltage
(1)
Standby voltage input (2)
Device ON
Device in STANDBY(3)
Value
Unit
2.5 to 5.5
V
GND to VCC
V
GND+0.5V to VCC-0.9V
V
1.4 ≤ VSTBY ≤ VCC
GND ≤ VSTBY ≤ 0.4
V
≥4
Ω
RL
Load resistor
VIH
GO, G1 - high level input voltage(4)
1.4 ≤ VIH ≤ VCC
V
VIL
GO, G1 - low level input voltage
GND ≤ VIL ≤ 0.4
V
90
°C/W
Rthja
Thermal resistance junction to ambient (5)
1. I Voo I ≤ 40 mV max with all differential gains except 24 dB. For 24 dB gain, input decoupling capacitors are
mandatory.
2. Without any signal on standby pin, the device is in standby (internal 300 kΩ +/-20% pull-down resistor).
3. Minimum current consumption is obtained when VSTBY = GND.
4. Between G0, G1pins and GND, there is an internal 300 kΩ (+/-20%) pull-down resistor. When pins are
floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected
(HiZ input).
5. With a 4-layer PCB.
4/31
TS2012FC
Typical application
2
Typical application
Figure 1.
Typical application schematics
Cs2
0.1uF
VCC
Cs1
1uF
Gain Select
Control
TS2012
A2
Differential
Left Input
D2
Input capacitors
are optional
AVCC
Left IN+
PVCC
Cin
A1
Left IN-
Lout+
A3
Lout-
A4
Rout+
D3
Bridge Rout-
D4
Lin+
H
Gain
Cin
B1
Lin-
C2
G0
B2
G1
D1
Rin+
PWM
Select
Left speaker
Bridge
Oscillator
Differential
Right Input
Right IN+
H
Gain
Cin
C1
Rin-
B4
STBYL
B3
STBYR
PWM
Select
Right speaker
Cin
Right IN-
Standby
Control
Protection
Circuit
C4
PGND
C3
AGND
Standby Control
Cs2
0.1uF
VCC
Cs1
1uF
Gain Select
Control
TS2012
A2
D2
Input capacitors
are optional
Differential
Left Input
AVCC
Left IN+
PVCC
Cin
A1
Left IN-
Lout+
A3
Lout-
A4
Rout+
D3
Bridge Rout-
D4
Lin+
H
Gain
Cin
B1
Lin-
C2
G0
B2
G1
D1
Rin+
PWM
Select
Bridge
LC Output Filter
Load
LC Output Filter
Load
Oscillator
Differential
Right Input
Right IN+
H
Gain
Cin
C1
Rin-
B4
STBYL
B3
STBYR
PWM
Select
Cin
Protection
Circuit
AGND
PGND
C4
Standby
Control
C3
Right IN-
4Ω LC Output Filter
Standby Control
8Ω LC Output Filter
30μH
15μH
1μ F
2μ F
15μH
2μ F
30μH
1μ F
5/31
Typical application
Table 3.
TS2012FC
External component descriptions
Components
CS1, CS2
Supply capacitor that provides power supply filtering.
Input coupling capacitors (optional) that block the DC voltage at the amplifier input
terminal. The capacitors also form a high pass filter with Zin
(Fcl = 1 / (2 x π x Zin x Cin)). Be aware that value of Zin is changing with gain setting.
Cin
Table 4.
6/31
Functional description
Pin descriptions
Pin number
Pin name
Pin description
A1
Lin+
A2
PVCC
Power supply voltage
A3
Lout+
Left channel positive output
A4
Lout-
Left channel negative output
B1
Lin-
Left channel negative differential input
B2
G1
Gain select pin (MSB)
B3
STBYR
Standby pin (active low) for right channel output
B4
STBYL
Standby pin (active low) for left channel output
C1
Rin-
Right channel negative differential input
C2
G0
Gain select pin (LSB)
C3
AGND
Analog ground
C4
PGND
Power ground
D1
Rin+
D2
AVCC
Analog supply voltage
D3
Rout+
Right channel positive output
D4
Rout-
Right channel negative output
Left channel positive differential input
Right channel positive differential input
TS2012FC
Electrical characteristics
3
Electrical characteristics
3.1
Electrical characteristics tables
Table 5.
VCC = +5V, GND = 0V, Vic=2.5V, Tamb = 25°C (unless otherwise specified)
Symbol
ICC
ISTBY
Parameters and test conditions
Typ.
Max.
Unit
Supply current
No input signal, no load, both channels
5
7
mA
Standby current
No input signal, VSTBY = GND
1
2
µA
25
mV
Voo
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω
Po
Output power
THD + N = 1% max, f = 1kHz, RL = 4Ω
THD + N = 1% max, f = 1kHz, RL = 8Ω
THD + N = 10% max, f = 1kHz, RL = 4Ω
THD + N = 10% max, f = 1kHz, RL = 8Ω
THD + N
Total harmonic distortion + noise
Po = 0.8W, G = 6dB, f =1kHz, RL = 8Ω
Efficiency
Efficiency per channel
Po = 1.85W, RL = 4Ω +15µH
Po = 1.16 W, RL = 8Ω+15µH
PSRR
Crosstalk
CMRR
Min.
1.85
1.15
2.5
1.6
W
0.5
%
78
88
%
Power supply rejection ratio with inputs grounded
Cin=1µF (1),f = 217Hz, RL = 8Ω, Gain=6dB,
Vripple = 200mVpp
65
dB
Channel separation
Po = 0.9W, G = 6dB, f =1kHz, RL = 8Ω
90
dB
Common mode rejection ratio
Cin=1µF, f = 217Hz, RL = 8Ω, Gain=6dB,
ΔVICM = 200mVpp
63
dB
Gain value with no load
G1 = G0 = VIL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = VIL
G1 = G0 = VIH
5.5
11.5
17.5
23.5
6
12
18
24
6.5
12.5
18.5
24.5
Single-ended input impedance
Referred to ground
Gain = 6dB
Gain = 12dB
Gain = 18dB
Gain = 24dB
24
24
12
6
30
30
15
7.5
36
36
18
9
kΩ
FPWM
Pulse width modulator base frequency
190
280
370
kHz
SNR
Signal to noise ratio (A-weighting)
Po = 1.1W, G = 6dB, RL = 8Ω
Gain
Zin
99
dB
dB
7/31
Electrical characteristics
Table 5.
Symbol
tWU
tSTBY
VN
TS2012FC
VCC = +5V, GND = 0V, Vic=2.5V, Tamb = 25°C (unless otherwise specified) (continued)
Parameters and test conditions
Min.
Typ.
Max.
Unit
Total wake-up time
9
13
16.5
ms
Standby time(2)
11
15.8
20
ms
(2)
Output voltage noise f = 20Hz to 20kHz, RL=8Ω
Unweighted (filterless, G=6dB)
A-weighted (filterless, G=6dB)
Unweighted (with LC output filter, G=6dB)
A-weighted (with LC output filter, G=6dB)
Unweighted (filterless, G=24dB)
A-weighted (filterless, G=24dB)
Unweighted (with LC output filter, G=24dB)
A-weighted (with LC output filter, G=24dB)
61
31
59
31
87
52
87
53
µVRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz.
2. See Section 4.6: Wake-up time (tWU) and shutdown time (tSTBY) on page 23
8/31
TS2012FC
Table 6.
Electrical characteristics
VCC = +3.6V, GND = 0V, Vic=1.8V, Tamb = 25°C (unless otherwise specified)
Symbol
ICC
ISTBY
Parameter
Typ.
Max.
Unit
Supply current
No input signal, no load, both channels
3.5
5.5
mA
Standby current
No input signal, VSTBY = GND
0.7
2
µA
25
mV
Voo
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω
Po
Output power
THD + N = 1% max, f = 1kHz, RL = 4Ω
THD + N = 1% max, f = 1kHz, RL = 8Ω
THD + N = 10% max, f = 1kHz, RL = 4Ω
THD + N = 10% max, f = 1kHz, RL = 8Ω
THD + N
Total harmonic distortion + noise
Po = 0.45W, G = 6dB, f =1kHz, RL = 8Ω
Efficiency
Efficiency per channel
Po = 0.96W, RL = 4Ω +15µH
Po = 0.63W, RL = 8Ω+15µH
PSRR
Crosstalk
CMRR
Min.
0.96
0.63
1.3
0.8
W
0.35
%
78
88
%
Power supply rejection ratio with inputs grounded
Cin=1µF (1),f = 217Hz, RL = 8Ω, Gain=6dB,
Vripple = 200mVpp
65
dB
Channel separation
G = 6dB, f =1kHz, RL = 8Ω
90
Common mode rejection ratio
Cin=1µF, f = 217Hz, RL = 8Ω, Gain=6dB,
ΔVICM = 200mVpp
62
Gain value with no load
G1 = G0 = VIL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = VIL
G1 = G0 = VIH
dB
5.5
11.5
17.5
23.5
6
12
18
24
6.5
12.5
18.5
24.5
Single-ended input impedance
Referred to ground
Gain = 6dB
Gain = 12dB
Gain = 18dB
Gain = 24dB
24
24
12
6
30
30
15
7.5
36
36
18
9
kΩ
FPWM
Pulse width modulator base frequency
190
280
370
kHz
SNR
Signal-to-noise ratio (A-weighting)
Po = 0.6W, G = 6dB, RL = 8Ω
tWU
Total wake-up time(2)
Gain
Zin
tSTBY
Standby
time(2)
96
dB
dB
7.5
11.3
15
ms
10
13.8
18
ms
9/31
Electrical characteristics
Table 6.
Symbol
VN
TS2012FC
VCC = +3.6V, GND = 0V, Vic=1.8V, Tamb = 25°C (unless otherwise specified) (continued)
Parameter
Output voltage noise f = 20Hz to 20kHz, RL=8Ω
Unweighted (filterless, G=6dB)
A-weighted (filterless, G=6dB)
Unweighted (with LC output filter, G=6dB)
A-weighted (with LC output filter, G=6dB)
Unweighted (filterless, G=24dB)
A-weighted (filterless, G=24dB)
Unweighted (with LC output filter, G=24dB)
A-weighted (with LC output filter, G=24dB)
Min.
Typ.
54
28
52
27
80
50
79
49
Max.
Unit
µVRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz.
2. See Section 4.6: Wake-up time (tWU) and shutdown time (tSTBY) on page 23
10/31
TS2012FC
Table 7.
Electrical characteristics
VCC= +2.5V, GND= 0V, Vic=1.25V, Tamb= 25°C (unless otherwise specified)
Symbol
ICC
ISTBY
Parameter
Typ.
Max.
Unit
Supply current
No input signal, no load, both channels
2.8
4
mA
Standby current
No input signal, VSTBY = GND
0.45
2
µA
25
mV
Voo
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω
Po
Output power
THD + N = 1% max, f = 1kHz, RL = 4Ω
THD + N = 1% max, f = 1kHz, RL = 8Ω
THD + N = 10% max, f = 1kHz, RL = 4Ω
THD + N = 10% max, f = 1kHz, RL = 8Ω
THD + N
Total harmonic distortion + noise
Po = 0.2W, G = 6dB, f =1kHz, RL = 8Ω
Efficiency
Efficiency per channel
Po = 0.45W, RL = 4Ω +15µH
Po = 0.3W, RL = 8Ω+15µH
PSRR
Crosstalk
CMRR
Min.
0.45
0.3
0.6
0.38
W
0.2
%
78
87
%
Power supply rejection ratio with inputs grounded
Cin=1µF (1),f = 217Hz, RL = 8Ω, Gain=6dB,
Vripple = 200mVpp
65
dB
Channel separation
G = 6dB, f =1kHz, RL = 8Ω
90
Common mode rejection ratio
Cin=1µF, f = 217Hz, RL = 8Ω, Gain=6dB,
ΔVICM = 200mVpp
62
Gain value with no load
G1 = G0 = VIL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = VIL
G1 = G0 = VIH
dB
5.5
11.5
17.5
23.5
6
12
18
24
6.5
12.5
18.5
24.5
Single-ended input impedance
Referred to ground
Gain = 6dB
Gain = 12dB
Gain = 18dB
Gain = 24dB
24
24
12
6
30
30
15
7.5
36
36
18
9
kΩ
FPWM
Pulse width modulator base frequency
190
280
370
kHz
SNR
Signal-to-noise ratio (A-weighting)
Po = 0.28W, G = 6dB, RL = 8Ω
tWU
Total wake-up time(2)
Gain
Zin
tSTBY
Standby
time(2)
93
dB
dB
3
7.8
12
ms
8
12
16
ms
11/31
Electrical characteristics
Table 7.
Symbol
VN
TS2012FC
VCC= +2.5V, GND= 0V, Vic=1.25V, Tamb= 25°C (unless otherwise specified) (continued)
Parameter
Output voltage noise f = 20Hz to 20kHz, RL=8Ω
Unweighted (filterless, G=6dB)
A-weighted (filterless, G=6dB)
Unweighted (with LC output filter, G=6dB)
A-weighted (with LC output filter, G=6dB)
Unweighted (filterless, G=24dB)
A-weighted (filterless, G=24dB)
Unweighted (with LC output filter, G=24dB)
A-weighted (with LC output filter, G=24dB)
Min.
Typ.
51
26
49
26
77
49
76
48
Max.
Unit
µVRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz.
2. See Section 4.6: Wake-up time (tWU) and shutdown time (tSTBY) on page 23
12/31
TS2012FC
3.2
Electrical characteristics
Electrical characteristic curves
The graphs shown in this section use the following abbreviations:
●
RL+ 15 µH or 30 µH = pure resistor + very low series resistance inductor
●
Filter = LC output filter (1 µF+ 30 µH for 4 Ω and 0.5 µF+15 µH for 8Ω)
All measurements are done with CS1=1 µF and CS2=100 nF (see Figure 2), except for the
PSRR where CS1 is removed (see Figure 3).
Figure 2.
Test diagram for measurements
VCC
Cs1
1μ F
GND
Cs2
100nF
GND
RL
4 or 8 Ω
Cin
In+
Out+
15μH or 30μ H
1/2 TS2012
In-
or
LC Filter
5th order
50kHz
low-pass filter
Out-
Cin
GND
Audio M easurement
Bandwith < 30kHz
13/31
Electrical characteristics
Figure 3.
TS2012FC
Test diagram for PSRR measurements
VCC
Cs2
100nF
20Hz to 20kHz
Vripple
GND
1μ F
Cin
Vcc
GND
RL
4 or 8 Ω
Out+
In+
15μH or 30μ H
1/2 TS2012
In-
or
50kHz
LC Filter
low-pass filter
Out-
Cin
1μ F
GND
GND
5th order
50kHz
low-pass filter
14/31
reference
5th order
RMS Selective Measurement
Bandwith =1% of Fmeas
TS2012FC
Electrical characteristics
Figure 4.
6
Current consumption vs. power
supply voltage
Figure 5.
Current consumption vs. standby
voltage (one channel)
3
No load
Tamb = 25 ° C
Vcc=5V
Current Consumption (mA)
Both channels active
4
One channel active
3
2
1
One channel active
1
0
0
1
2
3
4
5
Vcc=2.5V
No load
Tamb = 25 ° C
0
1
2
Figure 6.
3
4
Efficiency vs. output power
(one channel)
Figure 7.
100
Efficiency vs. output power
(one channel)
100
1.0
0.50
0.9
0.6
0.5
Power dissipation
0.4
0.3
20
Figure 8.
0.4
0.8
1.2
1.6
Output Power (W)
Vcc = 5V
RL = 4 Ω + 16 μ H 0.2
F = 1kHz
0.1
THD+N ≤ 10%
0.0
2.0
2.4
Efficiency (%)
0.7
Efficiency
60
0
0.0
0.45
80
0.8
Dissipated Power (W)
Efficiency (%)
80
40
0.40
0.30
0.25
Power dissipation
40
20
0.2
Figure 9.
0.4
0.6
0.8
Output Power (W)
0.22
80
0.16
0.14
0.12
Power dissipation
0.10
0.08
Vcc = 2.5V
RL = 4 Ω + 16 μ H
F = 1kHz
THD+N ≤ 10%
20
0.1
0.2
0.3
0.4
Output Power (W)
0.5
0.06
0.04
Efficiency
Efficiency (%)
Efficiency
60
Dissipated Power (W)
Efficiency (%)
0.18
0
0.0
80
0.20
60
Power dissipation
40
20
0.02
0.00
0.6
0
0.0
0.2
0.20
0.15
Vcc = 3.6V
RL = 4 Ω + 16 μ H 0.10
F = 1kHz
0.05
THD+N ≤ 10%
0.00
1.0
1.2
1.4
Efficiency vs. output power
(one channel)
100
0.24
0.35
Efficiency
60
0
0.0
Efficiency vs. output power
(one channel)
100
40
5
Standby Voltage (V)
Power Supply Voltage (V)
Dissipated Power (W)
0
Vcc=3.6V
2
0.4
0.6
0.8
1.0
Output Power (W)
0.30
0.28
0.26
0.24
0.22
0.20
0.18
0.16
0.14
0.12
0.10
0.08
Vcc = 5V
RL = 8 Ω + 16 μ H 0.06
0.04
F = 1kHz
0.02
THD+N ≤ 10%
0.00
1.2
1.4
1.6
Dissipated Power (W)
Current Consumption (mA)
5
15/31
Electrical characteristics
TS2012FC
Figure 10. Efficiency vs. output power
(one channel)
Figure 11. Efficiency vs. output power
(one channel)
0.15
100
60
Power dissipation
40
0.05
Vcc = 3.6V
RL = 8 Ω + 16 μ H
F = 1kHz
THD+N ≤ 10%
20
0
0.0
0.1
0.2
0.3
0.4
0.5
0.6
Output Power (W)
0.7
0.8
0.06
Efficiency (%)
0.10
-20
-30
0
0.00
-20
-30
PSRR (dB)
PSRR (dB)
G=+24dB
G=+18dB
G=+6dB
1000
Frequency (Hz)
G=+6dB
G=+12dB
1000
10000
Figure 15. PSRR vs. common mode input
voltage
0
Vcc = 2.5V
Vripple = 200mVpp
Cin = 10 μ F
RL = 8 Ω + 16 μ H
Tamb = 25 ° C
Vcc = 5V
Vripple = 200mVpp
F = 217Hz
RL = 8 Ω + 16 μ H
Tamb = 25 ° C
-10
-20
-30
G=+24dB
-50
100
Frequency (Hz)
PSRR (dB)
PSRR (dB)
G=+18dB
-60
10000
-40
G=+18dB
-60
G=+24dB
-40
G=+18dB
-50
-60
-70
-70
-80
-80
G=+6dB
G=+12dB
100
1000
G=+12dB
-90
-100
Frequency (Hz)
16/31
G=+24dB
-50
-100
100
0
-100
0.00
0.40
-90
Figure 14. PSRR vs. frequency
-90
0.35
-40
-80
G=+12dB
-90
-30
0.30
-70
-70
-20
0.15 0.20 0.25
Output Power (W)
Vcc = 3.6V
Vripple = 200mVpp
Cin = 10 μ F
RL = 8 Ω + 16 μ H
Tamb = 25 ° C
-10
-60
-10
0.10
0
Vcc = 5V
Vripple = 200mVpp
Cin = 10 μ F
RL = 8 Ω + 16 μ H
Tamb = 25 ° C
-50
-100
0.05
0.02
Figure 13. PSRR vs. frequency
-40
-80
Vcc = 2.5V
RL = 8 Ω + 16 μ H
F = 1kHz
THD+N ≤ 10%
20
0
-10
0.04
Power dissipation
40
0.00
0.9
Figure 12. PSRR vs. frequency
Efficiency
60
Dissipated Power (W)
80
Efficiency
Dissipated Power (W)
Efficiency (%)
80
0.08
100
10000
0
1
2
G=+6dB
3
Common Mode Input Voltage (V)
4
5
TS2012FC
Electrical characteristics
Figure 16. PSRR vs. common mode input
voltage
Figure 17. PSRR vs. common mode input
voltage
0
-20
PSRR (dB)
-30
0
Vcc = 3.6V
Vripple = 200mVpp
F = 217Hz
RL = 8 Ω + 16 μ H
Tamb = 25°C
Vcc = 2.5V
Vripple = 200mVpp
F = 217Hz
RL = 8 Ω + 16 μ H
Tamb = 25 ° C
-10
-20
G=+24dB
-40
-30
PSRR (dB)
-10
G=+18dB
-50
-60
-70
-40
G=+18dB
-50
-60
-70
-80
-80
G=+12dB
-90
-100
0.0
0.5
1.0
1.5
G=+6dB
2.0
2.5
-90
3.0
G=+12dB
-100
0.0
3.5
Common Mode Input Voltage (V)
-20
-30
G=+18dB
G=+24dB
-60
-70
-100
-40
G=+18dB
-50
G=+24dB
-60
-80
G=+6dB
100
G=+12dB
1000
G=+6dB
-90
-100
10000
G=+12dB
100
1000
Frequency (Hz)
Figure 21. CMRR vs. common mode input
voltage
0
-20
0
Vcc = 2.5V
Vripple = 200mVpp
Cin = 10 μ F
RL = 8 Ω + 15 μ H
Tamb = 25 ° C
-20
-30
-40
-50
G=+24dB
G=+18dB
-60
-70
-90
-40
Vcc=3.6V
Vcc=5V
-50
Vcc=2.5V
-60
-70
-80
-80
-100
Vripple = 200mVpp
F = 217Hz, G = +6dB
RL = 8 Ω + 15 μ H
Tamb = 25 ° C
-10
CMRR (dB)
CMRR (dB)
-30
10000
Frequency (Hz)
Figure 20. CMRR vs. frequency
-10
2.5
-70
-80
-90
2.0
Vcc = 3.6V
Vripple = 200mVpp
Cin = 10 μ F
RL = 8 Ω + 15 μ H
Tamb = 25 ° C
-10
-40
-50
1.5
0
Vcc = 5V
Vripple = 200mVpp
Cin = 10 μ F
RL = 8 Ω + 15 μ H
Tamb = 25 ° C
CMRR (dB)
CMRR (dB)
-30
1.0
Figure 19. CMRR vs. frequency
0
-20
0.5
G=+6dB
Common Mode Input Voltage (V)
Figure 18. CMRR vs. frequency
-10
G=+24dB
G=+6dB
G=+12dB
-90
-100
100
1000
Frequency (Hz)
10000
0
1
2
3
4
5
Common Mode Input Voltage (V)
17/31
Electrical characteristics
TS2012FC
Figure 22. CMRR vs. common mode input
voltage
Figure 23. CMRR vs. common mode input
voltage
0
0
Vripple = 200mVpp
F = 217Hz, G = +12dB
RL = 8 Ω + 15 μ H
Tamb = 25 ° C
-10
-20
-30
-30
-50
CMRR (dB)
CMRR (dB)
-20
Vcc=3.6V
-40
Vcc=5V
Vcc=2.5V
-60
-60
-70
-80
-90
-90
-100
-100
2
3
4
5
0
1
Common Mode Input Voltage (V)
2
3
4
5
Common Mode Input Voltage (V)
Figure 24. CMRR vs. common mode input
voltage
Figure 25. THD+N vs. output power
10
0
F = 1kHz
RL = 4 Ω + 15 μ H
G = +6dB
BW < 30kHz
1 Tamb = 25 ° C
Vripple = 200mVpp
F = 217Hz, G = +24dB
RL = 8 Ω + 15 μ H
Tamb = 25 ° C
-10
-20
Vcc=5V
THD + N (%)
Vcc=3.6V
-30
CMRR (dB)
Vcc=5V
Vcc=3.6V
-50
-80
1
Vcc=2.5V
-40
-70
0
Vripple = 200mVpp
F = 217Hz, G = +18dB
RL = 8 Ω + 15 μ H
Tamb = 25 ° C
-10
Vcc=2.5V
-40
-50
Vcc=5V
Vcc=3.6V
0.1
-60
Vcc=2.5V
-70
-80
0
1
2
3
4
0.01
0.01
5
0.1
Common Mode Input Voltage (V)
Figure 26. THD+N vs. output power
Figure 27. THD+N vs. frequency
10
10
Vcc=5V
Vcc=3.6V
0.1
0.1
Vcc=2.5V
0.01
0.01
Vcc=5V, Po=800mW
Vcc=3.6V, Po=450mW
Vcc=5V, Po=200mW
0.1
Output power (W)
18/31
RL = 8 Ω + 15 μ H
G = +6dB
BW < 30kHz
Tamb = 25 ° C
1
THD + N (%)
THD + N (%)
1
F = 1kHz
RL = 8 Ω + 15 μ H
G = +6dB
BW < 30kHz
Tamb = 25 ° C
1
Output power (W)
1
0.01
100
1000
Frequency (Hz)
10000
TS2012FC
Electrical characteristics
Figure 28. THD+N vs. frequency
0
RL = 8 Ω + 15 μ H
G = +6dB
BW < 30kHz
Tamb = 25 ° C
-10
-20
Vcc=5V, Po=800mW
THD + N (%)
1
0.1
Vcc=3.6V, Po=450mW
Crosstalk Level (dB)
10
Figure 29. Crosstalk vs. frequency
-30
RL = 4 Ω + 15 μ H
Cin = 1 μ F
G = +6dB
Tamb = 25 ° C
-40
-50
-60
-70
Vcc=5V
Vcc=2.5V
-80
-90
-100
Vcc=5V, Po=200mW
Vcc=3.6V
-110
0.01
-120
100
1000
100
10000
1000
Frequency (Hz)
Figure 30. Crosstalk vs. frequency
Crosstalk Level (dB)
-20
-30
Figure 31. Output power vs. power supply
voltage
2.0
RL = 8 Ω + 15 μ H
Cin = 1 μ F
G = +6dB
Tamb = 25 ° C
Output power at 1% THD + N (mW)
0
-10
-40
-50
-60
-70
Vcc=2.5V
Vcc=5V
-80
-90
-100
-110
-120
Vcc=3.6V
100
1000
F = 1kHz
1.8 BW < 30kHz
1.6 Tamb = 25 ° C
1.4
1.2
RL=4 Ω +15 μ H
1.0
0.8
0.6
RL=8 Ω +15 μ H
0.4
0.2
0.0
2.5
10000
3.0
3.5
Vcc (V)
RL=8 Ω +15 μ H
4.0
4.5
5.0
Figure 33. Power derating curves
Flip-Chip Package Power Dissipation (W)
Figure 32. Output power vs. power supply
voltage
2.6
2.4 F = 1kHz
BW < 30kHz
2.2
Tamb = 25 ° C
2.0
1.8
RL=4 Ω +15 μ H
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.5
3.0
3.5
4.0
Supply voltage (V)
Frequency (Hz)
Output power at 10% THD + N (W)
10000
Frequency (Hz)
4.5
5.0
1.6
1.4
With a 4-layer PCB
1.2
1.0
0.8
0.6
0.4
No Heat sink
AMR value
0.2
0.0
0
25
50
75
100
125
150
Ambiant Temperature (° C)
19/31
Electrical characteristics
Figure 34. Startup and shutdown phase
VCC= 5V, G= 6dB, Cin= 1µF, inputs
grounded
TS2012FC
Figure 35. Startup and shutdown phase
VCC= 5V, G= 6dB, Cin= 1µF,
Vin= 2Vpp, F= 500Hz
Out+
Out+
Out-
Out-
Standby
Standby
Out+ - OutOut+ - Out-
20/31
TS2012FC
Application information
4
Application information
4.1
Differential configuration principle
The TS2012 is a monolithic fully-differential input/output class D power amplifier. The
TS2012 also includes a common-mode feedback loop that controls the output bias value to
average it at VCC/2 for any DC common mode input voltage. This allows the device to
always have a maximum output voltage swing, and by consequence, maximize the output
power. Moreover, as the load is connected differentially compared with a single-ended
topology, the output is four times higher for the same power supply voltage.
The advantages of a full-differential amplifier are:
4.2
●
High PSRR (power supply rejection ratio)
●
High common mode noise rejection
●
Virtually zero pop without additional circuitry, giving a faster start-up time compared
with conventional single-ended input amplifiers
●
Easier interfacing with differential output audio DAC
●
No input coupling capacitors required thanks to common mode feedback loop
Gain settings
In the flat region of the frequency-response curve (no input coupling capacitor or internal
feedback loop + load effect), the differential gain can be set to 6, 12 18, or 24 dB depending
on the logic level of the G0 and G1 pins, as shown in Table 8.
Table 8.
Gain settings with G0 and G1 pins
G1
G0
Gain (dB)
Gain (V/V)
0
0
6
2
0
1
12
4
1
0
18
8
1
1
24
16
Note:
Between pins G0, G1 and GND there is an internal 300 kΩ (+/-20%) resistor. When the pins
are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are
disconnected (HiZ input).
4.3
Common mode feedback loop limitations
As explained previously, the common mode feedback loop allows the output DC bias voltage
to be averaged at VCC/2 for any DC common mode bias input voltage.
Due to the Vic limitation of the input stage (see Table 2: Operating conditions on page 4), the
common mode feedback loop can fulfil its role only within the defined range.
21/31
Application information
4.4
TS2012FC
Low frequency response
If a low frequency bandwidth limitation is required, it is possible to use input coupling
capacitors. In the low frequency region, the input coupling capacitor Cin starts to have an
effect. Cin forms, with the input impedance Zin, a first order high-pass filter with a -3 dB cutoff frequency (see Table 5 to Table 7):
1
F CL = ------------------------------------------2 ⋅ π ⋅ Z in ⋅ C in
So, for a desired cut-off frequency FCL, Cin is calculated as follows:
1
C in = ---------------------------------------------2 ⋅ π ⋅ Z in ⋅ F CL
with FCL in Hz, Zin in Ω and Cin in F.
The input impedance Zin is for the whole power supply voltage range and it changes with the
gain setting. There is also a tolerance around the typical values (see Table 5 to Table 7).
Figure 36. Cut-off frequency vs. input capacitor
Low -3dB Cut Off Frequency (Hz)
Tamb=25 ° C
100
G=24dB
Zin=7.5k Ω typ.
10
G=18dB
Zin=15k Ω typ.
G=6dB, G=12dB
Zin=30k Ω typ.
1
0.1
1
Input Capacitor Cin (μ F)
4.5
Decoupling of the circuit
Power supply capacitors, referred to as CS1 and CS2 are needed to correctly bypass the
TS2012.
The TS2012 has a typical switching frequency of 280 kHz and output fall and rise time about
5 ns. Due to these very fast transients, careful decoupling is mandatory.
A 1 µF ceramic capacitor (CS1) between PVCC and PGND and one additional ceramic
capacitor 0.1 µF (CS2) are enough. A 1 µF capacitor must be located as close as possible to
the device PVCC pin in order to avoid any extra parasitic inductance or resistance created
by a long track wire. Parasitic loop inductance, in relation with di/dt, introduces overvoltage
that decreases the global efficiency of the device and may cause, if this parasitic inductance
22/31
TS2012FC
Application information
is too high, a TS2012 breakdown. For filtering low frequency noise signals on the power line,
you can use a capacitor a CS1 capacitor of 4.7 µF or greater.
In addition, even if a ceramic capacitor has an adequate high frequency ESR (equivalent
series resistance) value, its current capability is also important. A 0603 size is a good
compromise, particularly when a 4 Ω load is used.
Another important parameter is the rated voltage of the capacitor. A 1 µF/6.3 V capacitor
used at 5 V, loses about 50% of its value. With a power supply voltage of 5 V, the decoupling
value, instead of 1 µF, could be reduced to 0.5 µF. As CS has particular influence on the
THD+N in the medium to high frequency region, this capacitor variation becomes decisive.
In addition, less decoupling means higher overshoots which can be problematic if they reach
the power supply AMR value (6 V).
4.6
Wake-up time (tWU) and shutdown time (tSTBY)
During the wake-up sequence when the standby is released to set the device ON, there is a
delay. The wake-up sequence of the TS2012 consists of two phases. During the first phase
tWU-A, a digitally generated delay mutes the outputs. Then, the gain increasing phase tWU-A
begins. The gain increases smoothly form the mute state to the preset gain selected by the
digital pins G0 and G1. This startup sequence allows to avoid any pop noise during startup
of the amplifier. See Figure 37: Wake-up phase.
Figure 37. Wake-up phase.
STBY
Level
HI
LO
STBY
STBY
Time
Gain increasing
Gain
Preset gain
G = 24dB
G = 18dB
G = 12dB
G = 6dB
Mute
Mute
tWU-A
tWU-B
Time
tWU
When the standby command is set, the time required to set the output stage into high
impedance and to put the internal circuitry in shutdown mode is called the standby time.
This time is used to decrease the gain from its nominal value set by the digital pins G0 and
G1 to mute and avoid any pop noise during shutdown. The gain decreases smoothly until
the outputs are muted. See Figure 38: Shutdown phase
23/31
Application information
TS2012FC
Figure 38. Shutdown phase
STBY
Level
HI
STBY
STBY
LO
Time
Preset gain
Gain
G = 24dB
Gain decreasing
G = 18dB
G = 12dB
G = 6dB
Mute
Mute
tSTBY
4.7
Time
Consumption in shutdown mode
Between the shutdown pin and GND there is an internal 300 kΩ (+-/20%) resistor. This
resistor forces the TS2012 to be in shutdown when the shutdown input is left floating.
However, this resistor also introduces additional shutdown power consumption if the
shutdown pin voltage is not at 0 V.
With a 0.4 V shutdown voltage pin for example, you must add 0.4 V/300 kΩ=1.3 µA in typical
(0.4 V/240 kΩ=1.66 µA in maximum) for each shutdown pin to the standby current specified
in Table 5 to Table 7. Of course, this current will be provided by the external control device
for standby pins.
4.8
Single-ended input configuration
It is possible to use the TS2012 in a single-ended input configuration. However, input
coupling capacitors are mandatory in this configuration. The schematic diagram in Figure 39
shows a typical single-ended input application.
24/31
TS2012FC
Application information
Figure 39. Typical application for single-ended input configuration
VCC
Cs2
0.1uF
VCC
Cs1
1uF
TS2012
A2
D2
Gain Select
Control
AVCC
Left Input
PVCC
Cin
A1
Lin+
B1
Lin-
C2
G0
B2
G1
D1
Rin+
Lout+
A3
Lout-
A4
Rout+
D3
Bridge Rout-
D4
H
Gain
PWM
Cin
Select
Left speaker
Bridge
Oscillator
Right Input
H
Gain
PWM
Cin
C1
Rin-
B4
STBYL
B3
STBYR
Select
Right speaker
Cin
Protection
Circuit
C3
AGND
PGND
C4
Standby
Control
Standby Control
4.9
Output filter considerations
The TS2012 is designed to operate without an output filter. However, due to very sharp
transients on the TS2012 output, EMI radiated emissions may cause some standard
compliance issues.
These EMI standard compliance issues can appear if the distance between the TS2012
outputs and loudspeaker terminal are long (typically more than 50 mm, or 100 mm in both
directions, to the speaker terminals). Because the PCB layout and internal equipment
device are different for each configuration, it is difficult to provide a one-size-fits-all solution.
However, to decrease the probability of EMI issues, there are several simple rules to follow:
●
Reduce, as much as possible, the distance between the TS2012 output pins and the
speaker terminals.
●
Use a ground plane for “shielding” sensitive wires.
●
Place, as close as possible to the TS2012 and in series with each output, a ferrite bead
with a rated current of minimum 2.5A and impedance greater than 50Ω at frequencies
above 30MHz. If, after testing, these ferrite beads are not necessary, replace them by a
short-circuit.
●
Allow extra footprint to place, if necessary, a capacitor to short perturbations to ground
(see Figure 40).
25/31
Application information
TS2012FC
Figure 40. Ferrite chip bead placement
From output
Ferrite chip bead
to speaker
about 100pF
gnd
In the case where the distance between the TS2012 output and the speaker terminals is too
long, it is possible to have low frequency EMI issues due to the fact that the typical operating
frequency is 280 kHz. In this configuration, it is necessary to use the output filter
represented in Figure 1 on page 5 as close as possible to the TS2012.
4.10
Short-circuit protection
The TS2012 includes output short-circuit protection. This protection prevents the device
from being damaged in case of fault conditions on the amplifier outputs.
When a channel is in operating mode and a short-circuit occurs between two outputs of the
channel or between an output and ground, the short-circuit protection detects this situation
and puts the appropriate channel into standby. To put the channel back into operating mode,
is needed to put standby pin of the channel to logical LO and after again to logical HI and
wake-up the channel.
4.11
Thermal shutdown
The TS2012 device has an internal thermal shutdown protection in the event of extreme
temperatures to protect the device from overheating. Thermal shutdown is active when the
device reaches 150°C. When the temperature decreases to safe levels, the circuit switches
back to normal operation.
26/31
TS2012FC
5
Package information
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
Figure 41. Flip-chip package mechanical drawing
2.1 mm
2.1 mm
250μm
G1
INL+
Die size: 2.1x2.1 mm ± 30µm
Die height (including bumps):
600µm
Bump diameter: 315µm ±50µm
Bump diameter before reflow:
300µm ±10µm
Bump height: 250µm ±40µm
Die height: 350µm ±20µm
Pitch: 500µm ±50µm
Bump Coplanarity: 60µm max
Optional*: Back coating height:
40µm
500μm
40 μm*
600 μm
27/31
Package information
TS2012FC
Figure 42. Pinout (top view)
4
LOUT-
STDBYL
PGND
ROUT-
3
LOUT+
STDBYR
AGND
ROUT+
2
PVCC
G1
G0
AVCC
1
LIN+
INL+
LIN-
RIN-
RIN+
A
B
C
D
Figure 43. Marking (top view)
E
K0 X
YWW
28/31
■
ST Logo
■
Symbol for lead-free: E
■
Two first product code: K0
■
Third X: Assembly line plant code
■
Three digits date code: Y for year - WW for
week
■
The dot indicates pin A1
TS2012FC
Package information
Figure 44. Tape and reel schematics (top view)
4
1
1
A
Die size Y + 70µm
A
8
Die size X + 70µm
4
All dimensions are in mm
User direction of feed
Figure 45. Recommended footprint
500μm
500μm
75µm min.
100μm max.
Φ=400μm typ.
Track
150μm min.
Φ=340μm min.
500μm
500μm
Φ=250μm
Non Solder mask opening
Pad in Cu 18μm with Flash NiAu (2-6μm, 0.2μm max.)
29/31
Ordering information
6
TS2012FC
Ordering information
Table 9.
Order code
Order code
Temperature range
Package
Packing
Marking
-40°C to +85°C
Flip chip 16
Tape & reel
K0
TS2012EIJT
7
Revision history
Table 10.
30/31
Document revision history
Date
Revision
Changes
14-Jan-2008
1
Initial release, preliminary information.
16-Apr-2008
2
Document status promoted to full datasheet (internal release).
17-Apr-2008
3
Public release of full datasheet.
TS2012FC
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2008 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
31/31