STMICROELECTRONICS TS2012IQT

TS2012
Filter-free stereo 2x2.8W class D audio power amplifer
Features
Output power per channel : 1.35W @5V or
0.68W @ 3.6V into 8Ω with 1% THD+N max.
■
Output power per channel : 2.2W @5V into 4Ω
with 1% THD+N max.
■
Four gains select : 6, 12, 18, 24 dB
■
Low current consumption
■
PSRR: 70dB typ @ 217Hz with 6dB gain.
■
Fast start-up phase: 1ms
■
Thermal shutdown protection
■
QFN20 4x4mm lead-free package
Pin connections (top view)
17
16
Lout+
Rout+
14
3
PVCC
PVCC
13
Applications
4
PGND
PGND
12
■
Cellular phone
5
Lout-
Rout-
11
■
PDA
■
Flat panel TV
6
NC
15
AVCC
G0
STBYR
2
18
STBYL
G1
19
NC
1
20
Rin+
■
Rin-
Standby mode active low
AGND
■
TS2012IQT - QFN20 (4x4)
Lin-
Operating range from VCC=2.5V to 5.5V
Lin+
■
7
8
9
10
Description
LIN -
15
G0
1
G1
PVCC
3
Gain
H
PWM
Select
Bridge
LOUT+
2
LOUT-
5
Rev 1
ROUT+
14
ROUT-
11
PGND
Control
18
The TS2012 is available in a QFN20 package in
4x4 mm dimension.
Bridge
Standby
PGND
STBY R
4
STBY L
8
H
PWM
Select
12
7
Gain
AGND
RIN -
300k
RIN +
17
300k
Two standby pins (active low) allow each channel
to be switched off independently.
16
300k
300k
Oscillator
Pop & click reduction circuitry provides low on/off
switch noise while allowing the device to start
within 1ms.
December 2007
LIN +
19
PVCC
9
AVCC
The device has four different gain settings utilizing
two discrete pins: G0 and G1.
20
13
Block diagram
The TS2012 is a stereo fully differential class D
power amplifier. Able to drive up to 1.35W into an
8Ω load at 5V per channel. It achieves
outstanding efficiency compared to typical class
AB audio amps.
1/30
www.st.com
30
Contents
TS2012
Contents
1
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
2
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
3.1
Electrical characteristic tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2
Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1
Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.2
Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.3
Common mode feedback loop limitations . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.4
Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.5
Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.6
Wake-up time (twu) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.7
Shutdown time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.8
Consumption in shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.9
Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.10
Output filter considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2/30
TS2012
1
Absolute maximum ratings and operating conditions
Absolute maximum ratings and operating conditions
Table 1.
Absolute maximum ratings
Symbol
VCC
Vi
Parameter
Value
Unit
6
V
GND to VCC
V
Supply voltage (1)
Input voltage
(2)
Toper
Operating free air temperature range
-40 to + 85
°C
Tstg
Storage temperature
-65 to +150
°C
150
°C
100
°C/W
Tj
Rthja
Pd
Maximum junction temperature
Thermal resistance junction to ambient
(3)
Power dissipation
Internally
HBM: human body model(5)
ESD
MM: machine model
2
kV
200
V
200
mA
GND to VCC
V
260
°C
(6)
Latch-up Latch-up immunity
VSTBY
Standby pin voltage maximum voltage
limited(4)
Lead temperature (soldering, 10sec)
1. All voltage values are measured with respect to the ground pin.
2. The magnitude of the input signal must never exceed VCC + 0.3V / GND - 0.3V.
3. The device is protected in case of over temperature by a thermal shutdown active @ 150°C.
4. Exceeding the power derating curves during a long period will cause abnormal operation.
5. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
6. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two
pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin
combinations with other pins floating.
3/30
Absolute maximum ratings and operating conditions
Table 2.
Operating conditions
Symbol
VCC
VI
Vic
VSTBY
TS2012
Parameter
Supply voltage
Input voltage range
Input common mode voltage
(1)
Standby voltage input (2)
Device ON
Device in STANDBY(3)
Value
Unit
2.5 to 5.5
V
GND to VCC
V
GND+0.5V to VCC-0.9V
V
1.4 ≤ VSTBY ≤ VCC
GND ≤ VSTBY ≤ 0.4
V
≥4
Ω
RL
Load resistor
VIH
GO, G1 - high level input voltage(4)
1.4 ≤ VIH ≤ VCC
V
VIL
GO, G1 - low level input voltage
GND ≤ VIL ≤ 0.4
V
40
°C/W
Rthja
Thermal resistance junction to ambient (5)
1. I Voo I ≤ 40mV max with all differential gains except 24dB. For 24dB gain, input decoupling caps are
mandatory.
2. Without any signal on VSTBY, the device is in standby (internal 300kΩ +/-20% pull-down resistor).
3. Minimum current consumption is obtained when VSTBY = GND.
4. Between G0, G1pins and GND, there is an internal 300kΩ (+/-20%) pull-down resistor. When pins are
floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected
(HiZ input).
5. With 4-layer PCB.
4/30
TS2012
Typical application
2
Typical application
Figure 1.
Typical application schematics
Cs
VCC
100nF
Input capacitors
are optional
CsL
1μF
VCC VCC
CsR
1μF
Gain Select
Control
LIN +
Cin
LIN -
Left IN-
PVCC
AVCC
Cin
Differential
Left Input
PVCC
TS2012
Left IN+
Gain
H
PWM
Select
Bridge
LOUT+
Left speaker
LOUT-
G0
Oscillator
G1
RIN +
Right IN+
Cin
RIN -
Gain
H
PWM
Select
Bridge
ROUT+
ROUTRight speaker
Differential
Right Input
Standby
Control
PGND
STBY R
PGND
STBY L
AGND
Cin
Right IN-
Standby Control
Cs
VCC
100nF
Input capacitors
are optional
CsL
1μF
VCC VCC
CsR
1μF
Gain Select
Control
LIN +
Cin
LIN -
Left IN-
PVCC
AVCC
Cin
Differential
Left Input
PVCC
TS2012
Left IN+
H
Gain
PWM
Select
Bridge
LOUT+
LOUT-
LC Output Filter
Load
LC Output Filter
Load
G0
Oscillator
G1
RIN +
Right IN+
Cin
RIN -
Gain
H
PWM
Select
Bridge
ROUT+
ROUT-
Differential
Right Input
Standby
Control
Standby Control
PGND
STBY R
PGND
STBY L
AGND
Cin
Right IN-
4Ω LC Output Filter
8Ω LC Output Filter
30 μH
15 μH
1μF
2μF
15 μH
2μF
30 μH
1μF
5/30
Typical application
Table 3.
TS2012
External component descriptions
Components
Functional description
CS, CSL, CSR Supply capacitor that provides power supply filtering.
Input coupling capacitors (optional) that block the DC voltage at the amplifier input
terminal. The capacitors also form a high pass filter with Zin
(Fcl = 1 / (2 x π x Zin x Cin)).
Cin
Table 4.
Pin descriptions
Pin number
Pin name
1
G1
2
Lout+
Left channel positive output
3
PVCC
Power supply
4
PGND
Power ground
5
Lout-
6
NC
7
STBYL
Standby pin (active low) for left channel output
8
STBYR
Standby pin (active low) for right channel output
9
AVCC
10
NC
11
Rout-
Right channel negative output
12
PGND
Power ground
13
PVCC
Power supply
14
Rout+
Right channel positive output
15
G0
16
Rin+
Right channel positive differential input
17
Rin-
Right channel negative differential input
18
AGND
19
Lin-
Left channel negative differential input
20
Lin+
Left channel positive differential input
Thermal pad
6/30
Pin description
Gain select pin (MSB)
Left channel negative output
No internal connection
Analog supply
No internal connection
Gain select pin (LSB)
Analog ground
Connect the thermal pad of the QFN package to PCB ground
TS2012
Electrical characteristics
3
Electrical characteristics
3.1
Electrical characteristic tables
Table 5.
VCC = +5V, GND = 0V, Vic=2.5V, Tamb = 25°C (unless otherwise specified)
Symbol
ICC
ISTBY
Parameters and test conditions
Supply current
No input signal, no load, both channels
Standby current
No input signal, VSTBY = GND
Voo
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω
Po
Output power
THD + N = 1% max, f = 1kHz, RL = 4Ω
THD + N = 1% max, f = 1kHz, RL = 8Ω
THD + N = 10% max, f = 1kHz, RL = 4Ω
THD + N = 10% max, f = 1kHz, RL = 8Ω
THD + N
Total harmonic distortion + noise
Po = 0.8W, G = 6dB, f =1kHz, RL = 8Ω
Efficiency
Efficiency per channel
Po = 2.2W, RL = 4Ω +15µH
Po = 1.25 W, RL = 8Ω+15µH
PSRR
Crosstalk
CMRR
Min.
Typ.
Max.
Unit
5
8
mA
0.2
2
µA
25
mV
2.2
1.35
2.8
1.65
W
0.07
%
81
89
%
Power supply rejection ratio with inputs grounded
Cin=1µF (1),f = 217Hz, RL = 8Ω, Gain=6dB,
Vripple = 200mVpp
70
dB
Channel separation
Po = 0.9W, G = 6dB, f =1kHz, RL = 8Ω
90
dB
Common mode rejection ratio
Cin=1µF, f = 217Hz, RL = 8Ω, Gain=6dB,
ΔVICM = 200mVpp
70
dB
Gain value
G1 = G0 = VIL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = VIL
G1 = G0 = VIH
5.5
11.5
17.5
23.5
6
12
18
24
6.5
12.5
18.5
24.5
Single ended input impedance
All gains, refered to ground
24
30
36
kΩ
FPWM
Pulse width modulator base frequency
190
280
370
kHz
SNR
Signal to noise ratio (A-weighting)
Po = 1.3W, G = 6dB, RL = 8Ω
99
tWU
Wake-up time
1
tSTBY
Standby time
1
Gain
Zin
dB
dB
3
ms
ms
7/30
Electrical characteristics
Table 5.
Symbol
VN
TS2012
VCC = +5V, GND = 0V, Vic=2.5V, Tamb = 25°C (unless otherwise specified) (continued)
Parameters and test conditions
Output voltage noise f = 20Hz to 20kHz, RL=8Ω
Unweighted (Filterless, G=6dB)
A-weighted (Filterless, G=6dB)
Unweighted (with LC output filter, G=6dB)
A-weighted (with LC output filter, G=6dB)
Unweighted (Filterless, G=24dB)
A-weighted (Filterless, G=24dB)
Unweighted (with LC output filter, G=24dB)
A-weighted (with LC output filter, G=24dB)
Min.
Typ.
63
35
60
35
115
72
109
71
Max.
Unit
µVRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217Hz.
8/30
TS2012
Table 6.
Electrical characteristics
VCC = +3.6V, GND = 0V, Vic=1.8V, Tamb = 25°C (unless otherwise specified)
Symbol
ICC
ISTBY
Parameter
Typ.
Max.
Unit
Supply current
No input signal, no load, both channels
3.3
6.5
mA
Standby current
No input signal, VSTBY = GND
0.2
2
µA
25
mV
Voo
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω
Po
Output power
THD + N = 1% max, f = 1kHz, RL = 4Ω
THD + N = 1% max, f = 1kHz, RL = 8Ω
THD + N = 10% max, f = 1kHz, RL = 4Ω
THD + N = 10% max, f = 1kHz, RL = 8Ω
THD + N
Total harmonic distortion + noise
Po = 0.4W, G = 6dB, f =1kHz, RL = 8Ω
Efficiency
Efficiency per channel
Po = 1.15W, RL = 4Ω +15µH
Po = 0.68W, RL = 8Ω+15µH
PSRR
Crosstalk
CMRR
Min.
1.15
0.68
1.3
0.9
W
0.05
%
80
88
%
Power supply rejection ratio with inputs grounded
Cin=1µF (1),f = 217Hz, RL = 8Ω, Gain=6dB,
Vripple = 200mVpp
70
dB
Channel separation
Po = 0.5W, G = 6dB, f =1kHz, RL = 8Ω
90
Common mode rejection ratio
Cin=1µF, f = 217Hz, RL = 8Ω, Gain=6dB,
ΔVICM = 200mVpp
70
Gain value
G1 = G0 = VIL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = VIL
G1 = G0 = VIH
dB
5.5
11.5
17.5
23.5
6
12
18
24
6.5
12.5
18.5
24.5
Single ended input impedance
All gains, referred to ground
24
30
36
kΩ
FPWM
Pulse width modulator base frequency
190
280
370
kHz
SNR
Signal to noise ratio (A-weighting)
Po = 0.65W, G = 6dB, RL = 8Ω
96
tWU
Wake-up time
1
tSTBY
Standby time
1
Gain
Zin
dB
dB
3
ms
ms
9/30
Electrical characteristics
Table 6.
Symbol
VN
TS2012
VCC = +3.6V, GND = 0V, Vic=1.8V, Tamb = 25°C (unless otherwise specified) (continued)
Parameter
Output voltage noise f = 20Hz to 20kHz, RL=4Ω
Unweighted (Filterless, G=6dB)
A-weighted (Filterless, G=6dB)
Unweighted (with LC output filter, G=6dB)
A-weighted (with LC output filter, G=6dB)
Unweighted (Filterless, G=24dB)
A-weighted (Filterless, G=24dB)
Unweighted (with LC output filter, G=24dB)
A-weighted (with LC output filter, G=24dB)
Min.
Typ.
58
34
55
34
111
70
105
69
Max.
Unit
µVRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217Hz.
10/30
TS2012
Table 7.
Electrical characteristics
VCC = +2.5V, GND = 0V, Vic=1.25V, Tamb = 25°C (unless otherwise specified)
Symbol
ICC
ISTBY
Parameter
Typ.
Max.
Unit
Supply current
No input signal, no load, both channels
2.8
4
mA
Standby current
No input signal, VSTBY = GND
0.2
2
µA
25
mV
Voo
Output offset voltage
Floating inputs, G = 6dB, RL = 8Ω
Po
Output power
THD + N = 1% max, f = 1kHz, RL = 4Ω
THD + N = 1% max, f = 1kHz, RL = 8Ω
THD + N = 10% max, f = 1kHz, RL = 4Ω
THD + N = 10% max, f = 1kHz, RL = 8Ω
THD + N
Total harmonic distortion + noise
Po = 0.2W, G = 6dB, f =1kHz, RL = 8Ω
Efficiency
Efficiency per channel
Po = 0.53W, RL = 4Ω +15µH
Po = 0.32W, RL = 8Ω+15µH
PSRR
Crosstalk
CMRR
Min.
0.53
0.32
0.75
0.45
W
0.04
%
80
88
%
Power supply rejection ratio with inputs grounded
Cin=1µF (1),f = 217Hz, RL = 8Ω, Gain=6dB,
Vripple = 200mVpp
70
dB
Channel separation
Po = 0.2W, G = 6dB, f =1kHz, RL = 8Ω
90
Common mode rejection ratio
Cin=1µF, f = 217Hz, RL = 8Ω, Gain=6dB,
ΔVICM = 200mVpp
70
Gain value
G1 = G0 = VIL
G1 = VIL & G0 = VIH
G1 = VIH & G0 = VIL
G1 = G0 = VIH
dB
5.5
11.5
17.5
23.5
6
12
18
24
6.5
12.5
18.5
24.5
Single ended input impedance
All gains, refered to ground
24
30
36
kΩ
FPWM
Pulse width modulator base frequency
190
280
370
kHz
SNR
Signal to noise ratio (A-weighting)
Po = 0.3W, G = 6dB, RL = 8Ω
93
tWU
Wake-up time
1
tSTBY
Standby time
1
Gain
Zin
dB
dB
3
ms
ms
11/30
Electrical characteristics
Table 7.
VCC = +2.5V, GND = 0V, Vic=1.25V, Tamb = 25°C (unless otherwise specified)
Symbol
VN
TS2012
Parameter
Min.
Output voltage noise f = 20Hz to 20kHz, RL=8Ω
Unweighted (filterless, G=6dB)
A-weighted (filterless, G=6dB)
Unweighted (with LC output filter, G=6dB)
A-weighted (with LC output filter, G=6dB)
Unweighted (filterless, G=24dB)
A-weighted (filterless, G=24dB)
Unweighted (with LC output filter, G=24dB)
A-weighted (with LC output filter, G=24dB)
Typ.
Max.
57
34
54
33
110
71
104
69
Unit
µVRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217Hz.
3.2
Electrical characteristic curves
The graphs shown in this section use the following abbreviations:
●
RL+ 15µH or 30µH = pure resistor + very low series resistance inductor
●
Filter = LC output filter (1µF+30µH for 4Ω and 0.5µF+60µH for 8Ω)
All measurements are done with CSL=CSR=1µF and CS=100nF (see Figure 2), except for
the PSRR where CSL,R is removed (see Figure 3).
Figure 2.
Test diagram for measurements
Vcc
CsL
(CsR)
1μF
GND
CS
100nF
GND
RL
4 or 8 Ω
Cin
In+
Out+
15 μH or 30μH
1/2 TS2012
In-
or
50kHz
LC Filter
low-pass filter
Out-
Cin
GND
Audio Measurement
Bandwith < 30kHz
12/30
5th order
TS2012
Electrical characteristics
Figure 3.
Test diagram for PSRR measurements
VCC
Cs
100nF
20Hz to 20kHz
Vripple
GND
1 μF
Cin
Vcc
GND
RL
4 or 8 Ω
Out+
In+
15 μH or 30 μH
1/2 TS2012
In-
5th order
or
50kHz
LC Filter
low-pass filter
Out-
Cin
1 μF
GND
GND
5th order
50kHz
low-pass filter
reference
RMS Selective Measurement
Bandwith =1% of Fmeas
13/30
Electrical characteristics
Table 8.
TS2012
Index of graphics
Description
Current consumption vs. power supply voltage
Figure 4
Current consumption vs. standby voltage
Figure 5
Efficiency vs. output power
Figure 6 - Figure 9
Output power vs. power supply voltage
Figure 10, Figure 11
PSRR vs. common mode input voltage
Figure 12
PSRR vs. frequency
Figure 13
CMRR vs. common mode input voltage
Figure 14
CMRR vs. frequency
Figure 15
Gain vs. frequency
Figure 16, Figure 17
THD+N vs. output power
Figure 18 - Figure 25
THD+N vs. frequency
Figure 26 - Figure 37
Crosstalk vs. frequency
Figure 38 - Figure 41
Power derating curves
Figure 42
Startup and shutdown time
14/30
Figure
Figure 43, Figure 44
TS2012
Electrical characteristics
Figure 4.
Current consumption vs. power
supply voltage
Figure 5.
6
Current consumption vs. standby
voltage (one channel)
2.5
Both channels ON
One channel ON
3
2
1
0
2.5
3.0
3.5
4.0
4.5
5.0
2.0
V CC=5V
1.5
V CC=2.5V
0.5
0.0
5.5
V CC =3.6V
1.0
No Load
T AMB=25°C
0
1
2
Power Supply Voltage (V)
Figure 6.
Efficiency vs. output power
Figure 7.
100
125
100
Figure 8.
0.1
Vcc=2.5V
RL=4 Ω + ≥ 15 μ H
F=1kHz
THD+N ≤ 1%
0.2
0.3
Output Power (W)
0.4
25
500
Efficiency (%)
Efficiency
60
40
0
0.00
Vcc=2.5V
RL=8Ω + ≥ 15 μ H
F=1kHz
THD+N ≤ 1%
0.10
0.15
0.20
Output Power (W)
0.25
40
200
100
40
80
20
0.05
300
50
30
20
60
Power
Dissipation
0.5
Figure 9.
100
Power
Dissipation
400
0
0.0
0
0.5
Efficiency vs. output power
80
80
20
10
0
0.30
Efficiency (%)
0
0.0
50
Efficiency (%)
75
Power Dissipation (mW)
60
Power Dissipation (mW)
Efficiency (%)
100
20
5
Efficiency
80
Power
Dissipation
4
Efficiency vs. output power
Efficiency
40
3
Standby Voltage (V)
1.0
Output Power (W)
Vcc=5V
RL=4Ω + ≥ 15μ H
F=1kHz
THD+N ≤ 1%
0
2.0
1.5
Efficiency vs. output power
200
160
Efficiency
120
60
80
40
Power
Dissipation
20
0
0.0
100
Power Dissipation (mW)
4
No Loads
0.2
0.4
0.6
0.8
Output Power (W)
Vcc=5V
RL=8Ω + ≥ 15μ H
F=1kHz
THD+N ≤ 1%
1.0
1.2
40
Power Dissipation (mW)
5
Current Consumption (mA)
Current Consumption (mA)
T AMB =25°C
0
1.4
15/30
Electrical characteristics
TS2012
Figure 10. Output power vs. power supply
voltage
Figure 11. Output power vs. power supply
voltage
3.5
2.5
1.6
Output Power (W)
Output Power (W)
3.0
2.0
RL = 4Ω + ≥ 15μ H
F = 1kHz
BW < 30kHz
Tamb = 25°C
THD+N=10%
2.0
1.5
1.0
THD+N=1%
RL = 8Ω + ≥ 15μ H
F = 1kHz
BW < 30kHz
Tamb = 25° C
THD+N=10%
1.2
0.8
THD+N=1%
0.4
0.5
0.0
2.5
3.0
3.5
4.0
4.5
Power Supply Voltage (V)
5.0
0.0
2.5
5.5
Figure 12. PSRR vs. common mode input
voltage
Vcc=3V
-20
Vcc=5V
PSRR (dB)
PSRR(dB)
Vcc=2.5V
Gain=24dB
-40
Gain=6dB
-50
-30
-40
Gain=24dB
-60
-70
-70
-80
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
20
5.0
100
Common Mode Input Voltage (V)
Δ Vicm=200mVpp, Vcc = 2.5, 3.6, 5V
RL ≥ 4Ω + ≥ 15μ H, Cin=1μ F, Tamb=25° C
-10
-20
Vcc=2.5V
Gain=24dB
CMRR (dB)
CMRR(dB)
20k
0
Δ Vicm=200mVpp, F = 217Hz
RL ≥ 4Ω + ≥ 15μ H, Tamb = 25° C
-20
Vcc=3V
Gain=6dB
Vcc=5V
-50
-30
-40
Gain=24dB
Gain=6dB
-50
-60
-60
-70
-70
-80
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Common Mode Input Voltage (V)
16/30
10k
Figure 15. CMRR vs. frequency
0
-80
0.0
1k
Frequency (Hz)
Figure 14. CMRR vs. common mode input
voltage
-40
Gain=6dB
-50
-60
-30
5.5
Inputs grounded, Vripple = 200mVpp
RL ≥ 4Ω + ≥ 15μ H, Cin=1μ F, Tamb=25 ° C
Vcc = 2.5, 3.6, 5V
-10
-30
-10
5.0
0
Vripple = 200mVpp, F = 217Hz
RL ≥ 4Ω + ≥ 15μ H, Tamb = 25° C
-20
-80
0.0
3.5
4.0
4.5
Power Supply Voltage (V)
Figure 13. PSRR vs. frequency
0
-10
3.0
4.5
5.0
20
100
1k
Frequency (Hz)
10k
20k
TS2012
Electrical characteristics
Figure 16. Gain vs. frequency
Figure 17. Gain vs. frequency
26
8
no load
no load
24
Gain (dB)
Gain (dB)
6
4
RL=8Ω +15μ H
22
RL=8Ω +15μ H
RL=8Ω +30μ H
RL=8Ω +30μ H
Gain = 6dB
Vin = 500mV
Cin = 4.7μ F
T AMB = 25° C
2
0
20
RL=4Ω +15μ H
RL=4Ω +30μ H
18
100
1k
Frequency (Hz)
10k
20k
Vcc=5V
Vcc=3.6V
THD + N (%)
THD + N (%)
100
1k
10k
20k
10
RL = 4 Ω + 15 μ H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=2.5V
0.1
1
RL = 4 Ω + 30 μ H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
0.1
1E-3
0.01
0.1
Output Power (W)
1
1E-3
3
Figure 20. THD+N vs. output power
0.01
0.1
Output Power (W)
1
3
Figure 21. THD+N vs. output power
10
10
RL = 8 Ω + 15 μ H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
THD + N (%)
THD + N (%)
RL=4Ω +30μ H
Figure 19. THD+N vs. output power
10
1
20
RL=4Ω +15μ H
Frequency (Hz)
Figure 18. THD+N vs. output power
1
Gain = 24dB
Vin = 5mV
Cin = 4.7 μ F
T AMB = 25° C
20
Vcc=2.5V
0.1
1E-3
1
RL = 8Ω + 30μ H
F = 1kHz
G = 6dB
BW < 30kHz
Tamb = 25° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
0.1
0.01
0.1
Output Power (W)
1
2
1E-3
0.01
0.1
Output Power (W)
1
2
17/30
Electrical characteristics
TS2012
Figure 22. THD+N vs. output power
Figure 23. THD+N vs. output power
10
10
THD + N (%)
1
Vcc=5V
Vcc=3.6V
THD + N (%)
RL = 4Ω + 15μ H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25° C
Vcc=2.5V
0.01
1E-3
0.01
0.1
Output Power (W)
1
0.01
1E-3
3
Figure 24. THD+N vs. output power
Vcc=2.5V
0.01
0.1
Output Power (W)
Vcc=5V
THD + N (%)
Vcc=3.6V
Vcc=2.5V
0.1
0.01
0.1
Output Power (W)
1
1
RL = 8 Ω + 30 μ H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
Vcc=5V
Vcc=3.6V
Vcc=2.5V
0.01
1E-3
2
Figure 26. THD+N vs. frequency
0.01
0.1
Output Power (W)
1
2
Figure 27. THD+N vs. frequency
10
10
Po=0.4W
RL=4Ω + 30μ H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25° C
1
THD + N (%)
RL=4Ω + 15μ H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25° C
0.1
Po=0.4W
0.1
Po=0.2W
Po=0.2W
18/30
3
0.1
0.01
1E-3
0.01
1
10
RL = 8 Ω + 15 μ H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
1
THD + N (%)
Vcc=3.6V
Figure 25. THD+N vs. output power
10
THD + N (%)
Vcc=5V
0.1
0.1
1
1
RL = 4 Ω + 30 μ H
F = 100Hz
G = 6dB
BW < 30kHz
Tamb = 25 ° C
20
100
1000
Frequency (Hz)
10000 20k
0.01
20
100
1000
Frequency (Hz)
10000 20k
TS2012
Electrical characteristics
Figure 28. THD+N vs. frequency
Figure 29. THD+N vs. frequency
10
10
RL=8Ω + 15μ H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25° C
Po=0.2W
1
THD + N (%)
THD + N (%)
1
RL=8Ω + 30 μ H
G=6dB
BW < 30kHz
Vcc=2.5V
Tamb = 25° C
0.1
Po=0.2W
0.1
Po=0.1W
Po=0.1W
0.01
20
100
10000 20k
1000
Frequency (Hz)
Figure 30. THD+N vs. frequency
0.01
100
1000
Frequency (Hz)
10000 20k
Figure 31. THD+N vs. frequency
10
10
RL=4Ω + 30μ H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25° C
Po=0.9W
1
THD + N (%)
RL=4Ω + 15μ H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25° C
1
THD + N (%)
20
0.1
Po=0.9W
0.1
Po=0.45W
Po=0.45W
0.01
20
100
1000
Frequency (Hz)
10000 20k
Figure 32. THD+N vs. frequency
0.01
1000
Frequency (Hz)
RL=8Ω + 30μ H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25°C
Po=0.5W
1
0.1
Po=0.5W
0.1
Po=0.25W
0.01
10000 20k
10
RL=8Ω + 15μ H
G=6dB
BW < 30kHz
Vcc=3.6V
Tamb = 25°C
THD + N (%)
THD + N (%)
100
Figure 33. THD+N vs. frequency
10
1
20
20
100
1000
Frequency (Hz)
10000 20k
Po=0.25W
0.01
20
100
1000
Frequency (Hz)
10000 20k
19/30
Electrical characteristics
TS2012
Figure 34. THD+N vs. frequency
Figure 35. THD+N vs. frequency
10
10
THD + N (%)
1
RL=4Ω + 30μ H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25° C
Po=1.5W
1
THD + N (%)
RL=4Ω + 15μ H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25° C
0.1
Po=1.5W
0.1
Po=0.75W
Po=0.75W
0.01
20
100
1000
Frequency (Hz)
0.01
10000 20k
Figure 36. THD+N vs. frequency
100
1000
Frequency (Hz)
10
RL=8Ω + 30μ H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25° C
Po=0.9W
1
THD + N (%)
RL=8Ω + 15μ H
G=6dB
BW < 30kHz
Vcc=5V
Tamb = 25° C
1
0.1
Po=0.9W
0.1
Po=0.45W
0.01
20
100
1000
Frequency (Hz)
Po=0.45W
0.01
10000 20k
Figure 38. Crosstalk vs. frequency
20
100
1000
Frequency (Hz)
10000 20k
Figure 39. Crosstalk vs. frequency
0
0
Vcc=2.5, 3.6, 5V
RL=4Ω +30 μ H
Gain = 6dB
T AMB = 25° C
-40
R -> L
-60
Vcc=2.5, 3.6, 5V
RL=8Ω +30μ H
Gain = 6dB
TAMB = 25° C
-20
Crosstalk (dB)
-20
Crosstalk (dB)
10000 20k
Figure 37. THD+N vs. frequency
10
THD + N (%)
20
-80
-100
-40
-60
R -> L
-80
-100
L -> R
L -> R
-120
20
100
1k
Frequency (Hz)
20/30
10k
20k
-120
20
100
1k
Frequency (Hz)
10k
20k
TS2012
Electrical characteristics
Figure 40. Crosstalk vs. frequency
Figure 41. Crosstalk vs. frequency
0
0
Vcc = 2.5, 3.6, 5V
RL = 4Ω +30μ H
Gain = 24dB
T AMB = 25° C
-40
R -> L
-60
-80
-100
-120
100
1k
10k
20k
Frequency (Hz)
R -> L
-60
-80
-120
L -> R
20
100
1k
20k
10k
Frequency (Hz)
Figure 42. Power derating curves
QFN20 Package Power Dissipation (W)
-40
-100
L -> R
20
Vcc=2.5, 3.6, 5V
RL=8Ω +30μ H
Gain = 24dB
TAMB = 25° C
-20
Crosstalk (dB)
Crosstalk (dB)
-20
Figure 43. Startup and shutdown phase
VCC=5V, G=6dB, Cin=1µF, inputs
grounded
3.5
3.0
With 4-layer PCB
2.5
2.0
No Heat sink
1.5
1.0
0.5
0.0
0
25
50
75
100
125
150
Ambient Temperature (° C)
Figure 44. Startup and shutdown phase
VCC=5V, G=6dB, Cin=1µF, Vin=2Vpp,
F=10kHz
21/30
Application information
TS2012
4
Application information
4.1
Differential configuration principle
The TS2012 is a monolithic fully-differential input/output class D power amplifier. The
TS2012 also includes a common-mode feedback loop that controls the output bias value to
average it at VCC/2 for any DC common mode input voltage. This allows the device to
always have a maximum output voltage swing, and by consequence, maximize the output
power. Moreover, as the load is connected differentially compared with a single-ended
topology, the output is four times higher for the same power supply voltage.
The advantages of a full-differential amplifier are:
4.2
●
High PSRR (power supply rejection ratio)
●
High common mode noise rejection
●
Virtually zero pop without additional circuitry, giving a faster start-up time compared
with conventional single-ended input amplifiers
●
Easier interfacing with differential output audio DAC
●
No input coupling capacitors required thanks to common mode feedback loop
Gain settings
In the flat region of the frequency-response curve (no input coupling capacitor or internal
feedback loop + load effect), the differential gain can be set to 6, 12 18, 24 dB depending on
the logic level of the G0 and G1 pins, as shown in Table 9.
Table 9.
Gain settings with G0 and G1 pins
G1
G0
Gain (dB)
Gain (V/V)
0
0
6
2
0
1
12
4
1
0
18
8
1
1
24
16
Note:
Between pins G0, G1 and GND there is an internal 300kΩ (+/-20%) resistor. When the pins
are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are
disconnected (HiZ input).
4.3
Common mode feedback loop limitations
As explained previously, the common mode feedback loop allows the output DC bias voltage
to be averaged at VCC/2 for any DC common mode bias input voltage.
Due to the Vic limitation of the input stage (see Table 2: Operating conditions on page 4), the
common mode feedback loop can fulfil its role only within the defined range.
22/30
TS2012
4.4
Application information
Low frequency response
If a low frequency bandwidth limitation is required, it is possible to use input coupling
capacitors. In the low frequency region, the input coupling capacitor Cin starts to have an
effect. Cin forms, with the input impedance Zin, a first order high-pass filter with a -3dB cutoff frequency (see Table 5 to Table 7):
1
F CL = ------------------------------------------2 ⋅ π ⋅ Z in ⋅ C in
So, for a desired cut-off frequency FCL Cin is calculated as follows:
1
C in = ---------------------------------------------2 ⋅ π ⋅ Z in ⋅ F CL
with FCL in Hz, Zin in Ω and Cin in F.
The input impedance Zin is for the whole power supply voltage range, typically 30kΩ . There
is also a tolerance around the typical value (see Table 5 to Table 7). You can also calculate
the tolerance of the FCL:
4.5
●
F CLmax = 1.103 ⋅ F CL
●
F CLmin = 0.915 ⋅ F CL
Decoupling of the circuit
Power supply capacitors, referred to as CS,CSL,CSR are needed to correctly bypass the
TS2012.
The TS2012 has a typical switching frequency of 280kHz and output fall and rise time about
5ns. Due to these very fast transients, careful decoupling is mandatory.
A 1µF ceramic capacitor between each PVCC and PGND and also between AVCC and
AGND is enough, but they must be located very close to the TS2012 in order to avoid any
extra parasitic inductance created by a long track wire. Parasitic loop inductance, in relation
with di/dt, introduces overvoltage that decreases the global efficiency of the device and may
cause, if this parasitic inductance is too high, a TS2012 breakdown.
In addition, even if a ceramic capacitor has an adequate high frequency ESR value, its
current capability is also important. A 0603 size is a good compromise, particularly when a
4Ω load is used.
Another important parameter is the rated voltage of the capacitor. A 1µF/6.3V capacitor
used at 5V, loses about 50% of its value. With a power supply voltage of 5V, the decoupling
value, instead of 1µF, could be reduced to 0.5µF. As CS has particular influence on the
THD+N in the medium to high frequency region, this capacitor variation becomes decisive.
In addition, less decoupling means higher overshoots which can be problematic if they reach
the power supply AMR value (6V).
23/30
Application information
4.6
TS2012
Wake-up time (twu)
When the standby is released to set the device ON, there is a delay of 1ms typically. The
TS2012 has an internal digital delay that mutes the outputs and releases them after this
time in order to avoid any pop noise.
Note:
The gain increases smoothly (see Figure 44) from the mute to the gain selected by the G1
and G0 pin (Section 4.2).
4.7
Shutdown time
When the standby command is set, the time required to set the output stage considered into
high impedance and to put the internal circuitry in shutdown mode, is typically 1ms. This
time is used to decrease the gain and avoid any pop noise during shutdown.
Note:
The gain decreases smoothly until the outputs are muted (see Figure 44).
4.8
Consumption in shutdown mode
Between the shutdown pin and GND there is an internal 300kΩ (+-/20%) resistor. This
resistor forces the TS2012 to be in shutdown when the shutdown input is left floating.
However, this resistor also introduces additional shutdown power consumption if the
shutdown pin voltage is not 0V.
With a 0.4V shutdown voltage pin for example, you must add 0.4V/300kΩ=1.3µA in typical
(0.4V/240kΩ=1.66µA in maximum for each shutdown pin) to the standby current specified in
Table 5 to Table 7. Of course, this current will be provided by the external control device for
standby pins.
4.9
Single-ended input configuration
It is possible to use the TS2012 in a single-ended input configuration. However, input
coupling capacitors are mandatory in this configuration. The schematic diagram in Figure 45
shows a typical single-ended input application.
24/30
TS2012
Application information
Figure 45. Typical application for single-ended input configuration
Cs
VCC
100nF
CsL
1μ F
VCC VCC
CsR
1μF
Gain Select
Control
TS2012
LIN +
Cin
LIN -
PVCC
Cin
PVCC
AVCC
Left Input
H
Gain
PWM
Select
Bridge
LOUT+
LOUT-
Left speaker
G0
Oscillator
G1
STBY L
STBY R
Gain
H
PWM
Select
Bridge
ROUT+
ROUT-
Right speaker
Standby
Control
PGND
Cin
RIN -
PGND
Cin
AGND
RIN +
Right Input
Standby Control
4.10
Output filter considerations
The TS2012 is designed to operate without an output filter. However, due to very sharp
transients on the TS2012 output, EMI radiated emissions may cause some standard
compliance issues.
These EMI standard compliance issues can appear if the distance between the TS2012
outputs and loudspeaker terminal are long (typically more than 50mm, or 100mm in both
directions, to the speaker terminals). As the PCB layout and internal equipment device are
different for each configuration, it is difficult to provide a one-size-fits-all solution.
However, to decrease the probability of EMI issues, there are several simple rules to follow:
●
Reduce, as much as possible, the distance between the TS2012 output pins and the
speaker terminals.
●
Use a ground plane for “shielding” sensitive wires.
●
Place, as close as possible to the TS2012 and in series with each output, a ferrite bead
with a rated current of minimum 2.5A and impedance greater than 50Ω at frequencies
above 30MHz. If, after testing, these ferrite beads are not necessary, replace them by a
short-circuit.
●
Allow extra footprint to place, if necessary, a capacitor to short perturbations to ground
(see Figure 46).
25/30
Application information
TS2012
Figure 46. Ferrite chip bead placement
From output
Ferrite chip bead
to speaker
about 100pF
gnd
In the case where the distance between the TS2012 output and the speaker terminals is too
long, it is possible to have low frequency EMI issues due to the fact that the typical operating
frequency is 280kHz. In this configuration, it is necessary to use the output filter represented
in Figure 1 on page 5 as close as possible to the TS2012.
26/30
TS2012
5
Package information
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in
ECOPACK® packages. These packages have a lead-free second level interconnect. The
category of second level interconnect is marked on the package and on the inner box label,
in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics
trademark. ECOPACK specifications are available at: www.st.com.
Figure 47. QFN20 package mechanical drawing
27/30
Package information
TS2012
Table 10.
QFN20 package mechanical data
Dimensions in mm
Ref
Min
Typ
Max
0.8
0.9
1
A1
0.02
0.05
A2
0.65
1
A3
0.25
A
b
0.18
0.23
0.3
D
3.85
4
4.15
D2
E
2.6
3.85
E2
4
4.15
2.6
e
0.45
0.5
0.55
L
0.3
0.4
0.5
ddd
0.08
Figure 48. QFN20 package footprint
FOOTPRINT DATA (mm)
A
4.55
B
4.55
C
0.50
D
0.35
E
0.65
F
2.45
G
0.40
Note:
28/30
The QFN20 package has an exposed pad E2 x D2. For enhanced thermal performance, the
exposed pad must be soldered to a copper area on the PCB, acting as a heatsink. This
copper area can be electrically connected to pin 4, 12, 18 (PGND, AGND) or left floating.
TS2012
6
Ordering information
Ordering information
Table 11.
Order code
Part number
TS2012IQT
7
Temperature range
Package
Packaging
Marking
-40°C to +85°C
QFN20
Tape & reel
K12
Revision history
Table 12.
Document revision history
Date
Revision
17-Dec-2007
1
Changes
First release.
29/30
TS2012
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