STMICROELECTRONICS TS4601EIJT

TS4601
High performance stereo headphone amplifier
with capacitorless outputs and I2C bus interface
Features
■
Power supply range: 2.9 V to 5.5 V
■
107 dB of PSRR at 217 Hz
■
Fully differential inputs
■
I²C interface for volume control
■
Digital volume control range from -60 dB to
+4 dB
■
101 dB of SNR A-weighted
■
Independent right and left channel shutdown
control
■
Low quiescent current: 4.8 mA typ. at 3.0 V
■
Low standby current: 2 µA max
■
Output-coupling capacitors removed
■
Flip-chip package 2.1 mm x 2.1 mm, 500 µm
pitch, 16 bumps
TS4601EIJT - Flip-chip
Pinout (top view)
Applications
■
Cellular phones
■
Notebook computers
■
CD/MP3 players
Description
The TS4601 is a stereo headphone driver
dedicated to high audio performance and spaceconstrained applications.
It is based on low power dissipation amplifier core
technology. Special care was taken in the design
of the amplification chain to achieve peerless
PSRR (107 dB typ. at 217 Hz) and 101 dB of
SNR.
The TS4601 can drive 0.9 Vrms output voltage
into 16 Ω and 1.6 Vrms into 10 kΩ, whatever the
power supply voltage, in the 2.9 V to 5.5 V range.
February 2008
SDZ
SDA
SCL
VOUTR
D
INR-
INR+
CMS
VCC
C
INL-
INL+
PVSS
VOUTL
B
PVCC
GND
C1
C2
A
3
2
1
4
Balls are underneath
An I²C interface offers volume control in 64 steps
from -60 dB to +4 dB and multiple configuration
modes for the device.
The traditionally used output-coupling capacitors
can be removed and a dedicated common-mode
sense pin removes parasitic noise from the jack.
The TS4601 is designed to be used with an
output serial resistor. It ensures unconditional
stability over a wide range of capacitive loads.
The TS4601 is packaged in a tiny 16-bump flipchip with a pitch of 500 µm and a 300 µm
diameter ball size.
Rev 2
1/28
www.st.com
28
Contents
TS4601
Contents
1
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
2
Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
3.1
Electrical characteristics tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2
Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1
Common-mode sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2
I²C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2.1
I²C bus operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2.2
Control registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Control register CR0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.3
Wake-up and standby time definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.4
Decoupling considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.5
Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.6
Low pass output filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.7
Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28
TS4601
1
Absolute maximum ratings and operating conditions
Absolute maximum ratings and operating conditions
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
6
V
VCC
Supply voltage (1)
Vin
Input voltage
In Master standby mode, and I²C1, 6 and 7
In I²C 2, 3, 4 and 5
0 to VCC
-2.4 to +2.4
V
Tstg
Storage temperature
-65 to +150
°C
150
°C
200
°C/W
Tj
Rthja
Pd
Maximum junction temperature
Thermal resistance junction to ambient
Power dissipation
Internally
HBM - human body
ESD
Latch-up
(2)
model(4)
limited(3)
2
kV
MM - machine model (min. value)(5)
200
V
Latch-up immunity
200
mA
Lead temperature (soldering, 10sec)
260
°C
1. All voltage values are measured with respect to the ground pin.
2. The device is protected in case of over temperature by a thermal shutdown active @ 150° C.
3. Exceeding the power derating curves during a long period may provoke abnormal operation.
4. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
5. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating.
Table 2.
Operating conditions
Symbol
VCC
Parameter
Supply voltage
Value
Unit
2.9 to 5.5
V
≥ 16
Ω
RL
Load resistor
CL
Load capacitor
Serial resistor of 12Ω minimum, RL ≥ 16Ω,
0.8 to 100
nF
Toper
Operating free air temperature range
-40 to +85
°C
Rthja
Flip-chip thermal resistance junction to ambient
90
°C/W
3/28
Typical application schematics
TS4601
2
Typical application schematics
Figure 1.
Typical application schematics for the TS4601
Vcc
Cs
1uF
TS4601
Gnd
C1
Vcc
Positive
Reg
B3
D4
Master Standby Command
Cin
2.2uF
Positive Right Input
Cin
2.2uF
Gnd
Negative Right Input
InLInL+
-
+
+
VoutL
C3
InR+
C4
InR-
D3
SDA
D2
SCL
Cout
0.8nF min.
12 ohms min.
B1
Rout
CMS
SDZ
C2
Gnd
I2C
I2C Bus
Negative
Supply
Gnd
C1
C2
A4
A3
A2
A1
Cs
1uF
Gnd
Gnd
Headphone / Line Out
12 ohms min.
VoutR
D1
Cout
0.8nF min.
Rout
Negative
Reg
PVcc
Vcc
Table 3.
-
-
Positive Left Input
B4
+
Cin
2.2uF
-
Cin
2.2uF
Gnd
+
Negative Left Input
Gnd
Gnd
PVss
B2
Css
2.2uF
C12
1uF
Gnd
Pin description for the TS4601
Pin number
Pin name
C1
VCC
Analog supply voltage, connect to Vbattery.
A4
PVCC
Power supply voltage, connect to Vbattery.
A2
C1
Capacitor terminal for internal negative supply generator.
A1
C2
Capacitor terminal for internal negative supply generator.
B2
PVSS
D1
VOUTR
Right audio channel output signal.
B1
VOUTL
Left audio channel output signal.
A3
GND
Ground of the device.
C2
CMS
Common-mode sense, to be connected as close as possible to the ground of
headphone / line out plug.
B4
INL-
Left audio channel negative input signal.
B3
INL+
Left audio channel positive input signal.
D4
SDZ
Master standby of the circuit. When SDZ = 0, the device is also reset to initial
state. Up to VCC tolerant input.
C4
INR-
Right audio channel negative input signal.
4/28
Pin definition
Capacitor terminal for internal negative supply generator filtering.
TS4601
Table 3.
Typical application schematics
Pin description for the TS4601 (continued)
Pin number
Pin name
C3
INR+
Right audio channel positive input signal.
D3
SDA
I²C signal data. Up to VCC tolerant input.
D2
SCL
I²C clock signal. Up to VCC tolerant input.
Table 4.
Pin definition
Component description for the TS4601
Component
Value
Description
1µF
Decoupling capacitors for VCC and PVCC. Two 1µF capacitors are enough for
proper decoupling of TS4601. X5R dielectric and 10V rating voltage is
recommended to minimize ΔC/ΔV when VCC= 5V.
Must be placed as close as possible to the TS4601 to minimize parasitic
inductance and resistance.
C12
1µF
Capacitor for internal negative power supply operation. X5R dielectric and 10V
rating voltage is recommended to minimize ΔC/ΔV when VCC= 5V.
Must be placed as close as possible to the TS4601 to minimize parasitic
inductance and resistance.
CSS
2.2µF
Filtering capacitor for internal negative power supply. X5R dielectric and 10V
rating voltage is recommended to minimize ΔC/ΔV when VCC = 5V.
Cs
Cin
1 Cin = ----------------------2πZinFc
Cout
0.8nF to 100nF
Rout
12Ω min.
Input coupling capacitor that forms with Zin, a first order high pass filter with a
-3dB cut-off frequency FC. Zin is 12kΩ typical and independent of the gain
setting.
For example FC = 13Hz, Cin = 1µF and for FC = 6Hz, Cin = 2.2µF
Output capacitor of 0.8nF minimum to 100nF maximum. This capacitor is
mandatory for operation of the TS4601.
Output resistor in series with the TS4601 output. This 12Ω minimum resistor is
mandatory for operation of the TS4601.
5/28
Electrical characteristics
TS4601
3
Electrical characteristics
3.1
Electrical characteristics tables
Table 5.
Electrical characteristics of the I²C interface
from VCC=+2.9 V to VCC=+5.5 V, GND = 0 V, Tamb = 25° C (unless otherwise specified)
Symbol
Parameter
VIL
Low level input voltage on SDZ pins
VIH
High level input voltage on SDZ pins
VIL
Low level input voltage on SDA, SCL pins
VIH
High level input voltage on SDA, SCL pins
FSCL
I2C
VOL
Iin
0.63
V
1.1
V
0.6
1.3
V
V
Low level output voltage, SDA pin, Isink = 3mA
0.4
V
Input current on SDA, SCL from 0.4V to 4.5V
10
µA
720
kΩ
480
600
Electrical characteristics of the amplifier
from VCC=+2.9 V to VCC=+5.5 V, GND = 0 V, Tamb = 25° C (unless otherwise specified)
Parameter
Min.
Quiescent supply current, no input signal, both channels
enabled, RL= 16Ω
VCC = 3.0V
VCC = 5.0V
Master standby current, No input signal
VSDZ= 0V
VSDZ= 0.35V, VCC= 5V
ISTBY
I²C standby current, no input signal
Typ.
Max.
4.8
5.6
6
7
0.5
2
10
µA
75
µA
1.2
Vrms
+5
mV
range(1)
Vin
Input differential voltage
Voo
Output offset voltage
No input signal, RL = 32Ω
Vout
Maximum output voltage, in-phase signals
RL = 16Ω, THD+N = 1% max, f = 1kHz
RL = 10kΩ, Rs=15Ω, CL=1nF, THD+N = 1% max, f = 1kHz
Frequency RL = 16Ω, G = 0dB, Pout = 20mW, +/- 0.5dB (related to1kHz)
range
Cin = 4.7µF
6/28
Unit
kHz
ISTBY
THD + N
Max.
400
Symbol
ICC
Typ.
clock frequency
Pull-down resistor on SDZ
Table 6.
Min.
Total harmonic distortion + noise, G = 0dB
RL = 16Ω, Po = 5mW, F = 1kHz
RL = 16Ω, Po = 10mW, 20Hz < F < 20kHz
-5
Unit
mA
Vrms
0.9
1.6
10
0.2
22000
Hz
0.02
%
TS4601
Table 6.
Electrical characteristics
Electrical characteristics of the amplifier
from VCC=+2.9 V to VCC=+5.5 V, GND = 0 V, Tamb = 25° C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
100
107
Max.
Unit
ratio(2)
PSRR
CMRR
Crosstalk
SNR
ONoise
G
Power supply rejection
F = 217Hz, RL = 16Ω, G = 0dB
Vripple = 200mVpp, grounded inputs
F = 10kHz, RL = 16Ω, G = 0dB
Vripple = 200 mVpp, grounded inputs
70
Common mode rejection ratio
RL = 16Ω, F = 20Hz to 20 kHz, G = 0dB, Vic = 200 mVpp
Channel separation
RL = 16Ω, G = 0dB, F = 1kHz, Po = 40mW
RL = 10kΩ, G = 0dB, F = 1kHz, Vout = 1.6Vrms
60
80
Signal to noise ratio, A-weighted, RL=16 Ω, Vout = 0.9Vrms
THD+N < 1%, F = 1kHz, G=+4 dB(3)
Output noise voltage, A-weighted
G= +4dB
G=-19.5dB
InL/R+ - InL/R- = 1Vrms
-
Gain step size
from -60dB to -36dB
from -36dB to -16.5dB
from -16.5dB to +4dB
-
Step size error
65
dB
82
84
dB
101
dB
(3)
Gain range with Gain(dB) = 20xlog[(VoutL/R)/(InL/R+ - InL/R-)]
Mute
dB
Gain error (G = +4dB)
-100
dBV
+4
dB
-80
dB
-103
-60
3
1.5
0.5
dB
-1
+1
stepsize
-0.45
+0.42
dB
14.5
29
kΩ
Zin
Left and right channel input impedance all gains setting
Single-ended inputs referenced to GND
Differential inputs
10
20
Zout
Output impedance in Mode 5 (negative supply is ON and
amplifier output stages are OFF)(3)
F < 40kHz
F = 6MHz
F = 36MHz
10
500
75
twu
Wake-up time
12
tSTBY
Standby time
10
12
24
kΩ
Ω
Ω
22
ms
µs
1. Guaranteed by design and parameter correlation.
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is an added sinus signal to VCC @ F = 217 Hz.
3. Guaranteed by design and parameter correlation.
7/28
Electrical characteristics
3.2
Note:
8/28
TS4601
Electrical characteristic curves
Current consumption vs. power supply voltage
see Figure 2
Standby current consumption vs. power supply voltage
see Figure 3 and Figure 4
Maximum output power vs. power supply voltage
see Figure 5
Maximum output power vs. power supply voltage
see Figure 6
Maximum output voltage vs. power supply voltage
see Figure 7
PSRR vs. frequency
see Figure 8 to Figure 12
PSRR vs. gain setting
see Figure 13
THD+N vs. output power
see Figure 14 to Figure 25
THD+N vs. output voltage
see Figure 26
THD+N vs. frequency
see Figure 27
THD+N vs. frequency
see Figure 28 to Figure 39
CMRR vs. frequency
see Figure 40 and Figure 41
Crosstalk vs. frequency
see Figure 42 to Figure 45
Common mode response vs. frequency
see Figure 46
THD+N vs. input voltage. Line in mode 5
see Figure 47
Input impedance vs. frequency. Line in mode 5
see Figure 48
Gain vs. frequency
see Figure 49
When the label “RC network” is present in a curve, it means that a 12 Ω + 1 nF low pass filter
connected on outputs is used (refer to Figure 1: Typical application schematics for the
TS4601 on page 4).
TS4601
Electrical characteristics
Current consumption vs. power
supply voltage
Figure 3.
1000
Mode 4
5.5
Current Consumption (mA)
Current Consumption SDZ=Gnd (nA)
6.0
5.0
4.5
Mode 2, 3
4.0
3.5
3.0
2.5
Mode 5
2.0
1.5 No load
1.0 SDZ = Vcc
SDA = SCL = Vcc
0.5
Ta = 25°C
0.0
3.0
3.5
4.0
4.5
5.0
5.5
100
90
800
Mode 1, 6, 7, 8
Figure 4.
70
60
50
400
40
SDZ=Gnd
30
200 No load
SDA = SCL = Vcc
Ta = 25°C
0
3.0
3.5
Standby current consumption vs.
standby voltage
Figure 5.
250
1E-4
225
Vcc=2.9V
Output power (mW)
Current Consumption (nA)
275
Vcc=3.6V
1E-5
1E-6
No load
SDA = SCL = Vcc
Ta = 25°C
4.5
5.0
5.5
0.5
1.0
1.5
2.0 2.5 3.0 3.5
SDZ Voltage (V)
4.0
4.5
RL = 16Ω, F = 1kHz
Left & Right
BW < 30kHz, Tamb = 25°C
THD+N=10% (180°)
200
175
150
125
THD+N=10% (0°)
100
THD+N=1% (180°)
75
THD+N=1% (0°)
25
0
5.0
Maximum output power vs. power
supply voltage
3.0
Figure 7.
3.5
4.0
4.5
Vcc (V)
5.0
5.5
Maximum output voltage vs. power
supply voltage
3.0
RL = 32Ω, F = 1kHz
Left & Right
BW < 30kHz, Tamb = 25°C
2.5
125
Output Voltage (Vrms)
Output power (mW)
0
4.0
Maximum output power vs. power
supply voltage
50
175
100
THD+N=10% (180°)
75
THD+N=10% (0°)
50
THD+N=1% (180°)
25
0
10
300
Vcc=5V
Figure 6.
20
Power Supply Voltage (V)
1E-3
1E-7
0.0
80
600
Power Supply Voltage (V)
150
Standby current consumption vs.
power supply voltage
Current Consumption SDZ=Vcc ( A)
Figure 2.
3.5
4.0
4.5
Vcc (V)
2.0
1.5
THD+N=10% (0° & 180°)
THD+N=1% (0° & 180°)
1.0
0.5
THD+N=1% (0°)
3.0
RL = RC network + 10kΩ, F = 1kHz
Left & Right
BW < 30kHz, Tamb = 25°C
5.0
5.5
0.0
3.0
3.5
4.0
4.5
Vcc (V)
5.0
5.5
9/28
Electrical characteristics
Figure 8.
TS4601
PSRR vs. frequency
Figure 9.
0
-20
PSRR (dB)
-30
-40
-50
Vripple = 200mVpp
G = 4dB
Inputs = grounded
Left & Right
RL = 16Ω
Tamb = 25°C
PSRR (dB)
-10
Vcc=2.9V
-60
-70
-80
-90
Vcc=3.6V
-100
Vcc=5V
-110
-120
20
100
1000
Frequency (Hz)
10000 20k
Figure 10. PSRR vs. frequency
PSRR (dB)
-30
-40
-50
Vripple = 200mVpp
G = 4dB
Inputs = grounded
Left & Right
RL = 32Ω
Tamb = 25°C
PSRR (dB)
-20
Vcc=2.9V
-60
-70
-80
-90
Vcc=3.6V
-100
Vcc=5V
-110
-120
20
100
1000
Frequency (Hz)
0
-10 Vripple = 200mVpp
-20 G = 4dB
-30 Inputs = grounded
-40 Left & Right
-50 RL = RC network + 16Ω
Tamb = 25°C
-60
Vcc=2.9V
-70
-80
-90
-100
Vcc=3.6V
-110
-120
Vcc=5V
-130
20
100
1000
10000 20k
Frequency (Hz)
Figure 11. PSRR vs. frequency
0
-10
10000 20k
Figure 12. PSRR vs. frequency
0
-10 Vripple = 200mVpp
-20 G = 4dB
-30 Inputs = grounded
-40 Left & Right
-50 RL = RC network + 32Ω
Tamb = 25°C
-60
Vcc=2.9V
-70
-80
-90
-100
Vcc=3.6V
-110
Vcc=5V
-120
-130
20
100
1000
10000 20k
Frequency (Hz)
Figure 13. PSRR vs. gain setting
0
0
-20
PSRR (dB)
-30
-40
-50
Vripple = 200mVpp
G = 4dB
Inputs = grounded
Left & Right
RL = RC network + 10kΩ
Tamb = 25°C
-60
-20
-40
PSRR (dB)
-10
PSRR vs. frequency
Vcc=2.9V
-70
Vripple = 200mVpp
F = 217Hz
RL ≥ 16Ω
Vcc = 2.9V to 5.5V
Ta = 25°C
-60
-80
-80
Left & Right
-90
Vcc=3.6V
-100
Vcc=5V
-110
-120
20
10/28
-100
100
1000
Frequency (Hz)
10000 20k
-120
-80
-60
-40
-20
Gain setting (dB)
0 4
TS4601
Electrical characteristics
Figure 14. THD+N vs. output power
Figure 15. THD+N vs. output power
10
RL = 16Ω
Vcc = 5V
G = 4dB
1 Inputs = 0°
Left & Right
BW < 30kHz
Tamb = 25°C
0.1
THD+N (%)
THD+N (%)
10
F=8kHz
F=80Hz
RL = 16Ω
Vcc = 5V
G = 4dB
1 Inputs = 180°
Left & Right
BW < 30kHz
Tamb = 25°C
0.1
F=8kHz
F=80Hz
F=1kHz
0.01
0.01
F=1kHz
1
10
100
Output Power (mW)
Figure 16. THD+N vs. output power
1
Figure 17. THD+N vs. output power
10
RL = 16Ω
Vcc = 3.6V
G = 4dB
1 Inputs = 0°
Left & Right
BW < 30kHz
Tamb = 25°C
0.1
THD+N (%)
THD+N (%)
10
F=8kHz
F=80Hz
0.01
RL = 16Ω
Vcc = 3.6V
G = 4dB
1 Inputs = 180°
Left & Right
BW < 30kHz
Tamb = 25°C
F=8kHz
F=1kHz
0.1
0.01
F=1kHz
1
F=80Hz
10
100
Output Power (mW)
Figure 18. THD+N vs. output power
1
10
100
Output Power (mW)
Figure 19. THD+N vs. output power
10
10
RL = 16Ω
Vcc = 2.9V
G = 4dB
1 Inputs = 0°
Left & Right
BW < 30kHz
Tamb = 25°C
F=8kHz
THD+N (%)
THD+N (%)
10
100
Output Power (mW)
0.1
RL = 16Ω
Vcc = 2.9V
G = 4dB
1 Inputs = 180°
Left & Right
BW < 30kHz
Tamb = 25°C
F=8kHz
F=1kHz
0.1
F=80Hz
F=1kHz
0.01
1
10
Output Power (mW)
0.01
100
F=80Hz
1
10
Output Power (mW)
100
11/28
Electrical characteristics
TS4601
Figure 20. THD+N vs. output power
Figure 21. THD+N vs. output power
10
RL = 32Ω
Vcc = 5V
G = 4dB
1 Inputs = 0°
Left & Right
BW < 30kHz
Tamb = 25°C
THD+N (%)
THD+N (%)
10
F=8kHz
0.1
RL = 32Ω
Vcc = 5V
G = 4dB
1 Inputs = 180°
Left & Right
BW < 30kHz
Tamb = 25°C
0.1
F=1kHz
0.01
F=1kHz
0.01
F=80Hz
1
10
Output Power (mW)
100
Figure 22. THD+N vs. output power
100
10
RL = 32Ω
Vcc = 3.6V
G = 4dB
1 Inputs = 0°
Left & Right
BW < 30kHz
Tamb = 25°C
F=8kHz
0.1
RL = 32Ω
Vcc = 3.6V
G = 4dB
1 Inputs = 180°
Left & Right
BW < 30kHz
Tamb = 25°C
0.01
F=1kHz
0.01
F=80Hz
1
F=8kHz
0.1
F=1kHz
10
Output Power (mW)
100
Figure 24. THD+N vs. output power
F=80Hz
1
10
Output Power (mW)
100
Figure 25. THD+N vs. output power
10
10
RL = 32Ω
Vcc = 2.9V
G = 4dB
1 Inputs = 0°
Left & Right
BW < 30kHz
Tamb = 25°C
THD+N (%)
THD+N (%)
10
Output Power (mW)
Figure 23. THD+N vs. output power
THD+N (%)
THD+N (%)
F=80Hz
1
10
F=8kHz
0.1
RL = 32Ω
Vcc = 2.9V
G = 4dB
1 Inputs = 180°
Left & Right
BW < 30kHz
Tamb = 25°C
F=8kHz
0.1
F=1kHz
F=1kHz
0.01
0.01
F=80Hz
1
12/28
F=8kHz
10
Output Power (mW)
F=80Hz
100
1
10
Output Power (mW)
100
TS4601
Electrical characteristics
Figure 26. THD+N vs. output voltage
Figure 27. THD+N vs. frequency
10
0.1
THD + N (%)
THD+N (%)
1
1
RL = RC network + 10kΩ
Vcc = 2.9V to 5.5V, G = 4dB
Inputs = 0° & 180°
Left & Right
BW < 30kHz, Tamb = 25°C
F=1kHz
F=8kHz
RL = RC network + 10kΩ
Vcc = 2.9V to 5.5V
G = 4dB
Inputs = 0° & 180°
Left & Right
Bw < 30kHz
0.1
Tamb = 25°C
Vo=1.5Vrms
0.01
1E-3
10
20
100
1000
Output Voltage (mVrms)
Figure 28. THD+N vs. frequency
1000
Frequency (Hz)
10000 20k
1
RL = 16Ω
Vcc = 5V, G = 4dB
Inputs = 0°
Left & Right
Bw < 30kHz
0.1 Tamb = 25°C
THD + N (%)
THD + N (%)
100
Vo=400mVrms
Figure 29. THD+N vs. frequency
1
Po=70mW
0.01
100
1000
Frequency (Hz)
RL = 16Ω
Vcc = 5V, G = 4dB
Inputs = 180°
Left & Right
Bw < 30kHz
0.1 Tamb = 25°C
10000 20k
Figure 30. THD+N vs. frequency
Po=70mW
0.01
Po=10mW
20
Po=10mW
20
100
1000
Frequency (Hz)
10000 20k
Figure 31. THD+N vs. frequency
1
1
RL = 16Ω
Vcc = 3.6V, G = 4dB
Inputs = 0°
Left & Right
Bw < 30kHz
0.1 Tamb = 25°C
Po=70mW
0.01
THD + N (%)
THD + N (%)
Vo=30mVrms
0.01
F=80Hz
Po=10mW
20
100
1000
Frequency (Hz)
10000 20k
RL = 16Ω
Vcc = 3.6V, G = 4dB
Inputs = 180°
Left & Right
Bw < 30kHz
0.1 Tamb = 25°C
Po=70mW
0.01
Po=10mW
20
100
1000
Frequency (Hz)
10000 20k
13/28
Electrical characteristics
TS4601
Figure 32. THD+N vs. frequency
Figure 33. THD+N vs. frequency
1
RL = 16Ω
Vcc = 2.9V
G = 4dB
Inputs = 0°
Left & Right
0.1 Bw < 30kHz
Tamb = 25°C
Po=50mW
THD + N (%)
THD + N (%)
1
RL = 16Ω
Vcc = 2.9V
G = 4dB
Inputs = 180°
Left & Right
0.1 Bw < 30kHz
Tamb = 25°C
Po=50mW
Po=10mW
0.01
0.01
20
100
1000
Frequency (Hz)
10000 20k
Figure 34. THD+N vs. frequency
20
THD + N (%)
THD + N (%)
1000
Frequency (Hz)
10000 20k
1
RL = 32Ω
Vcc = 5V
G = 4dB
Inputs = 0°
Left & Right
0.1 Bw < 30kHz
Tamb = 25°C
Po=60mW
Po=10mW
0.01
20
100
1000
Frequency (Hz)
RL = 32Ω
Vcc = 5V
G = 4dB
Inputs = 180°
Left & Right
0.1 Bw < 30kHz
Tamb = 25°C
Po=60mW
Po=10mW
0.01
10000 20k
Figure 36. THD+N vs. frequency
20
100
1000
Frequency (Hz)
10000 20k
Figure 37. THD+N vs. frequency
1
RL = 32Ω
Vcc = 3.6V
G = 4dB
Inputs = 0°
Left & Right
0.1 Bw < 30kHz
Tamb = 25°C
THD + N (%)
1
THD + N (%)
100
Figure 35. THD+N vs. frequency
1
Po=60mW
Po=10mW
0.01
20
14/28
Po=10mW
100
1000
Frequency (Hz)
10000 20k
RL = 32Ω
Vcc = 3.6V
G = 4dB
Inputs = 180°
Left & Right
0.1 Bw < 30kHz
Tamb = 25°C
Po=60mW
Po=10mW
0.01
20
100
1000
Frequency (Hz)
10000 20k
TS4601
Electrical characteristics
Figure 38. THD+N vs. frequency
Figure 39. THD+N vs. frequency
1
1
Po=50mW
Po=10mW
0.01
20
100
RL = 32Ω
Vcc = 2.9V
G = 4dB
Inputs = 0°
Left & Right
0.1 Bw < 30kHz
Tamb = 25°C
THD + N (%)
THD + N (%)
RL = 32Ω
Vcc = 2.9V
G = 4dB
Inputs = 0°
Left & Right
0.1 Bw < 30kHz
Tamb = 25°C
1000
Frequency (Hz)
20
-30
-40
-10
-20
CMRR (dB)
CMRR (dB)
-20
-30
-50
-60
-60
-70
-70
-80
20
100
1000
Frequency (Hz)
ΔVic = 200mVpp
G = 0dB
Left & Right
RL ≥ 16Ω
Tamb = 25°C
Vcc=2.9V to 5.5V
-80
20
10000 20k
Figure 42. Crosstalk vs. frequency
100
1000
Frequency (Hz)
10000 20k
Figure 43. Crosstalk vs. frequency
100
100
Right to Left
90
Right to Left
90
80
80
70
Left to Right
Crosstalk (dB)
Crosstalk (dB)
10000 20k
-40
Vcc=2.9V to 5.5V
-50
60
50
40
10
1000
Frequency (Hz)
0
ΔVic = 200mVpp
G = 4dB
Left & Right
RL ≥ 16Ω
Tamb = 25°C
-10
20
100
Figure 41. CMRR vs. frequency
0
30
Po=10mW
0.01
10000 20k
Figure 40. CMRR vs. frequency
Po=50mW
G = 4dB
Vcc = 5V
Pout = 40mW
RL = 16Ω
Tamb = 25°C
0
20
100
70
50
40
30
20
10
1000
Frequency (Hz)
10000 20k
Left to Right
60
G = 4dB
Vcc = 3.6V
Pout = 40mW
RL = 16Ω
Tamb = 25°C
0
20
100
1000
Frequency (Hz)
10000 20k
15/28
Electrical characteristics
TS4601
Figure 44. Crosstalk vs. frequency
Figure 45. Crosstalk vs. frequency
100
100
Right to Left
90
80
80
Left to Right
Crosstalk (dB)
Crosstalk (dB)
70
60
50
40
G = 4dB
Vcc = 2.9V
Pout = 40mW
RL = 16Ω
Tamb = 25°C
30
20
10
0
20
70
50
40
10
100
1000
Frequency (Hz)
0
20
10000 20k
-30
100
1000
Frequency (Hz)
10000 20k
Figure 47. THD+N vs. input voltage. Line in
mode 5
10
VCMS = 20mVrms
G = All gains
Left & Right
RL ≥ 16Ω
Tamb = 25°C
1
THD+N (%)
-20
G = 4dB
Vcc = 2.9V to 5.5V
Vout = 1.6Vrms
RL = RC network + 10kΩ
Tamb = 25°C
20
0
-10
Left to Right
60
30
Figure 46. Common mode response vs.
frequency
CMS response : Vout/VCMS (dB)
Right to Left
90
-40
0.1
Mode 5
Vcc = 2.9V to 5.5V
Zout generator = 1kΩ
BW < 30kHz, Tamb = 25°C
Line In F=80Hz, 1kHz, 8kHz
0.01
-50
-60
1E-3
Vcc=2.9V to 5.5V
-70
Reference F=80Hz, 1kHz, 8kHz
-80
20
100
1000
Frequency (Hz)
1
0.1
0
-2
10
100
1000
Frequency (kHz)
10000
RL=RC network+10kΩ, Vo=1Vrms
-4
-8
1
RL=16Ω, Po=20mW
2
-6
0.1
1
4
Mode 5
Vcc = 2.9V to 5.5V
Vin = 1Vrms
Tamb = 25°C
10
0.01
0.1
Input Voltage (Vrms)
Figure 49. Gain vs. frequency
Gain(dB)
Zin from outputs (k )
Figure 48. Input impedance vs. frequency.
Line in mode 5
16/28
1E-4
1E-3
10000 20k
-10
10
Vcc = 2.9V to 5.5V
G = 0dB
Cin = 4.7μF
Left & Right
Tamb = 25°C
100
1000
10000
Frequency (Hz)
100000
TS4601
Application information
4
Application information
4.1
Common-mode sense
The TS4601 implements a common-mode sense to correct the voltage differences that
might occur between the headphone jack return and the GND of the device, thus creating
parasitic noise in the headphone and/or line-out.
The solution to strongly reduce and practically eliminate this noise, is to connect the
headphone jack ground to the CMS of the device that is a common-mode sense pin. It will
sense the difference of potential (voltage noise) between the TS4601 ground and
headphone ground. Thanks to CMS frequency response (refer to Figure 46 on page 16),
this noise is removed from the TS4601 outputs. Figure 1: Typical application schematics for
the TS4601 illustrates this connection.
4.2
I²C bus interface
In compliance with the I²C protocol, the TS4601 uses a serial bus to control the chip’s
functions with two wires: Clock (SCL) and Data (SDA). The clock line and the data line are
bi-directional (open-collector) with an external chip pull-up resistor (typically 10 kΩ). The
maximum clock frequency in fast-mode specified by the I²C standard is 400 kHz, which
TS4601 supports. In this application, the TS4601 is always the slave device and the
controlling microcontroller MCU is the master device.
The slave address of the TS4601 is 1100 000x (C0h).
An SDZ pin is available to shut down the circuit from a master MCU.
Table 7 summarizes the pin descriptions for the I²C bus interface.
Table 7.
I²C bus interface pin descriptions
Pin
4.2.1
Functional description
SDA
Serial data pin
SCL
Clock input pin
SDZ
Master standby of the TS4601
I²C bus operation
The host MCU can write into the TS4601 control register to control the TS4601, and read
from the control register to get a configuration from the TS4601. The TS4601 is addressed
by the byte consisting of the 7-bit slave address and R/W bit.
Table 8.
The first byte after the START message for addressing the device
A6
A5
A4
A3
A2
A1
A0
R/W
1
1
0
0
0
0
0
X
There are five control registers (see Table 9) named CR0 to CR4. In read mode, all the
control registers can be accessed. In write mode, only CR1 and CR2 can be addressed.
17/28
Application information
Table 9.
TS4601
Control registers summary
Description
CR0
D7
D6
D5
D4
D3
D2
D1
D0
SC_L
SC_R
T_SH
0
0
0
0
0
0
0
0
0
0
CR1 - modes
Output modes
CR2 - volume control
Mute_L
Mute_R
Volume control
CR3
0
0
0
0
0
0
0
0
CR4 - identification
0
1
0
0
0
0
0
1
To write in the control registers:
In order to write data into the TS4601, after the “start” message, the MCU must:
●
send byte with the I²C 7-bit slave address and with a low level for the R/W bit
●
send the data (control register setting)
All bytes are sent with MSB first. The transfer of written data ends with a “stop” message.
When transmitting several data, the data can be written with no need to repeat the “start”
message and addressing byte with the slave address.
When writing several bytes, the data is transmitted as follows:
●
CR1 CR2 CR2 CR2... this is an advantage for a fast increase/decrease of the volume
control.
Figure 50. I²C write operations
CONTROL REGISTERS
SLAVE ADDRESS
CR2
CR1
CR2
SDA
S
1
1
0
0
0
0
0
0
A
D7 D6
D1 D0 A
D7 D6
D1 D0
A
D7 D6
D1 D0 A
P
Stop
condition
Start condition
R/W
Acknowledge
from Slave
Acknowledge
from Slave
To read from the control registers:
In order to read data from the TS4601, after the “start” message, the MCU must:
●
send byte with the I²C 7-bit slave address and with a high level for the R/W bit
●
receive the data (control register value)
All bytes are read with MSB first. The transfer of read data ends with the “stop” message.
When transmitting several data, the data can be read with no need to repeat the “start”
message and the byte with the slave address. In this case, the value of the control register is
read repeatedly, CR0, CR1, CR2, CR3, CR4, CR0, CR1 etc.
18/28
TS4601
Application information
Figure 51. I²C read operations
CONTROL REGISTERS
SLAVE ADDRESS
CR0
CR1
CR2
SDA
S
1
1
0
0
0
0
0
1
A D7
D0 A D7
D0 A D7
CR4
CR3
D0 A D7
D0 A D7
D0 A
P
Stop
condition
Start condition
R/W
Acknowledge
from Slave
Acknowledge
4.2.2
Control registers
Table 10.
Output mode configuration - CR1
Headphone output Headphone output
Left
Right
Modes register
Negative supply
and regulators
SD(1)
SD
SD
Mode 2: channel R
SD
GxINR
ON
0
Mode 3: channel L
GxINL
SD
ON
1
1
Mode 4: on
GxINL
GxINR
ON
1
0
0
Mode 5: Line-in mode
SD
SD
ON
1
0
1
Mode 6: standby
SD
SD
SD
1
1
0
Mode 7: standby
SD
SD
SD
1
1
1
Mode 8: standby
SD
SD
SD
0
0
0
Mode 1: standby
0
0
1
0
1
0
1. SD: shutdown,I NR: audio input right, INL: audio input left, G: gain for channel R and channel L, ON: when a function is
active.
The TS4601 can be set to standby in two different ways:
●
A master standby from an MCU using SDZ input, can set the TS4601 in master
standby. The lowest current consumption (Istby=2 µA maximum) is achieved with a 0 V
on SDZ. At 0.63 V, Istby is 20 µA maximum. Note that the SDZ input has a
600 kΩ +/-20% pull-down resistor. If VSDZ > 0 V, an additional current consumption
has to be taken into consideration and provided by the MCU IO. This additional current
is VSDZ/600kΩ (+/-20%). During master standby mode, amplifiers, power management
and I2C part are disabled thus offering the most current-saving standby mode.
●
The TS4601 can also be set to I²C standby by an I²C command. In this case the Istby is
slightly higher and is Istby=75 µA maximum (including current consumption on SDA and
SCL inputs).
When the TS4601 is in Master standby or I²C standby mode (on one or both channels), the
corresponding amplifier output is forced to ground through a 16 Ω resistor. In mode 5, in
which amplifiers are inactive but the power management part is active, the amplifier outputs
are in high impedance state to allow line in function.
19/28
Application information
Table 11.
TS4601
Volume control register - CR2
Volume control range: -60 dB to +4 dB
20/28
D5
D4
D3
D2
D1
D0
Gain
(in dB)
D5
D4
D3
D2
D1
D0
Gain
(in dB)
0
0
0
0
0
0
Mute:
-80dB
1
0
0
0
0
0
-11.5dB
0
0
0
0
0
1
-60dB
1
0
0
0
0
1
-11dB
0
0
0
0
1
0
-57dB
1
0
0
0
1
0
-10.5dB
0
0
0
0
1
1
-54dB
1
0
0
0
1
1
-10dB
0
0
0
1
0
0
-51dB
1
0
0
1
0
0
-9.5dB
0
0
0
1
0
1
-48dB
1
0
0
1
0
1
-9dB
0
0
0
1
1
0
-45dB
1
0
0
1
1
0
-8.5dB
0
0
0
1
1
1
-42dB
1
0
0
1
1
1
-8dB
0
0
1
0
0
0
-39dB
1
0
1
0
0
0
-7.5dB
0
0
1
0
0
1
-36dB
1
0
1
0
0
1
-7dB
0
0
1
0
1
0
-34.5dB
1
0
1
0
1
0
-6.5dB
0
0
1
0
1
1
-33dB
1
0
1
0
1
1
-6dB
0
0
1
1
0
0
-31.5dB
1
0
1
1
0
0
-5.5dB
0
0
1
1
0
1
-30dB
1
0
1
1
0
1
-5dB
0
0
1
1
1
0
-28.5dB
1
0
1
1
1
0
-4.5dB
0
0
1
1
1
1
-27dB
1
0
1
1
1
1
-4dB
0
1
0
0
0
0
-25.5dB
1
1
0
0
0
0
-3.5dB
0
1
0
0
0
1
-24dB
1
1
0
0
0
1
-3dB
0
1
0
0
1
0
-22.5dB
1
1
0
0
1
0
-2.5dB
0
1
0
0
1
1
-21dB
1
1
0
0
1
1
-2dB
0
1
0
1
0
0
-19.5dB
1
1
0
1
0
0
-1.5dB
0
1
0
1
0
1
-18dB
1
1
0
1
0
1
-1dB
0
1
0
1
1
0
-16.5dB
1
1
0
1
1
0
-0.5dB
0
1
0
1
1
1
-16dB
1
1
0
1
1
1
0dB
0
1
1
0
0
0
-15.5dB
1
1
1
0
0
0
0.5dB
0
1
1
0
0
1
-15dB
1
1
1
0
0
1
1dB
0
1
1
0
1
0
-14.5dB
1
1
1
0
1
0
1.5dB
0
1
1
0
1
1
-14dB
1
1
1
0
1
1
2dB
0
1
1
1
0
0
-13.5dB
1
1
1
1
0
0
2.5dB
0
1
1
1
0
1
-13dB
1
1
1
1
0
1
3dB
0
1
1
1
1
0
-12.5dB
1
1
1
1
1
0
3.5dB
0
1
1
1
1
1
-12dB
1
1
1
1
1
1
4dB
TS4601
Application information
In the volume register, MUTE_L, and MUTE_R are dedicated bits to enable the mute
independently from the channel. When MUTE_L, MUTE_R are set to VIH, the mute function
is enabled on the corresponding channel. When MUTE_L, MUTE_R are set to VIL, the gain
level is applied to the channel.
Control register CR0
Amplifier output short-circuit detection:
The outputs of the amplifier are protected against short-circuits that might occur accidentally
during manipulation of the device. In the typical application, if a short-circuit arises on the
jack plug, there is no detection due to the serial resistor present on the amplifier output, thus
the output current threshold is not reached.
To be active, the detection has to occur directly on the amplifier output with a signal
modulation on the inputs of the TS4601.
If a short-circuit is detected on one channel, a flag is raised in the I²C read register CR0.
●
SC_L: equals 0 during normal operation, equals 1 when a short-circuit is detected on
the left channel
●
SC_R: equals 0 during normal operation, equals 1 when a short-circuit is detected on
the right channel
The corresponding channel output stage is then set to high impedance mode. An I²C read
command allows the reading of the SC_L and SC_R flags but does not reset them. An I²C
write command has to be sent to reset the flags to 0 and restore normal operation.
When the TS4601 is in I²C standby mode, the SC_L and SC_R flags are in an undetermined
state.
Thermal shutdown protection:
A thermal shutdown protection is implemented to protect the device from overheating. If the
temperature rises above the thermal junction of 150°C, the device is put into standby mode
and a flag is raised in the read register CR0.
●
T_SH: equals 0 during normal operation, equals 1 when a thermal shutdown is
detected.
When the temperature decreases to safe levels, the circuit switches back to normal
operation and the corresponding flag is cleared.
21/28
Application information
4.3
TS4601
Wake-up and standby time definition
The wake-up time of the TS4601 is guaranteed at 12 ms typical (refer to Section 3.1:
Electrical characteristics tables on page 6). However, as the TS4601 is activated with an I2C
bus, the wake-up start procedure is as follows:
1.
The master sends a start bit
2.
The master sends the address.
3.
The slave (TS4601) answers by an acknowledge.
4.
The master sends the output mode configuration (CR1).
5.
If the TS4601 was in I2C standby (mode 1, 6, 7), the wake-up starts on the falling edge
of the eighth clock signal (SCL) corresponding to CR1 byte.
6.
12 ms after (de-pop sequence time), the TS4601 outputs are operational.
The standby time is guaranteed as 10 µs typical (refer to Section 3.1: Electrical
characteristics tables on page 6). However, as the TS4601 is de-activated with an I2C bus,
the standby time operates as follows:
1.
4.4
The master sends a start bit
2.
The master sends the address.
3.
The slave (TS4601) answers by an acknowledge.
4.
The master sends the output mode configuration (CR1) and in this case it corresponds
to mode 1, 6, 7.
5.
The standby time starts on the falling edge of the eighth clock signal (SCL)
corresponding to CR1 byte.
6.
After 10 µs, the TS4601 is in standby mode.
Decoupling considerations
The TS4601 needs two decoupling capacitors for the positive power supply (battery) and
two capacitors for normal operation of the internal negative supply (refer to Figure 1: Typical
application schematics for the TS4601 on page 4). These capacitors must be placed as
close as possible of the TS4601 to minimize parasitic inductance and resistance that have a
negative impact on audio performance.
Two decoupling capacitors (Cs) of 1 µF and low ESR are recommended for positive power
supply decoupling. Packages like the 0402 or 0603 are also recommended because the
placement close to TS4601 is easier. X5R dielectric for capacitor tolerance behavior and
10 V DC rating voltage for 5 V operation or 6.3 V DC rating operation for 3.6 V operation to
take into consideration the ΔC/ΔV variation of this type of dielectric.
Two decoupling capacitors (C12 and Css) of respectively 1 µF and 2.2 µF and low ESR are
recommended for internal negative power supply decoupling. Packages like the 0402 or
0603 are also recommended because the placement close to TS4601 is easier. X5R
dielectric for capacitor tolerance behavior and 10 V DC rating voltage for 5 V operation or
6.3 V DC rating operation for 3.6 V operation to take into consideration the ΔC/ΔV variation
of this type of dielectric.
22/28
TS4601
4.5
Application information
Low frequency response
Input coupling capacitors Cin (see Figure 1: Typical application schematics for the TS4601
on page 4) are mandatory for TS4601 operation. Cin with Zin (see Section 3.1: Electrical
characteristics tables on page 6) form a first order high pass filter and the -3 dB cut-off
frequency is:
1
F c ( – 3dB ) = ----------------------2πZ in C in
Zin is the single-ended input impedance.
Because Zin is independent from the gain setting, determining the appropriate Cin is very
simple. However, the tolerance of Zin (refer to Section 3.1: Electrical characteristics tables
on page 6) must be taken into consideration for determining Cin.
Therefore, for a given Fc, the value of Cin is given by the following equation:
⎛ C · = 16
------⎞ ≤⎛ C
= 13.3
-----------⎞ ≤⎛ C in = 11
------⎞
⎝ in min F ⎠ ⎝ in typ
max
Fc ⎠ ⎝
F c⎠
c
(With Cin in µF and Fc in Hz).
4.6
Low pass output filter
The TS4601 is designed to operate with a passive first order low pass filter (see Figure 1:
Typical application schematics for the TS4601 on page 4). This low pass filter is mandatory
to ensure stability of the TS4601.
Rout must have a value of 12 Ω minimum and Cout a value of 0.8 nF minimum up to 100 nF
maximum. Values of 12 Ω and 1 nF are a good start point for a design able to drive a classic
headphone (16 Ω, 32 Ω, 60 Ω) and the line-in of any Hi-fi system or sound card. The cut-off
frequency of this filter (12 Ω and 1 nF) is about 13 MHz and clearly above the audio band.
23/28
Application information
4.7
TS4601
Single-ended input configuration
The TS4601 can be used in single-ended input configuration. InR- and InL- must be shorted
to ground through input capacitors. All Cin capacitors must have the same value to keep the
same PSRR performance as in differential input configuration. Figure 52 shows an example.
Figure 52. Typical application schematics for the TS4601 in single-ended input
Vcc
Cs
1uF
TS4601
Gnd
C1
Vcc
Positive
Reg
B3
D4
Master Standby Command
Cin
2.2uF
Right Input
Cin
2.2uF
Gnd
InLInL+
-
-
+
+
C3
InR+
C4
InR-
D3
SDA
D2
SCL
Cout
0.8nF min.
12 ohms min.
B1
Rout
SDZ
C2
Gnd
I2C
I2C Bus
Negative
Supply
Gnd
C1
C2
A4
A3
A2
A1
Cs
1uF
Gnd
Gnd
The gain in this configuration is given by:
V outL
Gain ( dB ) = 20 log ⎛ -------------------------⎞
⎝ V inputLeft⎠
or:
V outR
Gain ( dB ) = 20 log ⎛ ----------------------------⎞
⎝ V inputRight⎠
Headphone / Line Out
12 ohms min.
VoutR
D1
Cout
0.8nF min.
Rout
Negative
Reg
PVcc
Vcc
24/28
VoutL
CMS
-
Left Input
B4
Gnd
-
Cin
2.2uF
+
Cin
2.2uF
+
Gnd
PVss
B2
Css
2.2uF
C12
1uF
Gnd
Gnd
TS4601
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in
ECOPACK® packages. These packages have a lead-free second level interconnect. The
category of second level interconnect is marked on the package and on the inner box label,
in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics
trademark. ECOPACK specifications are available at: www.st.com.
Figure 53. TS4601 footprint recommendation
500μm
75µm min.
100μm max.
500μm
500μm
Φ=250μm
Track
Φ=400μm typ.
150μm min.
Φ=340μm min.
500μm
5
Package information
Non Solder mask opening
Pad in Cu 18μm with Flash NiAu (2-6μm, 0.2μm max.)
Figure 54. Pinout
Bottom view
Top view
SDZ
SDA
SCL
VOUTR
D
D
VOUTR
SCL
SDA
SDZ
INR-
INR+
CMS
VCC
C
C
VCC
CMS
INR+
INR-
INL-
INL+
PVSS
VOUTL
B
B
VOUTL
PVSS
INL+
INL-
PVCC
GND
C1
C2
A
A
C2
C1
GND
PVCC
3
2
1
1
2
3
4
4
Balls are underneath
25/28
Package information
TS4601
Figure 55. Marking (top view)
■
Logo: ST
■
Symbol for lead-free: E
■
Part number: 01
■
X digit: Assembly code
E
01X
■
Date code: YWW
■
The dot marks pin A1
YWW
Figure 56. Flip-chip - 16 bumps
2100µm
2100µm
500µm
500µm
■
Die size: 2.1mm x 2.1mm ± 30µm
■
Die height (including bumps): 600µm
■
Bumps diameter: 315µm ±50µm
■
Bump diameter before reflew: 300µm
±10µm
■
Bump height: 250µm ±40µm
■
Die height: 350µm ±20µm
■
Pitch: 500µm ±50µm
■
Coplanarity: 60µm max
600µm
Figure 57. Device orientation in the tape pocket
1
1
A
Die size Y + 70µm
A
8
Die size X + 70µm
4
All dimensions are in mm
User direction of feed
26/28
TS4601
6
Ordering information
Ordering information
Table 12.
Order codes
Order code
TS4601EIJT
7
Temperature range
Package
Packing
Marking
-40° C to +85° C
Flip-chip
Tape & reel
01
Revision history
Table 13.
Document revision history
Date
Revision
Changes
15-Jan-2008
1
Initial release, preliminary information.
20-Feb-2008
2
Complete datasheet for release to market of the device.
27/28
TS4601
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2008 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
28/28