TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors IR Receiver Modules for Remote Control Systems FEATURES 1 2 3 • • • • • • • • Low supply current Photo detector and preamplifier in one package Internal filter for PCM frequency Improved shielding against EMI Supply voltage: 2.5 V to 5.5 V Improved immunity against ambient light Insensitive to supply voltage ripple and noise Taping available for top view and side view assembly • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 4 16797 MECHANICAL DATA Pinning DESCRIPTION 1 = GND, 2 = N.C., 3 = VS, 4 = OUT These products are miniaturized SMD-IR receivers for infrared remote control systems. A PIN diode and a preamplifier are assembled on a lead frame, the epoxy package acts as an IR filter. The demodulated output signal can be directly connected to a microprocessor. The TSOP62.. is a legacy product for all common IR remote control data formats. The TSOP64.. is optimized to suppress almost all spurious pulses from energy saving fluorescent lamps. They may suppress some data signals. This component has not been qualified according to automotive specifications. PARTS TABLE AGC Carrier frequency Package 30 kHz 33 kHz 36 kHz 38 kHz 40 kHz 56 kHz Pinning Dimensions (mm) Mounting Application Best remote control code LEGACY, FOR RECOMMENDED FOR LONG BURST REMOTE CONTROLS (AGC2) LONG BURST CODES (AGC4) (1) TSOP6230 TSOP6430 TSOP6233 TSOP6433 TSOP6236 TSOP6436 (2)(3)(4) TSOP6238 TSOP6438 (5)(6)(9) TSOP6240 TSOP6440 TSOP6256 TSOP6456 (7)(8) 1 = GND, 2 = N.C., 3 = VS, 4 = OUT 4.0 H x 5.3 W x 7.5 L SMD Remote control (2) RC-5 (3) RC-6 (4) Panasonic (5) NEC (6) Sharp (7) r-step (8) Thomson RCA (9) r-map Note (1) We advise try AGC4 first if the burst length is unknown BLOCK DIAGRAM APPLICATION CIRCUIT 17170-10 3 33 kΩ Transmitter with TSALxxxx VS Input AGC Band pass Demo dulator VS Circuit 4 R1 IR receiver OUT + VS C1 µC OUT GND VO GND 1 PIN Control circuit GND The external components R1 and C1 are optional to improve the robustness against electrical overstress (typical values are R1 = 100 Ω, C1 = 0.1 µF). 16839-1 Rev. 1.1, 17-Sep-13 1 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER TEST CONDITION SYMBOL VALUE UNIT VS -0.3 to +6 V mA Supply voltage Supply current IS 5 Output voltage VO -0.3 to (VS + 0.3) V Output current IO 5 mA Junction temperature Tj 100 °C Tstg -25 to +85 °C Tamb -25 to +85 °C Ptot 10 mW Storage temperature range Operating temperature range Tamb ≤ 85 °C Power consumption Note • Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect the device reliability. ELECTRICAL AND OPTICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITION SYMBOL MIN. VS 2.5 VS = 5 V, Ev = 0 ISD 0.55 Ev = 40 klx, sunlight ISH 0.8 mA Ev = 0, IR diode TSAL6200, IF = 250 mA, test signal see fig. 1 d 40 m Output voltage low IOSL = 0.5 mA, Ee = 0.7 mW/m2, test signal see fig. 1 VOSL Minimum irradiance Pulse width tolerance: tpi - 5/fo < tpo < tpi + 6/fo, test signal see fig. 1 Ee min. Maximum irradiance tpi - 5/fo < tpo < tpi + 6/fo, test signal see fig. 1 Ee max. Directivity Angle of half transmission distance ϕ1/2 Supply voltage Supply current Transmission distance TYP. MAX. 0.7 0.2 UNIT 5.5 V 0.9 mA 100 mV 0.4 mW/m2 W/m2 50 ± 50 deg TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) Optical Test Signal 1.0 (IR diode TSAL6200, IF = 0.4 A, 30 pulses, f = f0, t = 10 ms) 0.9 tpo - Output Pulse Width (ms) Ee t tpi * * tpi VO T 10/f0 is recommended for optimal function Output Signal 1) 2) VOH 16110 7/f0 < td < 15/f0 tpi - 5/f0 < tpo < tpi + 6/f 0 VOL td 1) tpo 2) Input Burst Length 0.7 0.6 0.5 0.4 0.3 0.2 λ = 950 nm, Optical Test Signal, Fig.1 0.1 1 10 102 Ee - Irradiance Fig. 1 - Output Active Low Rev. 1.1, 17-Sep-13 0.8 0 0.1 t Output Pulse Width 103 104 (mW/m2) Fig. 2 - Pulse Length and Sensitivity in Dark Ambient 2 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors 600 µs Ee min. - Threshold Irradiance (mW/m2) Optical Test Signal Ee t 600 µs t = 60 ms 94 8134 Output Signal, (see fig. 4) VO VOH VOL t off t on Ee min. - Threshold Irradiance (mW/m2) ton, toff - Output Pulse Width (ms) 0.6 toff 0.4 0.3 0.2 λ = 950 nm, optical test signal, Fig. 1 0 0.1 1 10 100 Ee - Irradiance 1000 2.5 2.0 1.5 1.0 0.5 0 0.01 0.1 1 10 100 1.0 f = f0 0.9 0.8 0.7 f = 30 kHz 0.6 0.5 f = 20 kHz 0.4 f = 10 kHz 0.3 0.2 0.1 f = 100 Hz 0 1 10 000 10 100 1000 ΔVsRMS - AC Voltage on DC Supply Voltage (mV) (mW/m2) Fig. 4 - Output Pulse Diagram Fig. 7 - Sensitivity vs. Supply Voltage Disturbances 1.2 0.8 0.7 1.0 Max. Envelope Duty Cycle E e min./Ee - Rel. Responsivity Wavelength of Ambient Illumination: λ = 950 nm 3.0 Fig. 6 - Sensitivity in Bright Ambient ton 0.1 3.5 Ee - Ambient DC Irradiance (W/m2) 0.8 0.5 Correlation with Ambient Light Sources: 4.5 10 W/m2 = 1.4 kLx (Std. illum. A, T = 2855 K) 10 W/m2 = 8.2 kLx (Daylight, T = 5900 K) 4.0 t Fig. 3 - Output Function 0.7 5.0 0.8 0.6 0.4 f = f0 ± 5 % Δ f(3 dB) = f0/10 0.2 0.6 0.5 0.3 0.2 TSOP64.. 0.1 0 0.0 0.7 16925 0.9 1.1 f = 38 kHz, Ee = 2 mW/m² 0 1.3 20 40 60 80 100 120 Burst Length (Number of Cycles/Burst) f/f0 - Relative Frequency Fig. 5 - Frequency Dependence of Responsivity Rev. 1.1, 17-Sep-13 TSOP62.. 0.4 Fig. 8 - Max. Envelope Duty Cycle vs. Burst Length 3 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors 0° Ee min. - Sensitivity (mW/m2) 0.40 20° 30° 0.35 0.30 40° 0.25 1.0 0.20 0.15 0.9 50° 0.8 60° 0.10 70° 0.7 0.05 0 -30 80° -10 10 30 50 70 90 0.6 Tamb - Ambient Temperature (°C) 0.8 0.7 Ee min. - Sensitivity (mW/m2) 1.0 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 21425 800 850 900 0 0.2 0.6 0.4 0.6 0.5 0.4 0.3 0.2 0.1 0 1.5 950 1000 1050 1100 1150 λ- Wavelength (nm) 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VS - Supply Voltage (V) Fig. 10 - Relative Spectral Sensitivity vs. Wavelength Rev. 1.1, 17-Sep-13 0.2 Fig. 11 - Horizontal Directivity 0.9 0 750 0.4 d rel - Relative Transmission Distance 16801 Fig. 9 - Sensitivity vs. Ambient Temperature S (λ) rel - Relative Spectral Sensitivity 10° Fig. 12 - Sensitivity vs. Supply Voltage 4 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors SUITABLE DATA FORMAT IR Signal This series is designed to suppress spurious output pulses due to noise or disturbance signals. The devices can distinguish data signals from noise due to differences in frequency, burst length, and envelope duty cycle. The data signal should be close to the device’s band-pass center frequency (e.g. 38 kHz) and fulfill the conditions in the table below. When a data signal is applied to the product in the presence of a disturbance, the sensitivity of the receiver is automatically reduced by the AGC to insure that no spurious pulses are present at the receiver’s output. 0 Some examples which are suppressed are: 5 • DC light (e.g. from tungsten bulbs sunlight) 10 15 20 Time (ms) 16920 Fig. 13 - IR Disturbance from Fluorescent Lamp with Low Modulation • Continuous signals at any frequency IR Signal • Strongly or weakly modulated noise from fluorescent lamps with electronic ballasts (see figure 13 or figure 14) 0 5 16921 10 15 20 Time (ms) Fig. 14 - IR Disturbance from Fluorescent Lamp with High Modulation TSOP62.. TSOP64.. Minimum burst length 10 cycles/burst 10 cycles/burst After each burst of length a minimum gap time is required of 10 to 70 cycles ≥ 12 cycles 10 to 35 cycles ≥ 12 cycles For bursts greater than a minimum gap time in the data stream is needed of 70 cycles > 4 x burst length 35 cycles > 10 x burst length Maximum number of continuous short bursts/second 800 1300 Recommended for NEC code yes yes Recommended for RC5/RC6 code yes yes Recommended for Sony code yes no Recommended for Thomson 56 kHz code yes yes Recommended for Mitsubishi code (38 kHz, preburst 8 ms, 16 bit) yes yes Recommended for Sharp code yes yes Most common disturbance patterns are suppressed Even extreme disturbance patterns are suppressed Suppression of interference from fluorescent lamps Notes • For data formats with short bursts please see the datasheet of TSOP61.., TSOP63.., TSOP65.. • Example of compatible products for IR-codes: - TSOP6436: RC-5, RC-6, Panasonic - TSOP6438: NEC, Sharp, r-map - TSOP6456: r-step, Thomson RCA • For SIRCS 15 and 20 bit, Sony 12 bit IR-codes, please see the datasheet for TSOP4S40, TSOP2S40 Rev. 1.1, 17-Sep-13 5 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors PACKAGE DIMENSIONS in millimeters 7.5 Pick and place area. TT taping 7.2 (1.5) 2.8 2.2 5.3 A 1 4 0.5 ± 0.15 0.1 (1.4) 0.3 4x 0.1 1.27 2.9 3 x 1.27 = 3.81 4 0.4 A 5.51 Not indicated tolerances ± 0.3 Pick and place area. TR taping technical drawings according to DIN specifications 2.6 Footprint 2.35 3 x 1.27 = 3.81 0.9 2.2 1.27 R 1.7 Drawing-No.: 6.544-5341.01-4 Issue: 8; 02.09.09 16776 ASSEMBLY INSTRUCTIONS Reflow Soldering Manual Soldering • Reflow soldering must be done within 72 h while stored under a max. temperature of 30 °C, 60 % RH after opening the dry pack envelope • Use a soldering iron of 25 W or less. Adjust the temperature of the soldering iron below 300 °C • Set the furnace temperatures for pre-heating and heating in accordance with the reflow temperature profile as shown in the diagram. Excercise extreme care to keep the maximum temperature below 260 °C. The temperature shown in the profile means the temperature at the device surface. Since there is a temperature difference between the component and the circuit board, it should be verified that the temperature of the device is accurately being measured • Handle products only after the temperature has cooled off • Finish soldering within 3 s • Handling after reflow should be done only after the work surface has been cooled off Rev. 1.1, 17-Sep-13 6 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors VISHAY LEAD (Pb)-FREE REFLOW SOLDER PROFILE 300 max. 260 °C 245 °C 255 °C 240 °C 217 °C 250 T (°C) 200 max. 20 s 150 max. 100 s max. 120 s 100 max. Ramp Up 3 °C/s max. Ramp Down 6 °C/s 50 0 0 19800 50 100 150 t (s) 200 250 300 max. 2 cycles allowed TAPING VERSION TSOP..TT DIMENSIONS in millimeters 16584 Rev. 1.1, 17-Sep-13 7 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors TAPING VERSION TSOP..TR DIMENSIONS in millimeters 16585 Rev. 1.1, 17-Sep-13 8 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors REEL DIMENSIONS in millimeters 16734 LEADER AND TRAILER DIMENSIONS in millimeters Trailer no devices Leader devices no devices End Start min. 200 min. 400 96 11818 COVER TAPE PEEL STRENGTH LABEL According to DIN EN 60286-3 0.1 N to 1.3 N 300 mm/min. ± 10 mm/min. 165° to 180° peel angle Standard bar code labels for finished goods Rev. 1.1, 17-Sep-13 The standard bar code labels are product labels and used for identification of goods. The finished goods are packed in final packing area. The standard packing units are labeled with standard bar code labels before transported as finished goods to warehouses. The labels are on each packing unit and contain Vishay Semiconductor GmbH specific data. 9 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors VISHAY SEMICONDUCTOR GmbH STANDARD BAR CODE PRODUCT LABEL (finished goods) PLAIN WRITING ABBREVIATION LENGTH Item-description - 18 Item-number INO 8 Selection-code SEL 3 LOT-/serial-number BATCH 10 COD 3 (YWW) Plant-code PTC 2 Quantity QTY 8 Accepted by ACC - Packed by PCK - Data-code Mixed code indicator Origin LONG BAR CODE TOP MIXED CODE - xxxxxxx+ Company logo TYPE LENGTH Item-number N 8 Plant-code N 2 Sequence-number X 3 Quantity N 8 Total length - 21 SHORT BAR CODE BOTTOM TYPE LENGTH Selection-code X 3 Data-code N 3 Batch-number X 10 Filter - 1 Total length - 17 DRY PACKING After more than 72 h under these conditions moisture content will be too high for reflow soldering. The reel is packed in an anti-humidity bag to protect the devices from absorbing moisture during transportation and storage. In case of moisture absorption, the devices will recover to the former condition by drying under the following condition: 192 h at 40 °C + 5 °C / - 0 °C and < 5 % RH (dry air/nitrogen) or 96 h at 60 °C + 5 °C and < 5 % RH for all device containers or 24 h at 125 °C + 5 °C not suitable for reel or tubes. Aluminum bag Label An EIA JEDEC® standard J-STD-020 level 4 label is included on all dry bags. Reel LEVEL CAUTION This bag contains MOISTURE-SENSITIVE DEVICES 15973 4 FINAL PACKING 1. Shelf life in sealed bag: 12 months at < 40 °C and < 90 % relative humidity (RH) The sealed reel is packed into a cardboard box. A secondary cardboard box is used for shipping purposes. 2. After this bag is opened, devices that will be subjected to soldering reflow or equivalent processing (peak package body temp. 260 °C) must be 2a. Mounted within 72 hours at factory condition of < 30 °C/60 % RH or 2b. Stored at < 5 % RH 3. Devices require baking befor mounting if: Humidity Indicator Card is > 10 % when read at 23 °C ± 5 °C or 2a. or 2b. are not met. RECOMMENDED METHOD OF STORAGE 4. If baking is required, devices may be baked for: 192 hours at 40 °C + 5 °C/- 0 °C and < 5 % RH (dry air/nitrogen) or 96 hours at 60 °C ± 5 °C and < 5 % RH for all device containers or 24 hours at 125 °C ± 5 °C not suitable for reels or tubes Dry box storage is recommended as soon as the aluminum bag has been opened to prevent moisture absorption. The following conditions should be observed, if dry boxes are not available: Bag Seal Date: (If blank, see barcode label) Note: Level and body temperature defined by EIA JEDEC Standard J-STD-020 22522 • Storage temperature 10 °C to 30 °C EIA JEDEC standard J-STD-020 level 4 label is included on all dry bags • Storage humidity ≤ 60 % RH max. Rev. 1.1, 17-Sep-13 10 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP62.., TSOP64.. www.vishay.com Vishay Semiconductors ESD PRECAUTION VISHAY SEMICONDUCTORS STANDARD BAR CODE LABELS Proper storage and handling procedures should be followed to prevent ESD damage to the devices especially when they are removed from the antistatic shielding bag. Electro-static sensitive devices warning labels are on the packaging. The Vishay Semiconductors standard bar code labels are printed at final packing areas. The labels are on each packing unit and contain Vishay Semiconductors specific data. 22645 Rev. 1.1, 17-Sep-13 11 Document Number: 82463 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000