Features • • • • • • • Single 3-V Supply Voltage High Power-added Efficient Power Amplifier (Pout typically 26.5 dBm) Ramp-controlled Output Power Low-noise Preamplifier (NF typically 1.8 dB) Biasing for External PIN Diode T/R Switch Current-saving Standby Mode Few External Components DECT SiGe Front End IC Electrostatic sensitive device. Observe precautions for handling. U7004B Description The U7004B is a monolithic SiGe transmit/receive front end IC with power amplifier, 50-W internal matching, low-noise amplifier and T/R switch driver. It is especially designed for operation in TDMA systems like DECT. Due to the ramp-control feature and a very low quiescent current, an external switch transistor for VS is not required. Figure 1. Block Diagram VS_PA V1_PA PA PA_IN V2_PA_OUT RAMP LNA LNA_IN LNA_OUT RX_ON TX/RX Standby control T/R Switch driver PU R_SWITCH SWITCH_OUT 4713A–DECT–07/03 1 Pin Configuration Figure 2. Pinning SSO20 R_SWITCH 1 20 PU SWITCH_OUT 2 19 RX_ON GND1 3 18 LNA_OUT 17 GND8 LNA_IN 4 U7004B GND2 5 16 VS_LNA V1_PA 6 15 PA_IN GND3 7 14 RAMP GND4 8 13 VS_PA GND5 9 12 GND7 V2_PA_OUT 10 11 GND6 Pin Description 2 Pin Symbol 1 R_SWITCH Function 2 SWITCH_OUT 3 GND1 4 LNA_IN 5 GND2 Ground 6 V1_PA Inductor to power supply for power amplifier 7 GND3 Ground 8 GND4 Ground 9 GND5 Ground 10 V2_PA_OUT 11 GND6 Ground 12 GND7 Ground 13 VS_PA Supply voltage for power amplifier 14 RAMP Power-ramping control input 15 PA_IN Power amplifier input 16 VS_LNA 17 GND8 18 LNA_OUT 19 RX_ON 20 PU Resistor to GND sets the PIN diode current Switched current output for PIN diode Ground Low-noise amplifier input Inductor to power supply and matching network for power amplifier output Supply-voltage input for low-noise amplifier Ground Low-noise amplifier output RX active high Power-up active high U7004B 4713A–DECT–07/03 U7004B Absolute Maximum Ratings All voltages refer to GND (pins 3, 5, 7, 8, 9, 11, 12 and 17), ESD protection according to ESD-S5.2-1994, Class M1. Parameters Symbol Value Unit 5 V Duty cycle PA 50 % Burst duration PA 5 ms Tj 150 °C Storage temperature Tstg -40 to +125 °C Input power PA pin 15 PinPA +10 dBm Input power LNA pin 4 PinLNA -5 dBm Symbol Value Unit RthJA 95 K/W Supply voltage pins 6, 10, 13 and 16 (no RF) VS Junction temperature Thermal Resistance Parameters Junction ambient Operating Range All voltages refer to GND (Pins 3, 5, 7, 8, 9, 11, 12 and 17). The following table represents the sum of all supply currents depending on the TX/RX mode. Power supply points are VS_LNA, VS_PA, V1_PA, V2_PA_OUT. Parameters Symbol Min. Typ. Max. Unit Supply voltage pins 6, 10 and 13 VS 2.7 3.6 4.6 V Supply voltage pin 16 VS 2.7 3.6 4.6 V Supply current TX RX IS IS 450 8 mA mA Standby current PU = 0 IS 10 µA Ambient temperature Tamb -25 +25 °C +70 Electrical Characteristics Test conditions (unless otherwise specified): VS = 3.6 V, Tamb = 25°C, pulsed mode, duty cycle 4.17%, ton = 417 µs Parameters Power Amplifier Test Conditions Symbol Min. Typ. Max. Unit Pins 6, 10 and 13 VS 2.7 3.6 4.6 V (1) Supply voltage 450 mA Supply current TX IS_TX Supply current RX (PA off) IS_RX 10 µA Standby current Standby IS_standby 10 µA Frequency range TX 1.94 GHz Power gain TX, pin 15 to pin 10 Gain-control range TX Notes: f 1.88 Gp 28 dB DGp 48 dB 1. Power amplifier shall be unconditionally stable, maximum duty cycle 50%, maximum load mismatch and duration: load VSWR = 20:1 (all phases) 10 s, ZG = 50 W 2. With external matching network (see Figure 13 and Figure 14) 3. Low-noise amplifier shall be unconditionally stable 3 4713A–DECT–07/03 Electrical Characteristics (Continued) Test conditions (unless otherwise specified): VS = 3.6 V, Tamb = 25°C, pulsed mode, duty cycle 4.17%, ton = 417 µs Parameters Test Conditions Symbol Min. Typ. Max. Unit 2.0 mA Ramping voltage TX, power gain (max), pin 14 VRAMP max 2.1 Ramping current TX, power gain (max), pin 14 IRAMP 0.5 Power-added efficiency TX PAE 30 % Saturated output power TX, refer to pin 10 Psat 26.5 dBm (2) V TX, pin 15 VSWRin < 2:1 Output matching (2) TX, pin 10 VSWRout < 2:1 Harmonics at P 1dB TX, pin 10 2 fo 3 fo -30 dBc Maximum input power Pin 15 PinPA 10 dBm Stability (non harmonic emission) TX, pin 10 Pin = 2 dBm, VRAMP = 2 V VSWRout < 10:1 (all phases) -60 dBc Input matching T/R Switch Driver (Currently Programmed by External Resistor from R_SWITCH to GND) IS_O_standby 2 µA RX IS_O_RX 2 µA TX at 100 W IS_O_100 Switch-out current output Standby, pin 2 Switch-out current output Switch-out current output 1 mA Switch-out current output TX at 1.2 kW IS_O_1k2 3 mA Switch-out current output TX at 33 kW IS_O_33k 10 mA Low-noise Amplifier (3) Supply voltage All, pin 16 VS 2.7 3.6 4.6 V Supply current RX IS 8 mA Supply current (LNA and control logic) TX (control logic active), pin 16 IS 300 µA Standby current Standby, pin 16 IS 1 Frequency range RX f 1.88 Power gain RX, pin 4 to pin 18 Gp 17 Noise figure RX NF 1.8 Gain compression RX, refer to pin 18 P1dB -7 dBm 3rd-order input interception point RX IIP3 -15 dBm Input matching RX VSWRin < 2:1 Output matching RX VSWRin < 2:1 10 µA 1.94 GHz 19 dB 2.0 dB Logic Input Levels (RX_ON, PU) High input level = 1, pins 19 and 20 ViH 2.4 VS V 0 0.5 V Low input level =0 ViL High input current =1 IiH 40 µA Low input current =0 IiL 0 µA Notes: 4 1. Power amplifier shall be unconditionally stable, maximum duty cycle 50%, maximum load mismatch and duration: load VSWR = 20:1 (all phases) 10 s, ZG = 50 W 2. With external matching network (see Figure 13 and Figure 14) 3. Low-noise amplifier shall be unconditionally stable U7004B 4713A–DECT–07/03 U7004B Control Logic Table 1. Control Logic for LNA and T/R Switch Driver Operation Mode PU RX_ON Standby 0 0 TX 1 0 RX 1 1 Figure 3. Output Power versus Ramp Voltage 30 Pout (dBM) 20 10 0 -10 -20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 VRAMP (V) Input/Output Circuits Figure 4. Input Circuit PA_IN/VS_PA 13 VS_PA 15 PA_IN 17 GND1 5 4713A–DECT–07/03 Figure 5. Input Circuit RAMP/VS_PA 13 VS_PA 14 RAMP 7 GND7 Figure 6. Input Circuit V1_PA 6 V1_PA 8 GND3 Figure 7. Input/Output Circuit V2_PA 10 V2_PA_OUT 8 GND5 6 U7004B 4713A–DECT–07/03 U7004B Figure 8. Input Circuit LNA_IN/VS_LNA 16 VS_LNA 4 LNA_IN 3 GND1 Figure 9. Output Circuit LNA_OUT 16 VS_LNA 18 LNA_OUT 5 GND2 7 4713A–DECT–07/03 Figure 10. Input Circuit SWITCH_OUT/R_SWITCH 13 VS_PA 2 SWITCH_OUT 1 R_SWITCH 17 GND8 Figure 11. Input Circuit RX_ON 16 VS_LNA 19 RX_ON Figure 12. Input Circuit PU 16 VS_LNA 20 PU 8 U7004B 4713A–DECT–07/03 U7004B Typical Application Circuit Figure 13. Typical Schematic LNA_OUT PA_IN RAMP PU RX_ON PCB 20 19 18 17 16 15 14 13 12 11 U7004B TX/RX standby control TX LNA 1 2 3 4 PA 5 6 7 8 9 10 PCB diel. BPF PCB VS PCB Microstripline l/4 Antenna 9 4713A–DECT–07/03 Figure 14. U7004B Application Board Schematic Figure 15. U7004B Application Board Layout 0R 56 pF 0R 56 pF 22nH 1 nF PU 56pF VS_LNA 2.7 pF RX_ON 0R 4.7 mF 2.7 nH 0R 100 pF RAMP LNA DECT Frontend PA_IN 1.2 pF 1.0 pF 15nH 0R 0R 56pF 1nF 1mF 56 pF 0R GND 4.7 mF SWITCH_OUT LNA_OUT 0R V1_PA V2_PA 0R VS_PA Components: - 3 Inductors (Pins 10,13,15) - 16 Capacitors - 1 Resistor (Pin 1) GND 2.7 k 390 0R 0R PA LNA_IN 10 PA_OUT U7004B 4713A–DECT–07/03 U7004B Ordering Information Extended Type Number Package Remarks U7004B-MFS SSO20 Tube U7004B-MFSG3 SSO20 Taped and reeled Package Information 5.7 5.3 Package SSO20 Dimensions in mm 6.75 6.50 4.5 4.3 1.30 0.15 0.05 0.25 0.65 5.85 20 0.15 6.6 6.3 11 technical drawings according to DIN specifications 1 10 11 4713A–DECT–07/03 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131 Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80 Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 e-mail [email protected] Web Site http://www.atmel.com Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. 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