Features • • • • • • 35 dBm Output Power in CW Mode High Power Added Efficiency (PAE) Single Supply Operation (No Negative Rail) Simple Analog Power Ramp Control Low Current Consumption in Power-down Mode (Typically ≤15 µA) Small SMD Package (PSSOP28 with Heat Slug) Applications • • • • Professional Phones Hands-free Sets ISM Band Application Wireless Infrastructure Preamplifiers Description The T0905 is a monolithic integrated power amplifier IC manufactured with Atmel’s Silicon-Germanium (SiGe) process. Due to its open architecture, the device can be used either as a two or three-stage amplifier. Every stage can be matched individually, thus allowing applications in a wide frequency range. The T0905 can be used from 135 MHz up to 600 MHz in both linear and non-linear (saturated) mode. The power gain can be set dynamically by means of an analog control input optionally for each single stage or for the entire power amplifier. Constant gain mode is also possible. The T0905 is suited for CW mode up to 35 dBm. These features, including wide power ramp control, make the T0905 a very flexible power amplifier for many different applications. Apart from telephone applications, the T0905 can also be used for car identification systems and several other wireless communication systems. The single supply voltage operation at +3.5 V and a negligible leakage current in power-down mode enable a remarkable simplification of the application’s power management. Generalpurpose VHF/UHF Power Amplifier (135 to 600 MHz) T0905 Preliminary Figure 1. Block Diagram VCTL1 GAIN1 16 13 VCTL2 GAIN2 15 Buf2 Buf1 11 17 14 VCTL3 GAIN3 18 19 Buf3 VBIAS3 BGOUT VCTL VCC_CTL 12 10 9 BG 8 20 VBIAS2 VB2_DC VB3_DC 22-25 7 RF1 Match RFIN1 21 GND3 6 Match 5 4 RF2 3 28 GND1 VCC1 GND2 VCC2 RFIN2 RFOUT/VCC3 RF3 Match 27 VB3 26 GND3 Rev. 4751D–SIGE–05/04 Pin Configuration Figure 2. Pinning PSSOP28 NC GND2 GND2 RFin2 VCC1 GND1 RFIN1 VB2_DC VBIAS2 VCC_CTL BGOUT VCTL VCTL1 VCTL2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC2 VB3 GND3 RFOUT/VCC3 RFOUT/VCC3 RFOUT/VCC3 RFOUT/VCC3 GND3 VB3_DC VBIAS3 GAIN3 GAIN2 GAIN1 VCTL3 Pin Description 2 Pin Symbol 1 NC Function 2 GND2 Ground 3 GND2 Ground 4 RFIN2 RF input (2-stage operation) 5 VCC1 Supply voltage, first stage 6 GND1 Ground 7 RFIN1 RF input (3-stage operation) 8 VB2_DC Input for gain setting, second stage 9 VBIAS2 Output Buf2 10 VCC_CTL 11 BGOUT Not connected Supply voltage control block Output band gap 12 VCTL Control voltage input 13 VCTL1 Control voltage input, first stage 14 VCTL2 Control voltage input, second stage 15 VCTL3 Control voltage input, third stage 16 GAIN1 Gain setting Buf1 17 GAIN2 Gain setting Buf2 18 GAIN3 Gain setting Buf3 19 VBIAS3 Output Buf3 20 VB3_DC 21 GND3 22 RFOUT/VCC3 RF output/supply voltage, third stage 23 RFOUT/VCC3 RF output/supply voltage, third stage 24 RFOUT/VCC3 RF output/supply voltage, third stage Input for gain setting, third stage Ground T0905 [Preliminary] 4751D–SIGE–05/04 T0905 [Preliminary] Pin Description (Continued) Pin Symbol 25 RFOUT/VCC3 26 GND3 27 VB3 28 VCC2 Function RF output/supply voltage, third stage Ground Pin to extend the input capacity of stage 3 Supply voltage second stage Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Symbol Value VCC1, VCC2, VCC3 0 to +5.5 V PRFin 10 dBm Gain control voltage(1) Vctl 0 to +2.5 V Operating case temperature Tc -40 to 100 °C Tstg -40 to +150 °C PRFout 36 dBm Symbol Value Unit RthJC 19 K/W Supply voltage VCC, no RF Input power Storage temperature Maximum output power Note: Unit 1. The part may not survive all maximums applied simultaneously Thermal Resistance Parameters Junction case Operating Range All voltages are referred to GND Parameters Symbol Value Unit Supply voltage VCC 2.7 to 5.0 V Ambient temperature Tamb -40 to +85 °C Input frequency fRfin 135 to 600 MHz 3 4751D–SIGE–05/04 Electrical Characteristics Test conditions (if not otherwise specified): VCC = +3.5 V, Tamb = +25°C, 50 Ω input and 50 Ω output match No. 1 1.1 2 Parameters Test Conditions Pin Symbol 10, 22 25, 28 I Min. Typ. Max. Unit Type* 15 25 µA A 178 MHz C Power Supply Current consumption power down mode (leakage current) Vctlx ≤0.2 V 150-MHz Amplifier Mode fRfin150 135 22 - 25 PRFout150 34.0 35.0 dBm C 22 - 25 PRFout150 32.0 33.0 dBm C 4 PRFin150 dBm C VCC = 3.5 V PRFout = 35.0 dBm 10, 22 25, 28 PAE150 55 % C Current consumption active mode PRFout = 35 dBm 10, 22 25, 28 I150 1.64 A C 2.7 Input VSWR PRFin = 0 to 8 dBm PRFout = 31.0 dBm 4 VSWR150 2:1 C 2.8 Stability/load mismatch PRFout = 31.0 dBm VCC = 4.6 V 22 - 25 VSWR150 8:1 C 2.9 2nd harmonic distortion 22 - 25 2fo150 -35 dBc C 2.10 3rd harmonic distortion 22 - 25 3fo150 -35 dBc C 2.11 4th to 8th harmonic distortion 22 - 25 4fo..8fo150 -35 dBc C 2.12 Isolation between input and output 4, 22 - 25 PRFout150 -30 dBm C 520 MHz A 2.1 Frequency range Output power normal conditions VCC = 3.5 V Tamb = +25°C PRFin = 3 dBm RL = RG = 50 Ω 2.3 Extreme conditions VCC = 2.4 V Tamb = +85°C PRFin = 3 dBm RL = RG = 50 Ω 2.4 Input power 2.5 Power added efficiency 2.6 2.2 3 3.1 PRfin150 = 8 dBm Vctl ≤0.2 V (power down) 50 10 450-MHz Amplifier Mode Frequency range Output power normal conditions VCC = 3.5 V Tamb = +25°C PRFin = 3 dBm RL = RG = 50 Ω 3.3 Extreme conditions VCC = 2.4 V Tamb = +85°C PRFin = 3 dBm RL = RG = 50 Ω 3.4 Input power 3.2 3 fRfin450 380 22 - 25 PRFout450 34.0 35.0 dBm A 22 - 25 PRFout450 32.0 33.0 dBm C 4 PRFin450 dBm A 3 10 *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 4 T0905 [Preliminary] 4751D–SIGE–05/04 T0905 [Preliminary] Electrical Characteristics (Continued) Test conditions (if not otherwise specified): VCC = +3.5 V, Tamb = +25°C, 50 Ω input and 50 Ω output match No. Parameters Test Conditions Pin Symbol Min. Typ. 3.5 Power added efficiency VCC = 3.5 V PRFout = 35.0 dBm 10, 22 25, 28 PAE450 50 3.6 Current consumption active mode PRFout = 35 dBm PAE = 55% 10, 22 25, 28 I450 3.7 Input VSWR PRfin450 = 0 to 8 dBm PRFout = 31.0 dBm 4 VSWR450 2:1 C 3.8 Stability/load mismatch PRFout450 = 31.0 dBm VCC = 4.6 V 22 - 25 VSWR450 8:1 C 3.9 2nd harmonic distortion 22 - 25 2fo450 -35 dBc A 3.10 3rd harmonic distortion 22 - 25 3fo450 -35 dBc A 3.11 4th to 8th harmonic distortion 22 - 25 4fo..8fo450 -35 dBc C 3.12 Isolation between input and output PRfin150 = 8 dBm Vctl ≤0.2 V (power down) 4, 22 - 25 PRFout450 -30 dBm A 350 150 dB/V dB/V C 4 Control curve slope PRFout ≥ 5 dBm PRFout ≥ 25 dBm 22 - 25 Sctl 4.2 Power control range Vctl = 0 to 2.5 V 22 - 25 Gctl 60 12 - 14 Vctl 0.5 12 - 14 Ictll 4.4 Unit Type* 55 % A 1.64 A A Power Control 4.1 4.3 Max. Control voltage range Control current PRFin = 0 to 8 dBm Vctl = 0 to 2.0 V 300 120 dB C 2.0 V C 200 µA A *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 5 4751D–SIGE–05/04 Figure 3. Application Example for 450-MHz PA with Variable Gain VCTL R3 VCTL1 GAIN1 VCTL2 13 R14 BGOUT C4 GAIN3 18 15 17 Buf2 MS5 7 BG Match 19 VBIAS3 9 VBIAS2 Buf3 8 C3 C18 L9 RFIN GAIN2 VCTL3 14 VCTL 12 C5 VCC_CTL 10 VCC_CTL 16 Buf1 11 R11 R7 Match RF1 RF2 20 VB3_DC 22-25 MS3 RF3 Match VB2_DC L1 RFOUT/ VCC3 RFIN1 L4 21 GND3 6 GND1 5 4 28 3 GND2 VCC1 RFin2 MS7 27 VCC2 VB3 26 GND3 L2 C1 C2 L13 L8 MS4 C8 RFOUT L3 MS1 C7 C19 C20 C21 C24 R13 MS6 L5 Micro strip lines length/mm width/mm MS1 2.5 1 MS2 2 1 MS3 2.5 1.6 MS4 5 0.43 MS5 4 0.43 MS6 3 0.63 MS7 2 0.3 MS8 2 0.3 MS9 4 0.63 Board material: Epsilon(r): 4.3; metal Cu: 35 µm; distance 1. layer - RF ground: 240 µm 6 MS8 C28 R15 L10 MS9 C26 L7 C27 C14 C12 C11 L11 C17 C9 C10 C15 VCC1 VCC2 MS2 C13 C16 VCC3 T0905 [Preliminary] 4751D–SIGE–05/04 T0905 [Preliminary] Figure 4. Recommended Package Footprint Extract from the PCB Showing a Part of the Core Application (Without Components) • Only ground signal traces are recommended directly under the package. • Maximum density of ground vias guarantees an optimum connection of the ground layers and the best diversion of the heat. • Heat slug must be soldered to GND. • Plugging of the ground vias under the heat slug is recommended to avoid soldering problems. 7 4751D–SIGE–05/04 Ordering Information Extended Type Number Package Remarks T0905-TSPH PSSOP28 Lead-free Package Information Package PSSOP28 Dimensions in mm 9.98 9.80 6.02 1.60 1.45 0.25 0.2 0.10 0.00 0.64 3.91 8.32 28 15 2.21 1.80 technical drawings according to DIN specifications 1 8 7.29 6.88 14 T0905 [Preliminary] 4751D–SIGE–05/04 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards 1150 East Cheyenne Mtn. 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