application INFO available UC1872 UC2872 UC3872 Resonant Lamp Ballast Controller FEATURES DESCRIPTION • Controls Different Types of Lamps: Cold Cathode Fluorescent, Neon, and Gas Discharge The UC3872 is a resonant lamp ballast controller optimized for driving cold cathode fluorescent, neon, and other gas discharge lamps. The resonant power stage develops a sinusoidal lamp drive voltage, and minimizes switching loss and EMI generation. Lamp intensity adjustment is accomplished with a buck regulator, which is synchronized to the external power stage’s resonant frequency. Suitable for automotive and battery powered applications, the UC3872 draws only 1µA when disabled. • Zero Voltage Switching (ZVS) of Push-Pull Drivers • Accurate Control of Lamp Current • Variable Lamp Intensity Control Soft start and open lamp detect circuitry have been incorporated to minimize component stresses. Open lamp detection is enabled at the completion of a soft start cycle. The chip is optimized for smooth duty cycle control to 100%. • 1µA Disable Current • 4.5V to 24V Operation • Open Lamp Detection Circuitry Other features include a precision 1.2% reference, undervoltage lockout, and accurate minimum and maximum frequency control. BLOCK DIAGRAM VCC 10 UVLO 3.0V REF 3 VC 2 AOUT 1 BOUT 50k REF 9 ENBL 11 (HIGH=ENABLE) + – 0.1V COMP 4 INV 6 1.5V SS 50k – – 1 + 5 R 0.2V + 7 8 0.5V – + 50k S OSCILLATOR ZERO DETECT ZD T PWM 200µA CT TOGGLE OPEN LAMP DETECT – EA + 20µA PUSH PULL OUTPUTS N-CHANNEL 12 COUT SENSE OUT BUCK DRIVE P-CHANNEL SYNC 13 PGND 14 GND Note: Pin numbers shown are for DIP package. 07/99 UDG-99112 UC1872 UC2872 UC3872 CONNECTION DIAGRAMS ABSOLUTE MAXIMUM RATINGS Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to +10V VCC, VC Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +24V ZD Input Current High Impedance Source . . . . . . . . . . . . . . . . . . . . . . +10mA ZD Input Voltage Low Impedance Source . . . . . . . . . . . . . . . . . . . . . . . . +24V Power Dissipation at TA = 25° C . . . . . . . . . . . . . . . . . . . . . . 1W Storage Temperature . . . . . . . . . . . . . . . . . . . −65° C to +150° C Lead Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300° C SOIC-16, SSOP-16 (TOP VIEW) DW, M Package Note 1: Currents are positive into, negative out of the specified terminal. Note 2: Consult Packaging Section of Databook for thermal limitations and considerations of package. DIL-14 (TOP VIEW) N Package PLCC-20 (Top View) Q Package ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these parameters apply for TJ = −55° C to +125°C for the UC1872, –40° C to +85° C for the UC2872, −0°C to +70°C for the UC3872; VCC= 5V, VC = 15V, VENBL = 5V, CT = 1nF, ZD = 1V. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS TJ = 25° C 2.963 3.000 3.037 V Over Temperature 2.940 3.000 3.060 V Reference Section Output Voltage Line Regulation VCC = 4.75V to 18V 10 mV Load Regulation IO = 0 to −5mA 10 mV 78 kHz Oscillator Section Free Running Frequency TJ = 25° C 57 68 Maximum Synchronization Frequency TJ = 25° C 160 200 240 kHz Charge Current VCT = 1.5V 180 200 220 µA Voltage Stability 2 % 4 8 % 0.46 0.5 0.56 V 1.445 1.475 1.505 V −0.4 −2 µA Temperature Stability Zero Detect Threshold Error Amp Section Input Voltage VO = 2V Input Bias Current Open Loop Gain VO = 0.5 to 3V 65 90 Output High VINV = 1.3V 3.1 3.5 2 dB 3.9 V UC1872 UC2872 UC3872 ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these parameters apply for TJ = −55° C to +125°C for the UC1872, –40° C to +85° C for the UC2872, −0°C to +70°C for the UC3872; VCC= 5V, VC = 15V, VENBL = 5V, CT = 1nF, ZD = 1V. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Error Amp Section (cont.) Output Low VINV = 1.7V 0.1 0.2 V Output Source Current VINV = 1.3V, VO = 2V –350 –500 µA Output Sink Current VINV = 1.7V, VO = 2V 10 20 mA Common Mode Range Unity Gain Bandwidth VIN-1V 0 TJ = 25° C (Note 4) 1 V MHz Open Lamp Detect Section Soft Start Threshold VINV = 0V 2.9 3.4 3.8 Open Lamp Detect Threshold VSS = 4.2V 0.6 1.0 1.4 V Soft Start Current VSS = 2V 10 20 40 µA IOUT = 0, Outputs A and B 0.05 0.2 V IOUT = 10mA 0.1 0.4 V IOUT = 100mA 1.5 2.2 V V Output Section Output Low Level Output High Level IOUT = 0, Output C 13.9 14.9 V IOUT = −10mA 13.5 14.3 V IOUT = −100mA 12.5 13.5 V Rise Time TJ = 25° C, Cl = 1nF (Note 4) 30 80 ns Fall Time TJ = 25° C, Cl = 1nF (Note 4) 30 80 ns 49.9 50 % 0 % Output Dynamics Out A and B Duty Cycle 48 Out C Max Duty Cycle VINV = 1V Out C Min Duty Cycle VINV = 2V 100 % Under Voltage Lockout Section Startup Threshold Voltage 3.7 4.2 4.5 V Hysteresis 120 200 280 mV 0.8 V µA Enable Section Input High Threshold 2 V Input Low Threshold VENBL = 5V 150 400 VCC Supply Current VCC = 24V 6 14 mA VC Supply Current VC = 24V 5 12 mA ICC Disabled VCC = 24V, VENBL = 0V 1 10 µA Input Current Supply Current Section Note 3: Unless otherwise specified, all voltages are with respect to ground. Currents are positive into, and negative out of the specified terminal. Note 4: Guaranteed by design. Not 100% tested in production. 3 UC1872 UC2872 UC3872 PIN DESCRIPTIONS AOUT, BOUT: These outputs provide complementary drive signals for the push-pull N-channel MOSFETs. Each one is high for 50% of the time, switching states each time a zero-detect is sensed. INV: This pin is the inverting input to the error amplifier and the input for the open lamp detect circuitry. If the voltage at INV is below the 1V open lamp detect threshold, the outputs are disabled. COMP: COMP is the output terminal of the error amplifier. Compensation components are normally connected between COMP and INV. Connecting a capacitor from this pin to ground limits turn on current and blanks the open lamp detect signal allowing the lamp to start. PGND: This pin is the high current ground connection for the three output drivers. REF: This pin is connected to the 3V reference voltage which is used for the internal logic. Bypass REF to ground with a 0.01µF ceramic capacitor for proper operation. COUT: This output directly drives the bulk regulator P-channel MOSFET. COUT turn-on is synchronized to each zero-detect, and therefore switches at twice the frequency of AOUT and BOUT. The modulator controlling COUT is designed to provide smooth control up to 100% duty cycle. VC: VC is the power supply voltage connection for the output drivers. Bypass it to ground with a 0.1µF ceramic capacitor for proper operation. VCC: VCC is the positive supply voltage for the chip. Its operating range is from 4.2V to 24V. Bypass VCC to ground with a 0.1µF ceramic capacitor for proper operation. CT: A capacitor connected between this pin and GND ground sets the synchronization frequency range. The capacitor is charged with approximately 200µA, creating a linear ramp which is used by COUT’s (buck regulator driver) PWM comparator. ZD: The zero-detect input senses when the transformer’s primary center tap voltage falls to zero to synchronize the sawtooth voltage waveform on CT. The threshold is approximately 0.5V, providing a small amount of offset such that with propagation delay, zero-volt switching occurs. A resistor (typically 10k) should be connected between ZD and the primary center tap to limit input current at turn off. ENBL: When ENBL is driven high the device is enabled. When ENBL is pulled low, the IC is shut down and typically draws 1µA. GND: This pin is the ground reference point for the internal reference and all thresholds. APPLICATION INFORMATION Figure 1 shows a complete application circuit using the UC3872 Resonant Lamp Ballast Controller. The IC provides all drive, control and housekeeping functions. The buck output voltage (transformer center-tap) provides the zero crossing and synchronization signals. form falls to zero. The actual threshold is 0.5 volts, providing a small amount of anticipation to offset propagation delay. The synchronization pulse width is the time required for the 4mA current sink to discharge the timing capacitor to 0.1 volts. This pulse width limits the minimum linear control range of the buck regulator. The 200µA current source charges the capacitor to a maximum of 3 volts. A comparator blanks the zero detect signal until the capacitor voltage exceeds 1 volt, preventing multiple synchronization pulse generation and setting the maximum frequency. If the capacitor voltage reaches 3 volts (a zero detection has not occurred) an internal clock pulse is generated to limit the minimum frequency. The buck modulator drives a P-channel MOSFET directly, and operates over a 0-100% duty-cycle range. The modulation range includes 100%, allowing operation with minimal headroom. The oscillator and synchronization circuitry are shown in Figure 2. The oscillator is designed to synchronize over a 3:1 frequency range. In an actual application however, the frequency range is only about 1.5:1. A zero detect comparator senses the primary center-tap voltage, generating a synchronization pulse when the resonant wave- 4 UC1872 UC2872 UC3872 APPLICATION INFORMATION (cont.) A unique protection feature incorporated in the UC3872 is the Open Lamp Detect circuit. An open lamp interrupts the current feedback loop and causes very high secondary voltage. Operation in this mode will usually breakdown the transformer’s insulation, causing permanent damage to the converter. The open lamp detect circuit, shown in Figure 3 senses the lamp current feedback signal at the error amplifier’s input, and shuts down the outputs if insufficient signal is present. Soft start circuitry limits initial turn-on currents and blanks the open lamp detect signal. Other features are included to minimize external circuitry requirements. A logic level enable pin shuts down the IC, allowing direct connection to a battery. During shutdown, the IC typically draws less than 1µA. The UC3872, operating from 4.5V to 24V, is compatible with almost all battery voltages used in portable computers and automotive applications. Undervoltage lockout circuitry disables operation until sufficient supply voltage is available, and a 1% voltage reference insures accurate operation. UDG-93018-2 Figure 1. Typical application. 5 UC1872 UC2872 UC3872 APPLICATIONS INFORMATION 0.1V 200µA CT 7 3.0V MAX FREQ COMPARATOR 1.0V ZD 8 0.5V + – DISCHARGE COMPARATOR MIN FREQ COMPARATOR + – Q S 4mA + – – + R CLK ZERO DETECT UDG-99005 Figure 2. UC3872 oscillator section. Figure 3. UC3872 open lamp detect circuitry. UNITRODE CORPORATION 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 FAX (603) 424-3460 6 PACKAGE OPTION ADDENDUM www.ti.com 4-May-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty UC2872DW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2872DWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2872DWTR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2872DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2872N ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2872NG4 ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2872Q ACTIVE PLCC FN 20 46 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR UC2872QG3 ACTIVE PLCC FN 20 46 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR UC3872DW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3872DWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3872DWTR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3872DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3872M ACTIVE SSOP/ QSOP DBQ 16 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3872MG4 ACTIVE SSOP/ QSOP DBQ 16 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3872MTR ACTIVE SSOP/ QSOP DBQ 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3872MTRG4 ACTIVE SSOP/ QSOP DBQ 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3872N ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3872NG4 ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 4-May-2009 package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device UC2872DWTR Package Package Pins Type Drawing SOIC SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DW 16 2000 330.0 16.4 10.85 10.8 2.7 12.0 16.0 Q1 UC3872DWTR SOIC DW 16 2000 330.0 16.4 10.85 10.8 2.7 12.0 16.0 Q1 UC3872MTR SSOP/ QSOP DBQ 16 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UC2872DWTR SOIC DW 16 2000 346.0 346.0 33.0 UC3872DWTR SOIC DW 16 2000 346.0 346.0 33.0 UC3872MTR SSOP/QSOP DBQ 16 2500 346.0 346.0 29.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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