To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. 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Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majorityowned subsidiaries. (Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics. DATA SHEET MOS FIELD EFFECT TRANSISTOR μ PA2350T1P DUAL Nch MOSFET FOR SWITCHING DESCRIPTION OUTLINE DRAWING (Unit: mm) The μ PA2350T1P is a Dual N-channel MOSFET designed for Lithium-Ion battery protection circuit. Ecologically Flip chip MOSFET for Lithium-Ion battery Protection (EFLIP). TOP VIEW • • • Monolithic Dual MOSFET The Drain connection on circuit board is unnecessary, because Drains of 2MOSFET are internally connected. 2.5 V drive available and low on-state resistance RSS(on)1 = 35 mΩ MAX. (VGS = 4.5 V, IS = 3.0 A) RSS(on)2 = 37 mΩ MAX. (VGS = 4.0 V, IS = 3.0 A) RSS(on)3 = 44 mΩ MAX. (VGS = 3.1 V, IS = 3.0 A) RSS(on)4 = 55 mΩ MAX. (VGS = 2.5 V, IS = 3.0 A) Built-in G-S protection diode against ESD Pb-free Bump 0.65 G2 1.62 ± 0.05 FEATURES • BOTTOM VIEW 1.62 ± 0.05 S2 0.65 G1 1-pin index mark S1 S1 Dot area (For in-house) 0.2 ± 0.05 4 - φ 0.3 S1: Source 1 G1: Gate 1 G2: Gate 2 S2: Source 2 ORDERING INFORMATION PART NUMBER μ PA2350T1P-E4-A Note PACKAGE 4-pin EFLIP-LGA EQUIVALENT CIRCUIT Note Pb-free (This product does not contain Pb in external electrode and other parts.) Remark "-E4" indicates the unit orientation (E4 only). FET1 FET2 Gate1 Gate2 Gate Protection Diode ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Source to Source Voltage (VGS = 0 V) VSSS 20 Gate to Source Voltage (VSS = 0 V) VGSS ±12 Note1 Source Current (DC) 6.0 IS(DC) Note2 Source Current (pulse) ±60 IS(pulse) Note1 Total Power Dissipation 1.3 PT Channel Temperature Tch 150 Storage Temperature Tstg −55 to +150 2 Notes 1. Mounted on ceramic board of 50 cm x 1.0 mm 2. PW ≤ 100 μs, Single Pulse V V A A W °C °C Source2 Source1 Body Diode Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G19739EJ1V0DS00 (1st edition) Date Published April 2009 NS Printed in Japan 2009 μ PA2350T1P ELECTRICAL CHARACTERISTICS (TA = 25°C) These are common to FET1 and FET2. CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT 1 μA ±10 μA 1.5 V Zero Gate Voltage Source Current ISSS VSS = 20 V, VGS = 0 V, TEST CIRCUIT 1 Gate Leakage Current IGSS VGS = ±12 V, VSS = 0 V, TEST CIRCUIT 2 Gate to Source Cut-off Voltage VGS(off) VSS = 10 V, IS = 1.0 mA, TEST CIRCUIT 3 0.5 1.0 | yfs | VSS = 10 V, IS = 3.0 A, TEST CIRCUIT 4 2.5 8.0 RSS(on)1 VGS = 4.5 V, IS = 3.0 A, TEST CIRCUIT 5 22 28 35 mΩ RSS(on)2 VGS = 4.0 V, IS = 3.0 A, TEST CIRCUIT 5 23 29 37 mΩ RSS(on)3 VGS = 3.1 V, IS = 3.0 A, TEST CIRCUIT 5 24 33 44 mΩ 30 41 55 mΩ Note Forward Transfer Admittance Source to Source On-state Resistance Note S RSS(on)4 VGS = 2.5 V, IS = 3.0 A, TEST CIRCUIT 5 Input Capacitance Ciss VSS = 10 V, VGS = 0 V, f = 1.0 MHz 542 pF Output Capacitance Coss TEST CIRCUIT 7 132 pF Reverse Transfer Capacitance Crss 91 pF Turn-on Delay Time td(on) VDD = 10 V, IS = 6.0 A, 24 ns Rise Time tr VGS = 4.0 V, RG = 6.0 Ω, 165 ns Turn-off Delay Time td(off) TEST CIRCUIT 8 Fall Time tf Total Gate Charge QG VDD = 16 V, VG1S1 = 4.0 V, IS = 6.0 A, 160 ns 150 ns 8.6 nC 0.9 V TEST CIRCUIT 9 Body Diode Forward Voltage Note IF = 6.0 A, VGS = 0 V, TEST CIRCUIT 6 VF(S-S) Note Pulsed Test circuits are example of measuring the FET1 side. TEST CIRCUIT 1 ISSS TEST CIRCUIT 2 IGSS S2 S2 When FET1 is G2 measured, between G2 GATE and SOURCE A of FET2 are shorted. G1 VSS A VGS S1 G1 S1 TEST CIRCUIT 3 VGS(off) TEST CIRCUIT 4 | yfs | S2 When FET1 is S2 ΔIS/ΔVGS G2 G2 measured, between A A GATE and SOURCE A A of FET2 are shorted. G1 G1 VSS VGS S1 2 VSS VGS S1 Data Sheet G19739EJ1V0DS μ PA2350T1P TEST CIRCUIT 6 VF(S-S) When FET1 is measured, FET2 is added VGS +4.5 V. TEST CIRCUIT 5 RSS(on) S2 VSS/IS G2 4.5 V IF G2 IS VSS VSS G1 G1 V V VGS =0V VGS S1 S1 TEST CIRCUIT 7 Ciss Coss Crss S2 G2 S2 S2 VSS Capacitance Bridge G1 G2 G2 VSS VSS G1 G1 Capacitance Bridge Capacitance Bridge S1 S1 S1 TEST CIRCUIT 8 td(on), tr, td(off), tf S2 VGS G2 VGS V Wave Form RL 0 VGS 10% 90% VSS G1 PG. VGS 0 VSS RG Wave Form VDD τ S1 VSS 90% 90% 10% 10% 0 td(on) tr td(off) ton tf toff τ = 1 μs Duty Cycle ≤ 1% TEST CIRCUIT 9 QG S2 G2 A IG = 2 mA RL G1 PG. 50 Ω VDD S1 Data Sheet G19739EJ1V0DS 3 μ PA2350T1P TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 1.6 PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 120 100 80 60 40 20 Mounted on ceramic board of 50 cm2 x 1.0 mm 1.2 0.8 0.4 0 0 0 25 50 75 100 125 150 0 175 25 50 75 100 FORWARD BIAS SAFE OPERATING AREA RSS(on) Limited (V GS = 4.5 V) PW =10 μ s IS - Source Current - A 100 μ s 10 IS(pul s e) 400 μ s 1ms IS(DC) 1 10 ms 0.1 100 ms Single Pulse P(FET1):P(FET2) = 1:1 M ounted on ceramic board of 50 cm2 × 1.0 mm DC 0.01 0.1 1 10 100 VSS - Source to Source Voltage - V rth(ch-A) - Transient Thermal Resistance - °C/W TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 Single Pulse P(FET1):P(FET2) = 1:1 4 Mounted on BT resin board of 40.5 x 25 x 1.5 mm 100 Mounted on ceramic board of 50 cm2 × 1.0 mm 10 1 0.1 100 μ 1m 150 TA - Ambient Temperature - °C TA - Ambient Temperature - °C 100 125 10 m 100 m 1 PW - Pulse Width - s Data Sheet G19739EJ1V0DS 10 100 1000 175 μ PA2350T1P SOURCE CURRENT vs. SOURCE TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 60 10 V GS = 4.5 V IS - Source Current - A IS - Source Current - A 50 3.1 V 40 30 20 2.5 V TEST CIRCUIT 5 Pulsed 10 0 0 TEST CIRCUIT 3 V SS = 10 V Pulsed 4.0 V 2 4 1 TA = 125 °C 75 °C 25 °C −25 °C 0.1 0.01 0.001 6 0 0.5 VSS - Source to Source Voltage - V | yfs | - Forward Transfer Admittance - S TEST CIRCUIT 3 VSS = 10 V ID = 1.0 mA 0.8 0.6 0.4 0 50 100 2 2.5 FORWARD TRANSFER ADMITTANCE vs. SOURCE CURRENT 150 10 TEST CIRCUIT 4 VSS = 10 V Pulsed TA = −25 °C 25 °C 75 °C 125 °C 1 0.1 0.01 0.1 1 10 Tch - Channel Temperature - °C IS - Source Current - A SOURCE TO SOURCE ON-STATE RESISTANCE vs. SOURCE CURRENT SOURCE TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 100 TEST CIRCUIT 5 Pulsed 80 VGS = 2.5 V 3.1 V 4.0 V 4.5 V 60 40 20 0 0.1 1 10 IS - Source Current - A 100 RSS(on) - Source to Source On-state Resistance - mΩ VGS(off) - Gate to Source Cut-off Voltage - V RSS(on) - Source to Source On-state Resistance - mΩ 1.2 -50 1.5 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 1 1 100 TEST CIRCUIT 5 IS = 3.0 A Pulsed 80 60 40 20 0 Data Sheet G19739EJ1V0DS 0 2 4 6 8 10 12 VGS - Gate to Source Voltage - V 5 μ PA2350T1P CAPACITANCE vs. SOURCE TO SOURCE VOLTAGE 1000 100 80 TEST CIRCUIT 5 IS = 3.0 A Pulsed VGS = 2.5 V 3.1 V 4.0 V 4.5 V 60 Ciss, Coss, Crss - Capacitance - pF RSS(on) - Source to Source On-state Resistance - mΩ SOURCE TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 40 20 C iss C oss 100 C r ss TEST CIRCUIT 7 V GS = 0 V f = 1.0 MHz 10 0 -50 0 50 100 0.1 150 4 TEST CIRCUIT 8 V DD = 10 V, V GS = 4.0 V RG = 6.0 Ω VGS - Gate to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns 100 DYNAMIC INPUT CHARACTERISTICS 1000 tr tf 100 td(of f ) td( on) 10 0.1 1 10 100 VSS = 4 V 10 V 16 V 3 2 1 TEST CIRCUIT 9 IS = 6.0 A 0 0 IS - Source Current - A 100 10 VGS = 2.5 V 0V 1 0.1 0.01 TEST CIRCUIT 6 Pulsed 0.001 0 0.5 1 1.5 2 2 4 6 QG - Gate Charge - nC SOURCE TO SOURCE DIODE FORWARD VOLTAGE IF - Diode Forward Current - A 10 VSS - Source to Source Voltage - V Tch - Channel Temperature - °C SWITCHING CHARACTERISTICS 2.5 3 VF(S-S) - Source to Source Voltage - V 6 1 Data Sheet G19739EJ1V0DS 8 10 μ PA2350T1P < Example of application circuit > Lithium-Ion battery (1 cell) protection circuit Lithium-Ion battery pack Protection circuit P+ Battery protection IC LithiumIon battery cell P− μ PA2350, μ PA2351, μ PA2352 <Notes for using this device safely> When you use this device, in order to prevent a customer’s hazard and damage, use it with understanding the following contents. If used exceeding recommended conditions, there is a possibility of causing the device and characteristic degradation. 1. This device is very thin device and should be handled with caution for mechanical stress. The distortion applied to the device should become below 2000 × 10−6. If the distortion exceeds 2000 × 10−6, the characteristic of a device may be degraded and it may result in failure. 2. Please do not damage the device when you handle it. The use of metallic tweezers has the possibility of giving the wound. Mounting with the nozzle with clean point is recommended. 3. When you mount the device on a substrate, carry out within our recommended soldering conditions of infrared reflow. If mounted exceeding the conditions, the characteristic of a device may be degraded and it may result failure. 4. When you wash the device mounted the board, carry out within our recommended conditions. If washed exceeding the conditions, the characteristic of a device may be degraded and it may result in failure. 5. When you use ultrasonic wave to substrate after the device mounting, prevent from touching a resonance directly. If it touches, the characteristic of a device may be degraded and it may result in failure. 6. When you coat the device after mounted on the board, please consult our company. NEC Electronics recommends the epoxy resin of the semiconductor grade as a coating material. 7. Please refer to Figure 2 as an example of the Mounting Pad. Optimize the land pattern in consideration of density, appearance of solder fillets, common difference, etc in an actual design. 8. The marking side of this device is an internal electrode. Please neither contact with terminals of other parts nor take out the electrode. Data Sheet G19739EJ1V0DS 7 μ PA2350T1P Figure 1 Recommended soldering conditions of INFRARED REFLOW Maximum temperature (Package's surface temperature) Time at maximum temperature Time of temperature higher than 220°C Preheating time at 160 to 180°C Maximum number of reflow processes Maximum chlorine content of rosin flux (Mass percentage) : 260°C or below : 10 s or less : 60 s or less : 60 to 120 s : 3 times : 0.2% or less (Main heating) to 10 s Package's surface temperature (°C) 260°C MAX. 220°C 180°C to 60 s 160°C 60 to 120 s (Preheating) Time(s) Infrared Reflow Temperature Profile Figure 2 The example of the Mounting Pad (Unit : mm) 4 - φ 0.30 0.65 0.65 Figure 3 REEL SIDE The unit orientation LEADER SIDE TOP VIEW 8 Data Sheet G19739EJ1V0DS S2 S2 G2 G2 S1 S1 G1 G1 μ PA2350T1P • The information in this document is current as of April, 2009. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. • NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. • Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. • While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. • NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC Electronics product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application. (Note) (1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries. (2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). M8E 02. 11-1