RENESAS UPA2763T1A-E1-AY

Preliminary Data Sheet
μ PA2763
R07DS0003EJ0100
Rev.1.00
May 31, 2010
MOS FIELD EFFECT TRANSISTOR
Description
The μ PA2763 is N-channel MOS Field Effect Transistor designed for DC/DC converter and power management
applications.
Features
• Low on-state resistance
⎯ RDS(on)1 = 23.0 mΩ MAX. (VGS = 10 V, ID = 21 A)
⎯ RDS(on)2 = 28.0 mΩ MAX. (VGS = 8 V, ID = 21 A)
• Low Ciss 2100 pF TYP.
• Built-in gate protection diode
• Thin type surface mount package with heat spreader (8-pin HVSON)
• RoHS Compliant
Absolute Maximum Ratings (TA = 25°C)
Item
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) ∗1
Total Power Dissipation∗2
Total Power Dissipation (PW = 10 sec) ∗2
Total Power Dissipation (TC = 25°C)
Channel Temperature
Storage Temperature
Single Avalanche Current ∗3
Single Avalanche Energy ∗3
Symbol
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
PT2
PT3
Tch
Tstg
IAS
EAS
Ratings
100
±20
±42
±84
1.5
4.6
83
150
-55 to + 150
24.7
61.0
Unit
V
V
A
A
W
W
W
°C
°C
A
mJ
Thermal Resistance
Channel to Ambient Thermal Resistance ∗2
Rth(ch-A)
83.3
°C/W
Channel to Case (Drain) Thermal Resistance
Rth(ch-C)
1.5
°C/W
Notes: ∗1. PW ≤ 10 μ s, Duty Cycle ≤ 1%
∗
2. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt
∗
3. Starting Tch = 25°C, VDD = 50 V, RG = 25 Ω, L = 100 μ H, VGS = 20→0 V
R07DS0003EJ0100 Rev.1.00
May 31, 2010
Page 1 of 6
μ PA2763
Chapter Title
Electrical Characteristics (TA = 25°C)
Item
Symbol
Zero Gate Voltage Drain Current
Min
Typ
IDSS
Max
Unit
Test Conditions
10
μA
±10
μA
VGS = ±20 V, VDS = 0 V
4.0
V
VDS = 10 V, ID = 1 mA
VDS = 100 V, VGS = 0 V
Gate Leakage Current
IGSS
Gate Cut-off Voltage
VGS(off)
2.0
Forward Transfer Admittance ∗1
| yfs |
10
S
VDS = 10 V, ID = 21 A
Drain to Source On-state Resistance ∗1
RDS(on)1
18.0
23.0
mΩ
VGS = 10 V, ID = 21 A
RDS(on)2
19.0
28.0
mΩ
VGS = 8 V, ID = 21 A
Input Capacitance
Ciss
2100
pF
Output Capacitance
Coss
350
pF
Reverse Transfer Capacitance
Crss
130
pF
VDS = 10 V
VGS = 0 V
f = 1 MHz
Turn-on Delay Time
td(on)
28
ns
Rise Time
tr
13
ns
Turn-off Delay Time
td(off)
73
ns
Fall Time
tf
11
ns
Total Gate Charge
QG
40
nC
Gate to Source Charge
QGS
11
nC
Gate to Drain Charge
QGD
13
nC
0.88
V
IF = 42 A, VGS = 0 V
Body Diode Forward Voltage
∗1
VF(S-D)
VDD = 50 V, ID = 21 A,
VGS = 10 V,
RG = 10 Ω
VDD = 50 V,
VGS = 10 V,
ID = 42 A
Reverse Recovery Time
trr
59
ns
Reverse Recovery Charge
Qrr
152
nC
IF = 42A, VGS = 0 V,
di/dt = 100A/μ s
Gate Resistance
RG
2.1
Ω
f = 1 MHz
Note: ∗1. Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
D.U.T.
L
50 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
RL
RG
PG.
VDD
VGS
VGS
Wave Form
0
VGS
10%
90%
VDD
VDS
90%
BVDSS
IAS
VDS
ID
VDS
0
10%
10%
tr
td(off)
Wave Form
τ
VDD
Starting Tch
90%
VDS
VGS
0
τ = 1 μs
Duty Cycle ≤ 1%
td(on)
ton
tf
toff
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG.
50 Ω
R07DS0003EJ0100 Rev.1.00
May 31, 2010
RL
VDD
Page 2 of 6
μ PA2763
Chapter Title
Typical Characteristics (TA = 25°C)
FORWARD BIAS SAFE OPERATING AREA
1000
120
100
10
1
75
100
125
150
s
50
1
25
TC = 25°C
Single Pulse
0.1
175
μs
m
0
0
11 0
1
0.01
0
10
DC
Power Dissipation Lim ited
0.1
20
=1
s
40
PW
d
it e )
Li m 1 0 V
)
ON
=1
S(
R D V GS
ID(DC) = 42 A
t
(a
1
1
60
ID(pul se) = 84 A
100
ID - Drain Current - A
80
M ount ed on a glass epoxy board of
25.4 mm × 25.4 mm × 0.8 mmt
11m
dT - Percentage of Rated Power - %
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
1
10
100
1000
VDS - Drain to Source Voltage - V
TC - Ambient Temperature - °C
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth(t) - Transient Thermal Resistance - °C/W
1000
Single pulse
Rth(ch-A) = 83.3°C/W
100
10
Rth(ch-C) = 1.5°C/W
1
0.1
Rth(ch-A): Mounted on a glass epoxy board (25.4 mm × 25.4 mm × 0.8 mm)
0.01
0.0001
100 μ
10.001
m
0.01
10
m
0.1m
100
1
1
10
10
100
100
1000
1000
PW - Pulse Width – s
FORWARD TRANSFER CHARACTERISTICS
100
4
1
0.1
VGS(off) - Gate Cut-off Voltage - V
Tch = 150°C
125°C
75°C
25°C
-25°C
-55°C
10
ID - Drain Current - A
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
0.01
0.001
V DS = 10 V
Pulsed
0.0001
0
1
2
3
4
5
VGS - Gate to Source Voltage - V
R07DS0003EJ0100 Rev.1.00
May 31, 2010
6
3
2
1
0
-75
Pulsed
V DS = 10 V
ID = 1 mA
-25
25
75
125
175
Tch - Channel Temperature - °C
Page 3 of 6
μ PA2763
Chapter Title
Tch = 150°C
125°C
75°C
25°C
-25°C
-55°C
1
V DS = 10 V
Pulsed
0.1
0.01
0.1
1
10
100
RDS(on) - Drain to Source On-state Resistance - mΩ
ID - Drain Current - A
Pulsed
60
50
40
30
V GS = 8.0 V
20
10 V
10
0
0.1
1
10
100
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
70
70
Pulsed
60
ID = 33.8 A
21 A
8.4 A
50
40
30
20
10
0
0
2
4
6
8
10 12 14 16 18 20
VGS - Gate to Source Voltage - V
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
Pulsed
60
50
40
30
V GS = 8.0 V
10
ID = 21 A
0
-75
-25
Coss
100
Crss
V GS = 0 V
f = 1 MHz
10
0.1
1
10
VDS - Drain to Source Voltage - V
R07DS0003EJ0100 Rev.1.00
May 31, 2010
100
VDS - Drain to Source Voltage - V
1000
25
75
125
175
Tch - Channel Temperature - °C
100
Ciss
10 V
20
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
10000
Ciss, Coss, Crss - Capacitance - pF
70
V DS
80
10
V DD = 80 V
50 V
20 V
8
V GS
60
6
40
4
20
2
ID = 42 A
0
0
10
20
30
40
0
50
QG - Gate Charge - nC
Page 4 of 6
VGS - Gate to Source Voltage - V
10
RDS(on) - Drain to Source On-state Resistance - mΩ
100
DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN
CURRENT
RDS(on) - Drain to Source On-state Resistance - mΩ
| yfs | - Forward Transfer Admittance - S
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
μ PA2763
Chapter Title
SOURCE TO DRAIN DIODE FORWARD
VOLTAGE
SWITCHING CHARACTERISTICS
100
1000
V GS = 10 V
, tr, td(off), tf - Switching Time - ns
1
0.1
Pulsed
0.01
0
0.2
0.4
0.6
0.8
1
1.2
1.4
td(on)
IF - Diode Forward Current - A
0V
10
td(on)
tr
tf
10
V DD = 50 V
V GS = 10 V
RG = 10 Ω
1
0.1
1
10
100
VF(S-D) - Source to Drain Voltage - V
ID - Drain Current - A
REVERSE RECOVERY TIME vs DIODE
FORWARD CURRENT
SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD
1000
100
100
10
di/dt = 100 A/μs
V GS = 0 V
1
0.1
1
10
IF - Diode Forward Current - A
R07DS0003EJ0100 Rev.1.00
May 31, 2010
100
IAS – Single Avalanche Current - A
trr – Reverse Recovery Time – ns
td(off)
100
IAS = 24.7 A
EAS = 61.0 mJ
10
1
0.00001
V DD = 50 V
V GS = 20 V →0 V
RG = 25 Ω
0.0001
0.001
0.01
L – Inductive Load - H
Page 5 of 6
μ PA2763
Chapter Title
Equivalent Circuit
1.27
Package Drawing (Unit: mm)
1
5
+0.1
5 ±0.2
6
4
0.42 −0.05
7
3
6 ±0.2
5.15 ±0.2
8
2
0.10 S
4.1 ±0.2
1.0 MAX.
1
0.2
0.27 ±0.05
0
+0.05
−0
0.10 M
5.4 ±0.2
1, 2, 3 : Source
4
: Gate
5, 6, 7, 8: Drain
3.65 ±0.2
0.6 ±0.15
0.7 ±0.15
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding the
rated voltage may be applied to this device
Ordering Information
Part No.
μ PA2763T1A-E1-AY ∗1
μ PA2763T1A-E2-AY ∗1
Lead Plating
Pure Sn
Packing
Tape 3000 p/reel
Package
8-pin HVSON (0.1 g TYP.)
Note: ∗1. This product does not contain Pb in the external electrode.
R07DS0003EJ0100 Rev.1.00
May 31, 2010
Page 6 of 6
μ PA2763
Revision History
Rev.
1.00
Date
May 31, 2010
Description
Summary
Page
-
First Edition issued
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