EXAR XR

XR-2206
...the analog plus
Monolithic
Function Generator
company TM
June 1997-3
FEATURES
APPLICATIONS
Waveform Generation
Low-Sine Wave Distortion, 0.5%, Typical
Excellent Temperature Stability, 20ppm/°C, Typ.
Sweep Generation
Wide Sweep Range, 2000:1, Typical
AM/FM Generation
Low-Supply Sensitivity, 0.01%V, Typ.
V/F Conversion
Linear Amplitude Modulation
FSK Generation
TTL Compatible FSK Controls
Phase-Locked Loops (VCO)
Wide Supply Range, 10V to 26V
Adjustable Duty Cycle, 1% TO 99%
GENERAL DESCRIPTION
The XR-2206 is a monolithic function generator
integrated circuit capable of producing high quality sine,
square, triangle, ramp, and pulse waveforms of
high-stability and accuracy. The output waveforms can be
both amplitude and frequency modulated by an external
voltage. Frequency of operation can be selected
externally over a range of 0.01Hz to more than 1MHz.
The circuit is ideally suited for communications,
instrumentation, and function generator applications
requiring sinusoidal tone, AM, FM, or FSK generation. It
has a typical drift specification of 20ppm/°C. The oscillator
frequency can be linearly swept over a 2000:1 frequency
range with an external control voltage, while maintaining
low distortion.
ORDERING INFORMATION
Part No.
Package
Operating
Temperature Range
XR-2206M
16 Lead 300 Mil CDIP
-55°C to +125°C
XR-2206P
16 Lead 300 Mil PDIP
–40°C to +85°C
XR-2206CP
16 Lead 300 Mil PDIP
0°C to +70°C
XR-2206D
16 Lead 300 Mil JEDEC SOIC
0°C to +70°C
Rev. 1.03
1972
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 (510) 668-7000 (510) 668-7017
1
XR-2206
TC1
5
TC2
6
TR1
7
TR2
8
FSKI
9
AMSI
1
Timing
Capacitor
Timing
Resistors
VCC
GND
BIAS
4
12
10
11 SYNCO
VCO
Current
Switches
Multiplier
And Sine
Shaper
WAVEA1 13
WAVEA2 14
SYMA1 15
SYMA2 16
Figure 1. XR-2206 Block Diagram
Rev. 1.03
2
+1
2
STO
3
MO
XR-2206
AMSI
STO
MO
VCC
TC1
TC2
TR1
TR2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
SYMA2
SYMA1
WAVEA2
WAVEA1
GND
SYNCO
BIAS
FSKI
AMSI
STO
MO
VCC
TC1
TC2
TR1
TR2
16 Lead PDIP, CDIP (0.300”)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
SYMA2
SYMA1
WAVEA2
WAVEA1
GND
SYNCO
BIAS
FSKI
16 Lead SOIC (Jedec, 0.300”)
PIN DESCRIPTION
Pin #
Symbol
Type
Description
1
AMSI
I
Amplitude Modulating Signal Input.
2
STO
O
Sine or Triangle Wave Output.
3
MO
O
Multiplier Output.
4
VCC
5
TC1
I
Timing Capacitor Input.
6
TC2
I
Timing Capacitor Input.
7
TR1
O
Timing Resistor 1 Output.
8
TR2
O
Timing Resistor 2 Output.
9
FSKI
I
Frequency Shift Keying Input.
10
BIAS
O
Internal Voltage Reference.
O
Sync Output. This output is a open collector and needs a pull up resistor to VCC.
Positive Power Supply.
11
SYNCO
12
GND
13
WAVEA1
I
Wave Form Adjust Input 1.
14
WAVEA2
I
Wave Form Adjust Input 2.
15
SYMA1
I
Wave Symetry Adjust 1.
16
SYMA2
I
Wave Symetry Adjust 2.
Ground pin.
Rev. 1.03
3
XR-2206
DC ELECTRICAL CHARACTERISTICS
Test Conditions: Test Circuit of Figure 2 Vcc = 12V, TA = 25°C, C = 0.01F, R1 = 100k, R2 = 10k, R3 = 25k
Unless Otherwise Specified. S1 open for triangle, closed for sine wave.
XR-2206M/P
Parameters
Min.
Typ.
XR-2206CP/D
Max.
Min.
Typ.
Max.
Units
Conditions
General Characteristics
Single Supply Voltage
10
26
10
26
V
Split-Supply Voltage
+5
+13
+5
+13
V
20
mA
Supply Current
12
17
14
R1 10k
Oscillator Section
Max. Operating Frequency
0.5
Lowest Practical Frequency
1
0.5
0.01
1
MHz
0.01
Hz
C = 1000pF, R1 = 1k
C = 50F, R1 = 2M
Frequency Accuracy
+1
+4
+2
% of fo
Temperature Stability
Frequency
+10
+50
+20
ppm/°C 0°C TA 70°C
R1 = R2 = 20k
Sine Wave Amplitude Stability2
4800
4800
ppm/°C
Supply Sensitivity
0.01
0.01
%/V
2000:1
fH = fL
2
%
fL = 1kHz, fH = 10kHz
Sweep Range
0.1
1000:1 2000:1
fo = 1/R1C
VLOW = 10V, VHIGH = 20V,
R1 = R2 = 20k
fH @ R1 = 1k
fL @ R1 = 2M
Sweep Linearity
10:1 Sweep
2
1000:1 Sweep
8
8
%
fL = 100Hz, fH = 100kHz
FM Distortion
0.1
0.1
%
+10% Deviation
Figure 5
Recommended Timing Components
Timing Capacitor: C
Timing Resistors: R1 & R2
Triangle Sine Wave
0.001
100
0.001
100
F
1
2000
1
2000
k
Output1
Figure 3
Triangle Amplitude
Sine Wave Amplitude
160
40
60
80
160
mV/k
Figure 2, S1 Open
60
mV/k
Figure 2, S1 Closed
Max. Output Swing
6
6
Vp-p
Output Impedance
600
600
Triangle Linearity
1
1
%
Amplitude Stability
0.5
0.5
dB
For 1000:1 Sweep
%
R1 = 30k
%
See Figure 7 and Figure 8
Sine Wave Distortion
Without Adjustment
2.5
With Adjustment
0.4
2.5
1.0
0.5
1.5
Notes
1 Output amplitude is directly proportional to the resistance, R , on Pin 3. See Figure 3.
3
2 For maximum amplitude stability, R should be a positive temperature coefficient resistor.
3
Bold face parameters are covered by production test and guaranteed over operating temperature range.
Rev. 1.03
4
XR-2206
DC ELECTRICAL CHARACTERISTICS (CONT’D)
XR-2206M/P
Parameters
Min.
Typ.
50
100
XR-2206CP/D
Max.
Min.
Typ.
Max.
Units
50
100
k
Conditions
Amplitude Modulation
Input Impedance
Modulation Range
100
100
%
Carrier Suppression
55
55
dB
Linearity
2
2
%
For 95% modulation
Amplitude
12
12
Vp-p
Measured at Pin 11.
Rise Time
250
250
ns
CL = 10pF
Fall Time
50
50
ns
CL = 10pF
Saturation Voltage
0.2
0.4
0.2
0.6
V
IL = 2mA
Leakage Current
0.1
20
0.1
100
A
VCC = 26V
Square-Wave Output
FSK Keying Level (Pin 9)
0.8
1.4
2.4
0.8
1.4
2.4
V
See section on circuit controls
Reference Bypass Voltage
2.9
3.1
3.3
2.5
3
3.5
V
Measured at Pin 10.
Notes
1 Output amplitude is directly proportional to the resistance, R , on Pin 3. See Figure 3.
3
2 For maximum amplitude stability, R should be a positive temperature coefficient resistor.
3
Bold face parameters are covered by production test and guaranteed over operating temperature range.
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . 750mW
Derate Above 25°C . . . . . . . . . . . . . . . . . . . . . . 5mW/°C
Total Timing Current . . . . . . . . . . . . . . . . . . . . . . . . 6mA
Storage Temperature . . . . . . . . . . . . -65°C to +150°C
SYSTEM DESCRIPTION
The XR-2206 is comprised of four functional blocks; a
voltage-controlled oscillator (VCO), an analog multiplier
and sine-shaper; a unity gain buffer amplifier; and a set of
current switches.
terminals to ground. With two timing pins, two discrete
output frequencies can be independently produced for
FSK generation applications by using the FSK input
control pin. This input controls the current switches which
select one of the timing resistor currents, and routes it to
the VCO.
The VCO produces an output frequency proportional to
an input current, which is set by a resistor from the timing
Rev. 1.03
5
XR-2206
VCC
1mF
4
1
5
16
C
6
FSK Input
S1 = Open For Triangle
= Closed For Sinewave
15
14
13
9
7
8
R1
R2
25K
Mult.
And
Sine
Shaper
VCO
Symmetry Adjust
S1
THD Adjust
500
Current
Switches
Triangle Or
Sine Wave
Output
Square Wave
Output
2
+1
11
10 12
1mF
XR-2206
3
10K
R3
25K
+
VCC
1mF
VCC
5.1K
5.1K
Figure 2. Basic Test Circuit
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
26
70°C Max.
Package
Dissipation
Triangle
5
4
22
1KW
Sinewave
3
2
1
0
20
40
60
80
ICC (mA)
Peak Output Voltage (Volts)
6
2KW
18
10KW
14
30KW
10
8
100
12
16
20
24
28
VCC (V)
R3 in (KW)
Figure 3. Output Amplitude
as a Function of the Resistor,
R3, at Pin 3
Figure 4. Supply Current vs
Supply Voltage, Timing, R
Rev. 1.03
6
XR-2206
10M
ÁÁÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
1M
Normal Output Amplitude
Timing Resistor ( W )
MAXIMUM TIMING R
NORMAL RANGE
100K
TYPICAL VALUE
10K
1K
4V
1.0
0.5
MINIMUM TIMING R
10-2
102
10
104
0
VCC / 2
106
Frequency (Hz)
DC Voltage At Pin 1
Figure 5. R versus Oscillation Frequency.
Figure 6. Normalized Output Amplitude
versus DC Bias at AM Input (Pin 1)
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÁÁÁÁÁÁÁ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÁÁÁÁÁÁÁ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÁÁÁÁÁÁÁ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
5
5
3
2
1
10
100
R=3KW
VOUT =0.5VRMS Pin 2
RL=10KW
3
2
1
0
1.0
ÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
4
C = 0.01mF
Trimmed For Minimum
Distortion At 30 KW
Distortion (%)
Distortion (%)
4
4V
0
103
10
100
1K
10K
100K
1M
Frequency (Hz)
Timing R K(W)
Figure 7. Trimmed Distortion versus
Timing Resistor.
Figure 8. Sine Wave Distortion versus
Operating Frequency with
Timing Capacitors Varied.
Rev. 1.03
7
XR-2206
3
C=0.01F
Frequency Drift (%)
2
R=1M
R=2K
1
R=10K
R=200K
R=200K
0
-1
R=1M
Sweep
Input
R=1K
Rc
+
-
IB
VC
-2
R=1K
-3
-50
-25
0
25
IT
IC
R=10K
R=2K
50
75
R
ÁÁ
Pin 7
or 8
+
3V
-
12
125
100
Ambient Temperature (C°)
Figure 9. Frequency Drift versus
Temperature.
Figure 10. Circuit Connection for Frequency Sweep.
VCC
1F
4
1
5
C
16
Mult.
And
Sine
Shaper
VCO
6
14
13
9
2M
R1
1K
7
8
Current
Switches
+1
10
R
12
S1 Closed For Sinewave
15
S1
200
2
Triangle Or
Sine Wave Output
11
Square Wave
Output
XR-2206
3
R3
50K
+
10K
1F
+
VCC
10F
VCC
5.1K
5.1K
Figure 11. Circuit tor Sine Wave Generation without External Adjustment.
(See Figure 3 for Choice of R3)
Rev. 1.03
8
XR-2206
VCC
1F
4
1
5
C
1
F=
RC
25K
Mult.
And
Sine
Shaper
VCO
6
R1
1K
7
8
RB
15
14
S1 Closed For Sinewave
S1
13
9
2M
Symmetry Adjust
16
RA
500
Current
Switches
2
+1
Triangle Or
Sine Wave Output
Square Wave
Output
11
10
R
12
3
XR-2206
R3
50K
+
1F
10K
+
VCC
10F
VCC
5.1K
5.1K
Figure 12. Circuit for Sine Wave Generation with Minimum Harmonic Distortion.
(R3 Determines Output Swing - See Figure 3)
VCC
1F
4
1
5
>2V
F1
<1V
F2
FSK Input
C
16
VCO
6
R1
R2
9
7
8
15
Mult.
And
Sine
Shaper
14
13
Current
Switches
200
2
+1
11
F1=1/R1C
F2=1/R2C
10 12
+
3
XR-2206
R3
50K
1F
+
10F
VCC
5.1K
5.1K
Figure 13. Sinusoidal FSK Generator
Rev. 1.03
9
FSK Output
XR-2206
VCC
1
f 2
C R1 R2
1F
4
1
5
C
16
Mult.
And
Sine
Shaper
VCO
6
7
8
R1
R1 R2
15
14
9
R1
R2
Duty Cycle =
13
Current
Switches
2
+1
Sawtooth Output
11
10
12
3
R3
24K
+
Pulse Output
XR-2206
5.1K
1F
VCC
+
10F
VCC
5.1K
5.1K
Figure 14. Circuit for Pulse and Ramp Generation.
Frequency-Shift Keying
APPLICATIONS INFORMATION
The XR-2206 can be operated with two separate timing
resistors, R1 and R2, connected to the timing Pin 7 and 8,
respectively, as shown in Figure 13. Depending on the
polarity of the logic signal at Pin 9, either one or the other
of these timing resistors is activated. If Pin 9 is
open-circuited or connected to a bias voltage 2V, only
R1 is activated. Similarly, if the voltage level at Pin 9 is
1V, only R2 is activated. Thus, the output frequency can
be keyed between two levels. f1 and f2, as:
Sine Wave Generation
Without External Adjustment
Figure 11 shows the circuit connection for generating a
sinusoidal output from the XR-2206. The potentiometer,
R1 at Pin 7, provides the desired frequency tuning. The
maximum output swing is greater than V+/2, and the
typical distortion (THD) is < 2.5%. If lower sine wave
distortion is desired, additional adjustments can be
provided as described in the following section.
f1 = 1/R1C and f2 = 1/R2C
For split-supply operation, the keying voltage at Pin 9 is
referenced to V-.
The circuit of Figure 11 can be converted to split-supply
operation, simply by replacing all ground connections
with V-. For split-supply operation, R3 can be directly
connected to ground.
Output DC Level Control
The dc level at the output (Pin 2) is approximately the
same as the dc bias at Pin 3. In Figure 11, Figure 12 and
Figure 13, Pin 3 is biased midway between V+ and
ground, to give an output dc level of V+/2.
Rev. 1.03
10
XR-2206
With External Adjustment:
PRINCIPLES OF OPERATION
Description of Controls
The harmonic content of sinusoidal output can be
reduced to -0.5% by additional adjustments as shown in
Figure 12. The potentiometer, RA, adjusts the
sine-shaping resistor, and RB provides the fine
adjustment for the waveform symmetry. The adjustment
procedure is as follows:
Frequency of Operation:
The frequency of oscillation, fo, is determined by the
external timing capacitor, C, across Pin 5 and 6, and by
the timing resistor, R, connected to either Pin 7 or 8. The
frequency is given as:
1. Set RB at midpoint and adjust RA for minimum
distortion.
f 0 + 1 Hz
RC
2. With RA set as above, adjust RB to further reduce
distortion.
and can be adjusted by varying either R or C. The
recommended values of R, for a given frequency range,
as shown in Figure 5. Temperature stability is optimum
for 4k < R < 200k. Recommended values of C are from
1000pF to 100F.
Triangle Wave Generation
The circuits of Figure 11 and Figure 12 can be converted
to triangle wave generation, by simply open-circuiting Pin
13 and 14 (i.e., S1 open). Amplitude of the triangle is
approximately twice the sine wave output.
Frequency Sweep and Modulation:
Frequency of oscillation is proportional to the total timing
current, IT, drawn from Pin 7 or 8:
f+
FSK Generation
Figure 13 shows the circuit connection for sinusoidal FSK
signal operation. Mark and space frequencies can be
independently adjusted by the choice of timing resistors,
R1 and R2; the output is phase-continuous during
transitions. The keying signal is applied to Pin 9. The
circuit can be converted to split-supply operation by
simply replacing ground with V-.
320I T (mA)
Hz
C(F)
Timing terminals (Pin 7 or 8) are low-impedance points,
and are internally biased at +3V, with respect to Pin 12.
Frequency varies linearly with IT, over a wide range of
current values, from 1A to 3mA. The frequency can be
controlled by applying a control voltage, VC, to the
activated timing pin as shown in Figure 10. The frequency
of oscillation is related to VC as:
ǒ
ǒ
V
f+ 1 1 ) R 1 – C
3
RC
RC
Pulse and Ramp Generation
Figure 14 shows the circuit for pulse and ramp waveform
generation. In this mode of operation, the FSK keying
terminal (Pin 9) is shorted to the square-wave output (Pin
11), and the circuit automatically frequency-shift keys
itself between two separate frequencies during the
positive-going and negative-going output waveforms.
The pulse width and duty cycle can be adjusted from 1%
to 99% by the choice of R1 and R2. The values of R1 and
R2 should be in the range of 1k to 2M.
ǓǓHz
where VC is in volts. The voltage-to-frequency conversion
gain, K, is given as:
K + ēfńēV C + – 0.32 HzńV
R CC
CAUTION: For safety operation of the circuit, IT should be
limited to 3mA.
Rev. 1.03
11
XR-2206
Output Amplitude:
Maximum output amplitude is inversely proportional to
the external resistor, R3, connected to Pin 3 (see
Figure 3). For sine wave output, amplitude is
approximately 60mV peak per k of R3; for triangle, the
peak amplitude is approximately 160mV peak per k of
R3. Thus, for example, R3 = 50k would produce
approximately 13V sinusoidal output amplitude.
at Pin 1 is approximately 100k. Output amplitude varies
linearly with the applied voltage at Pin 1, for values of dc
bias at this pin, within 14 volts of VCC/2 as shown in
Figure 6. As this bias level approaches VCC/2, the phase
of the output signal is reversed, and the amplitude goes
through zero. This property is suitable for phase-shift
keying and suppressed-carrier AM generation. Total
dynamic range of amplitude modulation is approximately
55dB.
Amplitude Modulation:
CAUTION: AM control must be used in conjunction with a
well-regulated supply, since the output amplitude now becomes
a function of VCC.
Output amplitude can be modulated by applying a dc bias
and a modulating signal to Pin 1. The internal impedance
VR
VCC
11
15 V2 5
14
16 6
13
1
VCC
7
6
5
8
10
VR
V1
VCC
4
Int’nI.
Reg.
VR
VR
V1
V2
12
9
Figure 15. Equivalent Schematic Diagram
Rev. 1.03
12
3 2
XR-2206
16 LEAD CERAMIC DUAL-IN-LINE
(300 MIL CDIP)
Rev. 1.00
16
9
1
8
E
E1
D
A1
Base
Plane
Seating
Plane
A
L
e
c
B
α
B1
INCHES
SYMBOL
MILLIMETERS
MIN
MAX
MIN
MAX
A
0.100
0.200
2.54
5.08
A1
0.015
0.060
0.38
1.52
B
0.014
0.026
0.36
0.66
B1
0.045
0.065
1.14
1.65
c
0.008
0.018
0.20
0.46
D
0.740
0.840
18.80
21.34
E1
0.250
0.310
6.35
7.87
E
0.300 BSC
7.62 BSC
e
0.100 BSC
2.54 BSC
L
0.125
0.200
3.18
5.08
α
0°
15°
0°
15°
Note: The control dimension is the inch column
Rev. 1.03
13
XR-2206
16 LEAD PLASTIC DUAL-IN-LINE
(300 MIL PDIP)
Rev. 1.00
16
9
1
8
E1
E
D
A2
Seating
Plane
A
L
α
A1
B
INCHES
SYMBOL
eA
eB
B1
e
MILLIMETERS
MIN
MAX
MIN
MAX
A
0.145
0.210
3.68
5.33
A1
0.015
0.070
0.38
1.78
A2
0.115
0.195
2.92
4.95
B
0.014
0.024
0.36
0.56
B1
0.030
0.070
0.76
1.78
C
0.008
0.014
0.20
0.38
D
0.745
0.840
18.92
21.34
E
0.300
0.325
7.62
8.26
E1
0.240
0.280
6.10
7.11
e
eA
0.100 BSC
2.54 BSC
0.300 BSC
7.62 BSC
eB
0.310
0.430
7.87
10.92
L
0.115
0.160
2.92
4.06
α
0°
15°
0°
15°
Note: The control dimension is the inch column
Rev. 1.03
14
C
XR-2206
16 LEAD SMALL OUTLINE
(300 MIL JEDEC SOIC)
Rev. 1.00
D
16
9
E
H
1
8
C
A
Seating
Plane
e
B
α
A1
L
INCHES
SYMBOL
MILLIMETERS
MIN
MAX
MIN
A
0.093
0.104
2.35
2.65
A1
0.004
0.012
0.10
0.30
B
0.013
0.020
0.33
0.51
C
0.009
0.013
0.23
0.32
D
0.398
0.413
10.10
10.50
E
0.291
0.299
7.40
7.60
e
0.050 BSC
MAX
1.27 BSC
H
0.394
0.419
10.00
10.65
L
0.016
0.050
0.40
1.27
α
0°
8°
0°
8°
Note: The control dimension is the millimeter column
Rev. 1.03
15
XR-2206
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are
free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary
depending upon a user’s specific application. While the information in this publication has been carefully checked;
no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or
malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly
affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation
receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the
user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 1972 EXAR Corporation
Datasheet June 1997
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Rev. 1.03
16