ZILOG Z8523010PEC

SCC
ZiLOG’s Family of
Serial Communication Controllers
8-bit Features include:
• Dual full-duplex channels (Z80230/Z85C30/Z85230)
• Single full-duplex channel (Z85233)
• Ability to accommodate a crystal oscillator, baud
rate generator, and digital phase-locked loop on
each channel
• Processing speeds up to 5Mbps
• Multi-protocol format (async, monosync, bisync,
ZiLOG Sets the standards for SCCs
SDLC/HDLC, SDLC/HDLC loop)
• Encodes in the follow modes: NRZI, FM0, FM1
For over 20 years ZiLOG has set the standard for
and Manchester
Serial Communication Controllers. Based on the
• CRC-16 or CRC-CCITT error detection
industry acclaimed SCC core, ZiLOG offers a wide
• 4-byte Transmit FIFO/8-byte Receive FIFO
variety of Serial Communication Controllers to meet
(Z80230/Z85230/Z85233)
your application requirements.
• 1-byte transmit FIFO/3-byte receive FIFO (Z85C30)
Reduces the need for external logic
16-bit Solutions
ZiLOG SCCs offer low power consumption, higher
The standard and integrated universal serial controllers,
performance, and superior noise immunity. The many
Z16C30 and the Z16C32 offer 16-bit performance, with
on-chip features offered in ZiLOG SCCs help dramatically
processing speeds up to 20 Mbps.
to reduce the need for external logic and code development found in most of the competition.
16-bit Features include:
8-bit Solutions
• Single (Z16C32) and dual (Z16C30)
The standard serial and integrated communications
• Accommodates two baud rate generators
full-duplex channels
controller, Z85C30, allows you to easily implement a fully
integrated solution for many networking applications.
The enhanced dual and mono SCCs, the Z80230, Z85230
and the Z85233, include many features that make pro-
and one digital phase-locked loop
• Processing speeds up to 10Mbps (Z16C30)
and 20Mbps (Z16C32)
• Multi-protocol format (async, monosync,
gramming easy. These parts also reduce CPU overhead,
slaved monosync, bisync, isochronous,
allowing the programmer to select packet handling
nine-bit, SDLC/HDLC, SDLC/HDLC loop)
response and improve cycle access recovery time.
(additional 16-bit features on back)
SCC
Family of Serial Communication Controllers
Additional 16-bit features
• 2 DMA control signals per channel (Z16C30)
• Encodes in the following modes: NRZ, NRZI-Mark,
NRZI-Space, Bi-Phase-Mark (FM1), Bi-Phase-Space (FM0),
Bi-Phase-Level (Manchester), Differential Bi-Phase-Level
• Transmit and receive DMA controllers with single buffer,
pipelined, array and linked-list modes (Z16C32)
• CRC-32, CRC-16 and CRC-CCITT
• 16-Bit Transfers
• 32-byte Transmit FIFO/32-byte Receive FIFO
• Two transmit and two receive DMA channels (Z16C35 only)
Serial
Family
Channels
DMA
Controllers
Bus Interface
MHz
Part number
Package
Pins
SCC
2
0
Multiplex
8
Z80C3008PSC
Z80C3008VSC
Z80C3010PSC
Z80C3010VSC
Z85C3008PEC
Z85C3008PSC
Z85C3008VEC
Z85C3008VSC
Z85C3010PEC
Z85C3010PSC
Z85C3010VEC
Z85C3010VSC
Z85C3016PSC
Z85C3016VSC
Z8023010PSC
Z8023010VSC
Z8023016PSC
Z8023016VSC
Z8523008PSC
Z8523008VEC
Z8523008VSC
Z8523010PEC
Z8523010PSC
Z8523010VEC
Z8523010VSC
Z8523016PEC
Z8523016PSC
Z8523016VEC
Z8523016VSC
Z8523020PSC
Z8523020VSC
Z8523310FSC
Z8523310VSC
Z8523316FSC
Z8523316VSC
Z8523320FSC
Z16C3010AEC
Z16C3010ASC
Z16C3010VEC
Z16C3010VSC
Z16C3220FSC
Z16C3220VSC
Z16C3510VSC
Z16C3516VSC
DIP
PLCC
DIP
PLCC
DIP
DIP
PLCC
PLCC
DIP
DIP
PLCC
PLCC
DIP
PLCC
DIP
PLCC
DIP
PLCC
DIP
PLCC
PLCC
DIP
DIP
PLCC
PLCC
DIP
DIP
PLCC
PLCC
DIP
PLCC
PQFP
PLCC
PQFP
PLCC
PQFP
LQFP
LQFP
PLCC
PLCC
PQFP
PLCC
PLCC
PLCC
40
44
40
44
40
40
44
44
40
40
44
44
40
44
40
44
40
44
40
44
44
40
40
44
44
40
40
44
44
40
44
44
44
44
44
44
100
100
68
68
80
68
68
68
10
Nonmultiplex
8
10
16
ESCC
2
0
Multiplex
10
16
Nonmultiplex
8
10
16
20
EMSCC
1
0
Nonmultiplex
10
16
USC
2
0
Multiplex and
nonmultiplex
IUSC
1
2
ISCC
2
2
Multiplex and
nonmultiplex
Multiplex and
nonmultiplex
www.zilog.com
20
10
20
10
16
Op. Temp. (oC)
0
0
0
0
-40
0
-40
0
-40
0
-40
0
0
0
0
0
0
0
0
-40
0
-40
0
-40
0
-40
0
-40
0
0
0
0
0
0
0
0
-40
0
-40
0
0
0
0
0
+70
+70
+70
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+105
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+105
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+70
+70
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+70
+105
+70
+105
+70
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+70
FL002801-0103