FAIRCHILD 74ACTQ544SC

Revised September 2000
74ACQ544 • 74ACTQ544
Quiet Series Octal Registered Transceiver
with 3-STATE Outputs
General Description
Features
The ACQ/ACTQ544 is an inverting octal transceiver containing two sets of D-type registers for temporary storage of
data flowing in either direction. Separate Latch Enable and
Output Enable inputs are provided for each register to permit independent input and output control in either direction
of data flow. The 544 inverts data in both directions.
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
The ACQ/ACTQ utilizes Fairchild FACT Quiet Series
technology to guarantee quiet output switching and
improved dynamic threshold performance. FACT Quiet
Series features GTO output control and undershoot corrector in addition to a split ground bus for superior performance.
■ Back-to-back registers for storage
■ Guaranteed pin-to-pin skew AC performance
■ 8-bit inverting octal latched transceiver
■ Separate controls for data flow in each direction
■ Outputs source/sink 24 mA
Ordering Code:
Order Number
74ACQ544SC
Package Number
Package Description
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACQ544SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACTQ544SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ544SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
Description
OEAB
A-to-B Output Enable Input (Active LOW)
OEBA
B-to-A Output Enable Input (Active LOW)
CEAB
A-to-B Enable Input (Active LOW)
CEBA
B-to-A Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input (Active LOW)
LEBA
B-to-A Latch Enable Input (Active LOW)
A0 –A7
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B0 –B7
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
FACT, Quiet Series, FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation
DS010685
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74ACQ544 • 74ACTQ544 Quiet Series Octal Registered Transceiver with 3-STATE Outputs
March 1990
74ACQ544 • 74ACTQ544
Logic Symbols
Functional Description
The ACQ/ACTQ544 contains two sets of eight D-type
latches, with separate input and output controls for each
set. For data flow from A to B, for example, the A-to-B
Enable (CEAB) input must be LOW in order to enter data
from A0 –A7 or take data from B0 –B7, as indicated in the
Data I/O Control Table. With CEAB LOW, a LOW signal on
the A-to-B Latch Enable (LEAB) input makes the A-to-B
latches transparent; a subsequent LOW-to-HIGH transition
of the LEAB signal puts the A latches in the storage mode
and their outputs no longer change with the A inputs. With
CEAB and OEAB both LOW, the 3-STATE B output buffers
are active and reflect the data present at the output of the A
latches. Control of data flow from B to A is similar, but using
the CEBA, LEBA and OEBA inputs.
IEEE/IEC
Data I/O Control Table
Inputs
CEAB
LEAB
OEAB
Latch
Output
Status
Buffers
H
X
X
Latched
High Z
X
H
X
Latched
—
L
L
X
Transparent
—
X
X
H
—
High Z
L
X
L
—
Driving
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
A-to-B data flow shown; B-to-A flow control is the same, except using
CEBA, LEBA and OEBA
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Recommended Operating
Conditions
−0.5V to +7.0V
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
−20 mA
VI = VCC + 0.5V
+20 mA
Supply Voltage VCC
−0.5V to VCC + 0.5V
DC Input Voltage (VI)
VO = VCC + 0.5V
+20 mA
0V to VCC
−40°C to +85°C
Minimum Input Edge Rate ∆V/∆t
ACQ Devices
DC Output Source
VIN from 30% to 70% of VCC
±50 mA
VCC @3.0V, 4.5V, 5.5V
125 mV/ns
Minimum Input Edge Rate ∆V/∆t
DC VCC or Ground Current
±50 mA
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
0V to VCC
Operating Temperature (TA)
−0.5V to VCC + 0.5V
or Sink Current (IO)
4.5V to 5.5V
Output Voltage (VO)
−20 mA
DC Output Voltage (VO)
2.0V to 6.0V
ACTQ
Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
ACQ
ACTQ Devices
−65°C to +150 °C
VIN from 0.8V to 2.0V
DC Latch-up Source or
VCC @ 4.5V, 5.5V
±300 mA
Sink Current
Junction Temperature (TJ)
140°C
PDIP
125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for ACQ
Symbol
VIH
VIL
VOH
Parameter
VCC
(V)
TA = + 25°C
Typ
TA = − 40°C to + 85°C
Guaranteed Limits
Minimum HIGH Level
3.0
1.5
2.1
2.1
Input Voltage
4.5
2.25
3.15
3.15
5.5
2.75
3.85
3.85
Maximum LOW Level
3.0
1.5
0.9
0.9
Input Voltage
4.5
2.25
1.35
1.35
5.5
2.75
1.65
1.65
Minimum HIGH Level
3.0
2.99
2.9
2.9
Output Voltage
4.5
4.49
4.4
4.4
5.5
5.49
5.4
5.4
3.0
2.56
2.46
4.5
3.86
3.76
5.5
4.86
4.76
Units
Conditions
VOUT = 0.1V
V
or VCC − 0.1V
VOUT = 0.1V
V
or VCC − 0.1V
V
IOUT = − 50 µA
VIN = VIL or VIH
VOL
Maximum LOW Level
3.0
0.002
0.1
0.1
Output Voltage
4.5
0.001
0.1
0.1
5.5
0.001
0.1
0.1
3.0
0.36
0.44
4.5
0.36
0.44
5.5
0.36
0.44
5.5
± 0.1
± 1.0
IOH = − 12 mA
V
IOH = − 24 mA
IOH = − 24 mA (Note 2)
V
IOUT = 50 µA
VIN = VIL or VIH
IOL = 12 mA
V
IOL = 24 mA
IOL = 24 mA (Note 2)
µA
VI = VCC, GND
IIN
Maximum Input
(Note 4)
Leakage Current
IOLD
Minimum Dynamic
5.5
75
mA
VOLD = 1.65V Max
IOHD
Output Current (Note 3)
5.5
−75
mA
VOHD = 3.85V Min
ICC (Note 4) Maximum Quiescent Supply Current
5.5
8.0
80.0
µA
VIN= VCC or GND
5.5
±0.6
±6.0
µA
VI = VCC, GND
IOZT
VI (OE) = VIL, VIH
Maximum I/O
Leakage Current
VO = VCC, GND
VOLP
Quiet Output
Maximum Dynamic VOL
5.0
1.1
1.5
3
V
Figures 1, 2
(Note 5)(Note 6)
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74ACQ544 • 74ACTQ544
Absolute Maximum Ratings(Note 1)
74ACQ544 • 74ACTQ544
DC Electrical Characteristics for ACQ
Symbol
VOLV
Parameter
Quiet Output
Minimum Dynamic VOL
VIHD
Minimum HIGH Level
Dynamic Input Voltage
VILD
Maximum LOW Level
Dynamic Input Voltage
(Continued)
TA = + 25°C
VCC
TA = − 40°C to + 85°C
Units
Conditions
(V)
Typ
Guaranteed Limits
5.0
−0.6
−1.2
V
5.0
3.1
3.5
V
(Note 5)(Note 7)
5.0
1.9
1.5
V
(Note 5)(Note 7)
Figures 1, 2
(Note 5)(Note 6)
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
Note 5: DIP package.
Note 6: Max number of outputs defined as (n). Data Inputs are driven 0V to 5V. One output @ GND.
Note 7: Max number of Data Inputs (n) switching. (n-1) inputs switching 0V to 5V (ACQ). Input-under-test switching: 5V to threshold (VILD),
0V to threshold (VIHD). f = 1 MHz.
DC Electrical Characteristics for ACTQ
Symbol
VIH
VIL
VOH
Parameter
TA = +25°C
VCC
(V)
Typ
TA = −40°C to +85°C
Guaranteed Limits
Minimum HIGH Level
4.5
1.5
2.0
2.0
Input Voltage
5.5
1.5
2.0
2.0
Maximum LOW Level
4.5
1.5
0.8
0.8
Input Voltage
5.5
1.5
0.8
0.8
Minimum HIGH Level
4.5
4.49
4.4
4.4
Output Voltage
5.5
5.49
5.4
5.4
3.86
3.76
Units
V
V
Conditions
VOUT = 0.1V
or VCC − 0.1V
VOUT = 0.1V
or VCC − 0.1V
V
IOUT = − 50 µA
V
IOH = − 24 mA
VIN = VIL or VIH
4.5
5.5
VOL
4.86
4.76
Maximum LOW Level
4.5
0.001
0.1
0.1
Output Voltage
5.5
0.001
0.1
0.1
0.36
0.44
IOH = − 24 mA (Note 8)
V
IOUT = 50 µA
V
IOL = 24 mA
VIN = VIL or VIH
4.5
IIN
Maximum Input Leakage Current
IOZT
Maximum I/O
Leakage Current
IOL = 24 mA (Note 8)
5.5
0.36
0.44
5.5
± 0.1
± 1.0
µA
5.5
±0.6
±6.0
µA
1.5
mA
VI = VCC − 2.1V
VOLD = 1.65V Max
ICCT
Maximum ICC/Input
5.5
0.6
VI = VCC, GND
VI, (OE) = VIL, VIH
VO = VCC, GND
IOLD
Minimum Dynamic
5.5
75
mA
IOHD
Output Current (Note 9)
5.5
−75
mA
VOHD = 3.85V Min
ICC
Maximum Quiescent or GND
5.5
80.0
µA
VIN = VCC
VOLP
Quiet Output
Maximum Dynamic VOL
VOLV
Quiet Output
Minimum Dynamic VOL
VIHD
Maximum HIGH Level
Dynamic Input Voltage
VILD
Maximum LOW Level
Dynamic Input Voltage
8.0
1.1
1.5
V
5.0
−0.6
−1.2
V
5.0
1.9
2.2
V
(Note 10)(Note 12)
5.0
1.2
0.8
V
(Note 10)(Note 12)
Note 8: All outputs loaded; thresholds on input associated with output under test.
Note 9: Maximum test duration 2.0 ms, one output loaded at a time.
Note 10: DIP package.
Note 11: Max number of outputs defined as (n-1). Data Inputs are driven 0V to 3V, one output @ GND.
Note 12: Max number of Data Inputs (n) switching (n-1) inputs switching 0V to 3V (ACTQ). Input-under-test switching:
3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz.
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Figure 1, Figure 2
5.0
4
(Note 10)(Note 11)
Figure 1, Figure 2
(Note 10)(Note 11)
Symbol
Parameter
VCC
TA = +25°C
(V)
CL = 50 pF
(Note 13)
Min
TA = − 40°C to + 85°C
CL = 50 pF
Typ
Max
Min
Max
tPLH
Propagation Delay
3.3
1.5
8.0
11.0
1.5
12.0
tPHL
Transparent Mode
5.0
1.5
5.0
7.5
1.5
8.0
Units
ns
An to Bn or Bn to An
tPLH
Propagation Delay
3.3
1.5
8.5
12.0
1.5
12.5
tPHL
LEBA, LEAB to An, Bn
5.0
1.5
6.0
8.0
1.5
8.5
Output Enable Time
3.3
1.5
10.0
14.0
1.5
15.0
tPZH
OEBA or OEAB to An or Bn
5.0
1.5
7.0
9.5
1.5
10.0
tPZL
CEBA or CEAB to An or Bn
Output Disable Time
3.3
1.0
7.5
10.5
1.0
11.0
tPHZ
OEBA or OEAB to An or Bn
5.0
1.0
5.0
7.0
1.0
7.5
tPLZ
CEBA or CEAB to An or Bn
tOSHL
Output to Output
3.3
1.0
1.5
1.5
tOSLH
Skew (Note 14)
5.0
0.5
1.0
1.0
ns
ns
ns
ns
Note 13: Voltage Range 5.0 is 5.0V ± 0.5V
Voltage Range 3.3 is 3.3V ± 0.3V
Note 14: Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by
design. Not tested.
AC Operating Requirements for ACQ
Symbol
Parameter
VCC
TA = +25°C
(V)
CL = 50 pF
(Note 15)
tS
tH
tW
Setup Time, HIGH or LOW
3.3
An or Bn to LEBA or LEAB
5.0
Hold Time, HIGH or LOW
3.3
An or Bn to LEBA or LEAB
5.0
Latch Enable, B to A
3.3
Pulse Width, LOW
5.0
TA = − 40°C to + 85°C
CL = 50 pF
Typ
Units
Guaranteed Minimum
3.0
3.0
ns
1.5
1.5
ns
4.0
4.0
ns
Note 15: Voltage Range 5.0 is 5.0V ± 0.5V
Voltage Range 3.3 is 3.0V ± 0.3V
5
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74ACQ544 • 74ACTQ544
AC Electrical Characteristics for ACQ
74ACQ544 • 74ACTQ544
AC Electrical Characteristics for ACTQ
Symbol
Parameter
tPLH
Propagation Delay
tPHL
Transparent Mode
VCC
TA = + 25°C
(V)
CL = 50 pF
TA = − 40°C to + 85°C
CL = 50 pF
Units
(Note 16)
Min
Typ
Max
Min
Max
5.0
1.5
5.5
7.5
1.5
8.5
ns
5.0
1.5
6.5
8.5
1.5
9.0
ns
5.0
1.5
8.0
10.0
1.5
10.5
ns
5.0
1.0
5.5
7.5
1.0
8.0
ns
0.5
1.0
1.0
ns
An to Bn or Bn to An
tPLH
Propagation Delay
tPHL
LEBA, LEAB to An, Bn
tPZH
Output Enable Time
tPZL
OEBA or OEAB to An or Bn
CEBA or CEAB to An or Bn
tPHZ
Output Disable Time
tPLZ
OEBA or OEAB to An or Bn
CEBA or CEAB to An or Bn
tOSHL
Output to Output
tOSLH
Skew (Note 17)
5.0
Note 16: Voltage Range 5.0 is 5.0V ± 0.5V
Note 17: Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by
design. Not tested.
AC Operating Requirements for ACTQ
Symbol
Parameter
VCC
TA = + 25°C
(V)
CL = 50 pF
(Note 18)
tS
Setup Time, HIGH or LOW
An or Bn to LEBA or LEAB
tH
Hold Time, HIGH or LOW
An or Bn to LEBA or LEAB
tW
Latch Enable, B to A
Pulse Width, LOW
Typ
TA = − 40°C to + 85°C
CL = 50 pF
5.0
3.0
3.0
ns
5.0
1.5
1.5
ns
5.0
4.0
4.0
ns
Note 18: Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol
Parameter
Typ
Units
CIN
Input Capacitance
4.5
pF
VCC = 5.0V
CPD
Power Dissipation Capacitance
80.0
pF
VCC = 5.0V
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Units
Guaranteed Minimum
6
Conditions
The setup of a noise characteristics measurement is critical
to the accuracy and repeatability of the tests. The following
is a brief description of the setup used to measure the
noise characteristics of FACT.
VOLP/VOLV and VOHP/VOHV:
• Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually be
the furthest from the ground pin. Monitor the output voltages using a 50Ω coaxial cable plugged into a standard
SMB type connector on the test fixture. Do not use an
active FET probe.
Equipment:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
• Measure VOLP and VOLV on the quiet output during the
worst case transition for active and enable. Measure
VOHP and VOHV on the quiet output during the worst
case transition.
Tektronics Model 7854 Oscilloscope
Procedure:
1. Verify Test Fixture Loading: Standard Load 50 pF,
500Ω.
• Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability of the measurements.
2. Deskew the HFS generator so that no two channels
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
VILD and VIHD:
• Monitor one of the switching outputs using a 50Ω coaxial
cable plugged into a standard SMB type connector on
the test fixture. Do not use an active FET probe.
3. Terminate all inputs and outputs to ensure proper loading of the outputs and that the input levels are at the
correct voltage.
• First increase the input LOW voltage level, VIL, until the
output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds VIL limits, or on output HIGH levels that
exceed VIH limits. The input LOW voltage level at which
oscillation occurs is defined as VILD.
4. Set the HFS generator to toggle all but one output at a
frequency of 1 MHz. Greater frequencies will increase
DUT heating and effect the results of the measurement.
5. Set the HFS generator input levels at 0V LOW and 3V
HIGH for ACT devices and 0V LOW and 5V HIGH for
AC devices. Verify levels with an oscilloscope.
• Next decrease the input HIGH voltage level, VIH, until
the output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds VIL limits, or on output HIGH levels that
exceed VIH limits. The input HIGH voltage level at which
oscillation occurs is defined as VIHD.
• Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability on the measurements.
Note A. VOHV and VOLP are measured with respect to ground reference.
Note B. input pulses have the following characteristics: f = 1 MHz, tr = 3 ns,
tf = 3 ns, skew < 150 ps.
FIGURE 1. Quiet Output Noise Voltage Waveforms
FIGURE 2. Simultaneous Switching Test Circuit
7
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74ACQ544 • 74ACTQ544
FACT Noise Characteristics
74ACQ544 • 74ACTQ544
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
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8
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N24C
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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74ACQ544 • 74ACTQ544 Quiet Series Octal Registered Transceiver with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)