INTEGRATED CIRCUITS DATA SHEET 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Product specification Supersedes data of 1999 Mar 31 File under Integrated Circuits, IC06 1999 Sep 27 Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting FEATURES DESCRIPTION • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V The 74AHC/AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. • Balanced propagation delays The ‘138’ features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. • All inputs have Schmitt-trigger actions The 74AHC/AHCT138 decoders accept three binary weighted address inputs (A0, A1 and A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). • Multiple input enable for easy expansion This multiple enable function allows easy parallel expansion of the ‘138’ to a 1-of-32 (5 to 32 lines) decoder with just four ‘138’ ICs and one inverter. • Ideal for memory chip select decoding The ‘138’ can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. • Inputs accept voltages higher than VCC • For AHC only: operates with CMOS input levels The ‘138’ is identical to the ‘238’ but has inverting outputs. • For AHCT only: operates with TTL input levels • Specified from −40 to +85 and +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. TYPICAL SYMBOL PARAMETER CONDITIONS UNIT AHC tPHL/tPLH AHCT propagation delay An to Yn CL = 15 pF; VCC = 5 V 4.4 4.4 ns propagation delay E3 to Yn; En to Yn CL = 15 pF; VCC = 5 V 4.2 4.3 ns CI input capacitance VI = VCC or GND 3.0 3.0 pF CO output capacitance 4.0 4.0 pF CPD power dissipation capacitance 18 23 pF CL = 50 pF; f = 1 MHz; notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; ∑ (CL × VCC2 × fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. 1999 Sep 27 2 Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting FUNCTION TABLE See note 1. INPUT OUTPUT E1 E2 E3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care. ORDERING INFORMATION PACKAGES OUTSIDE NORTH AMERICA NORTH AMERICA PINS PACKAGE MATERIAL CODE 74AHC138D 74AHC138D 16 SO plastic SOT109-1 74AHC138PW 74AHC138PW DH 16 TSSOP plastic SOT403-1 74AHCT138D 74AHCT138D 16 SO plastic SOT109-1 74AHCT138PW 74AHCT138PW DH 16 TSSOP plastic SOT403-1 PINNING PIN SYMBOL DESCRIPTION 1, 2 and 3 A0, A1 and A2 address inputs 4 and 5 E1 and E2 enable inputs (active LOW) 6 E3 enable input (active HIGH) 7, 9, 10 11, 12, 13, 14 and 15 Y7 to Y0 outputs (active LOW) 8 GND ground (0 V) 16 VCC DC supply voltage 1999 Sep 27 3 Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting handbook, halfpage A0 1 16 VCC A1 2 15 Y0 A2 3 14 Y1 E1 4 13 Y2 138 E2 5 handbook, halfpage 12 Y3 E3 6 11 Y4 Y7 7 10 Y5 GND 8 1 A0 Y0 15 2 A1 Y1 14 3 A2 Y2 13 Y3 12 E1 Y4 11 E2 Y5 10 E3 Y6 9 Y7 7 4 5 6 MNA370 Y6 9 MNA369 Fig.1 Pin configuration. Fig.2 Logic symbol. handbook, halfpage handbook, halfpage 1 DX 0 1 2 3 0 G 0 7 2 2 3 4 4 & 5 5 6 6 7 X/Y 15 14 1 13 2 12 3 1 1 2 2 4 3 11 10 0 4 4 9 5 7 6 & 5 6 EN 7 14 13 15 1 Y1 14 2 A1 Y2 13 3 A2 Y3 12 3-to-8 DECODER 12 ENABLE EXITING Y4 11 11 Y5 10 10 Y6 9 Y7 7 9 4 7 MNA371 (a) Y0 A0 15 E1 5 E2 6 E3 (b) MNA372 Fig.3 IEC logic symbol. 1999 Sep 27 Fig.4 Functional diagram. 4 Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting RECOMMENDED OPERATING CONDITIONS 74AHC SYMBOL PARAMETER 74AHCT CONDITIONS UNIT MIN. TYP. MAX. MIN. TYP. MAX. 4.5 5.0 5.5 V VCC DC supply voltage 2.0 5.0 5.5 VI input voltage 0 − 5.5 0 − 5.5 V VO output voltage 0 − VCC 0 − VCC V Tamb operating ambient temperature range −40 +25 +85 −40 +25 +85 °C −40 +25 +125 −40 +25 +125 °C tr,tf (∆t/∆f) input rise and fall rates see DC and AC characteristics per device VCC = 3.3 V ±0.3 V − − 100 − − − VCC = 5 V ±0.5 V − 20 − − 20 − ns/V LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC DC supply voltage −0.5 +7.0 V VI input voltage range −0.5 +7.0 V IIK DC input diode current VI < −0.5 V; note 1 − −20 mA VO < −0.5 V or VO > VCC + 0.5 V; note 1 IOK DC output diode current − ±20 mA IO DC output source or sink current −0.5 V < VO < VCC + 0.5 V − ±25 mA ICC DC VCC or GND current − ±75 mA Tstg storage temperature range PD power dissipation per package for temperature range: −40 to +125 °C; note 2 −65 +150 °C − 500 Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO packages: above 70 °C the value of PD derates linearly with 8 mW/K. For TSSOP packages: above 60 °C the value of PD derates linearly with 5.5 mW/K. 1999 Sep 27 5 mW Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting DC CHARACTERISTICS 74AHC family Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb (°C) TEST CONDITIONS SYMBOL OTHER VIH VIL VOH VOL −40 to +85 25 PARAMETER HIGH-level input voltage LOW-level input voltage VCC (V) −40 to +125 UNIT MIN. TYP. MAX. MIN. MAX. MIN. MAX. 2.0 1.5 − − 1.5 − 1.5 − 3.0 2.1 − − 2.1 − 2.1 − 5.5 3.85 − − 3.85 − 3.85 − 2.0 − − 0.5 − 0.5 − 0.5 3.0 − − 0.9 − 0.9 − 0.9 5.5 − − 1.65 − 1.65 − 1.65 2.0 1.9 2.0 − 1.9 − 1.9 − 3.0 2.9 3.0 − 2.9 − 2.9 − 4.5 4.4 4.5 − 4.4 − 4.4 − V V HIGH-level output voltage; all outputs VI = VIH or VIL; IO = −50 µA V HIGH-level output voltage VI = VIH or VIL; IO = −4.0 mA 3.0 2.58 − − 2.48 − 2.40 − VI = VIH or VIL; IO = −8.0 mA 4.5 3.94 − − 3.8 − 3.70 − LOW-level output voltage; all outputs VI = VIH or VIL; IO = 50 µA 2.0 − 0 0.1 − 0.1 − 0.1 3.0 − 0 0.1 − 0.1 − 0.1 4.5 − 0 0.1 − 0.1 − 0.1 LOW-level output voltage VI = VIH or VIL; IO = 4 mA 3.0 − − 0.36 − 0.44 − 0.55 VI = VIH or VIL; IO = 8 mA 4.5 − − 0.36 − 0.44 − 0.55 − 1.0 − 2.0 ±2.5 − ±10.0 µA V V V II input leakage current VI = VCC or GND 5.5 − − 0.1 IOZ 3-state output OFF current VI = VIH or VIL; 5.5 VO = VCC or GND − − ±0.25 − ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 − − 4.0 − 40 − 80 µA CI input capacitance − − 3 10 − 10 − 10 pF 1999 Sep 27 6 µA Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting 74AHCT family Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL Tamb (°C) PARAMETER −40 to +85 25 OTHER VCC (V) −40 to +125 UNIT MIN. TYP. MAX. MIN. MAX. MIN. MAX. VIH HIGH-level input voltage 4.5 to 5.5 2.0 − − 2.0 − 2.0 − V VIL LOW-level input voltage 4.5 to 5.5 − − 0.8 − 0.8 − 0.8 V VOH HIGH-level output voltage; all outputs VI = VIH or VIL; IO = −50 µA 4.5 4.4 4.5 − 4.4 − 4.4 − V HIGH-level output voltage VI = VIH or VIL; IO = −8.0 mA 4.5 3.94 − − 3.8 − 3.70 − V LOW-level output voltage; all outputs VI = VIH or VIL; IO = 50 µA 4.5 − 0 0.1 − 0.1 − 0.1 V LOW-level output voltage VI = VIH or VIL; IO = 8 mA 4.5 − − 0.36 − 0.44 − 0.55 V II input leakage current VI = VIH or VIL 5.5 − − 0.1 − 1.0 − 2.0 µA IOZ 3-state output OFF current VI = VIH or VIL; 5.5 VO = VCC or GND per input pin; other inputs at VCC or GND; IO = 0 − − ±0.25 − ±2.5 − ±10.0 µA ICC quiescent supply current VI = VCC or GND; 5.5 IO = 0 − − 4.0 − 40 − 80 µA ∆ICC additional quiescent supply current per input pin VI = VCC − 2.1 V other inputs at VCC or GND; IO = 0 4.5 to 5.5 − − 1.35 − 1.5 − 1.5 mA CI input capacitance − 3 10 − 10 − 10 pF VOL 1999 Sep 27 − 7 Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting AC CHARACTERISTICS Type 74AHC138 GND = 0 V; tr = tf ≤ 3.0 ns. TEST CONDITIONS SYMBOL Tamb (°C) PARAMETER −40 to +85 25 WAVEFORMS CL MIN. −40 to +125 TYP. MAX. MIN. MAX. MIN. MAX. UNIT VCC = 3.0 to 3.6 V; note 1 tPHL/tPLH propagation delay An to Yn see Figs 5 and 7 15 pF − 6.0 11.4 1.0 13.0 1.0 14.5 ns propagation delay E3 to Yn − 5.8 12.8 1.0 15.0 1.0 16.0 ns propagation delay E1, E2 to Yn see Figs 6 and 7 − 5.7 11.4 1.0 13.5 1.0 14.5 ns propagation delay An to Yn see Figs 5 and 7 50 pF − 8.6 15.8 1.0 18.0 1.0 20.0 ns propagation delay E3 to Yn − 8.2 16.3 1.0 18.5 1.0 20.5 ns − 8.2 14.9 1.0 17.0 1.0 19.0 ns propagation delay An to Yn see Figs 5 and 7 15 pF − 4.4 8.1 1.0 9.5 1.0 10.5 ns propagation delay E3 to Yn − 4.2 8.1 1.0 9.5 1.0 10.5 ns propagation delay E1, E2 to Yn see Figs 6 and 7 VCC = 4.5 to 5.5 V; note 2 tPHL/tPLH propagation delay E1, E2 to Yn see Figs 6 and 7 − 4.2 8.1 1.0 9.5 1.0 10.5 ns propagation delay An to Yn see Figs 5 and 7 50 pF − 6.3 10.1 1.0 11.5 1.0 13.0 ns propagation delay E3 to Yn − 6.0 10.1 1.0 11.5 1.0 13.0 ns − 6.0 10.1 1.0 11.5 1.0 13.0 ns propagation delay E1, E2 to Yn see Figs 6 and 7 Notes 1. Typical values at VCC = 3.3 V. 2. Typical values at VCC = 5.0 V. 1999 Sep 27 8 Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Type 74AHCT138 GND = 0 V; tr = tf ≤ 3.0 ns. Tamb (°C) TEST CONDITIONS SYMBOL −40 to +85 25 PARAMETER WAVEFORMS CL MIN. −40 to +125 TYP. MAX. MIN. MAX. MIN. MAX. UNIT VCC = 4.5 to 5.5 V; note 1 tPHL/tPLH propagation delay An to Yn see Figs 5 and 7 15 pF − 4.4 10.4 1.0 12.0 1.0 13.0 ns propagation delay E3 to Yn − 4.3 9.1 1.0 10.5 1.0 11.5 ns propagation delay E1, E2 to Yn see Figs 6 and 7 − 4.3 9.6 1.0 11.0 1.0 12.0 ns propagation delay An to Yn see Figs 5 and 7 50 pF − 6.2 11.4 1.0 13.0 1.0 14.5 ns propagation delay E3 to Yn − 6.2 10.1 1.0 11.5 1.0 13.0 ns − 6.2 10.6 1.0 12.0 1.0 13.5 ns propagation delay E1, E2 to Yn see Figs 6 and 7 Note 1. Typical values at VCC = 5.0 V. 1999 Sep 27 9 Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting AC WAVEFORMS handbook, halfpageVCC handbook, halfpageVCC An, E3 E1, E2 VM(1) INPUT VM(1) INPUT GND GND tPHL tPHL tPLH VOH VM(1) Yn VM(1) Yn VOL VOL MNA373 FAMILY VI INPUT REQUIREMENTS AHC GND to VCC AHCT GND to 3.0 V Fig.5 AHC GND to VCC 50% VCC 50% VCC 1.5 V AHCT GND to 3.0 V 1.5 V 50% VCC Fig.6 PULSE GENERATOR VI 1000 Ω VO D.U.T. CL RT MNA219 S1 open VCC tPHZ/tPZH GND Fig.7 Load circuitry for switching times. 10 50% VCC The enable input (E1, E2) to output (Yn) propagation delays. VCC tPLH/tPHL VM(1) OUTPUT 50% VCC 50% VCC S1 tPLZ/tPZL VM(1) INPUT VI INPUT REQUIREMENTS VM(1) OUTPUT handbook, full pagewidth TEST MNA374 FAMILY VM(1) INPUT The address input (An) and enable input (E3) to output (Yn) propagation delays. 1999 Sep 27 tPLH VOH VCC open GND Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting PACKAGE OUTLINES SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.050 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 inches 0.244 0.041 0.228 θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07S MS-012AC 1999 Sep 27 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-23 97-05-22 11 o 8 0o Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.10 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1.0 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 1999 Sep 27 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 94-07-12 95-04-04 MO-153 12 o Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 1999 Sep 27 74AHC138; 74AHCT138 13 Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable suitable(2) HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 Sep 27 14 Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting NOTES 1999 Sep 27 15 74AHC138; 74AHCT138 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com SCA 68 © Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 245002/02/pp16 Date of release: 1999 Sep 27 Document order number: 9397 750 06295