SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins Typical Propagation Delay Times Port to Port, 8 ns IOL (SINK CURRENT) IOH (SOURCE CURRENT) SN54LS245 12 mA –12 mA SN74LS245 24 mA –15 mA TYPE SN54LS245 . . . J OR W PACKAGE SN74LS245 . . . DB, DW, N, OR NS PACKAGE (TOP VIEW) DIR A1 A2 A3 A4 A5 A6 A7 A8 GND description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 SN54LS245 . . . FK PACKAGE (TOP VIEW) A2 A1 DIR VCC OE These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. A3 A4 A5 A6 A7 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 B1 B2 B3 B4 B5 A8 GND B8 B7 B6 The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can disable the device so that the buses are effectively isolated. 4 ORDERING INFORMATION PACKAGE† TA PDIP – N ORDERABLE PART NUMBER TOP-SIDE MARKING Tube SN74LS245N Tube SN74LS245DW Tape and reel SN74LS245DWR SOP – NS Tape and reel SN74LS245NSR 74LS245 SSOP – DB Tape and reel SN74LS245DBR LS245 Tube SN54LS245J SN54LS245J Tube SNJ54LS245J SNJ54LS245J CFP – W Tube SNJ54LS245W SNJ54LS245W LCCC – FK Tube SN54LS245FK SOIC – DW 0°C to 70°C CDIP – J –55°C to 125°C SN74LS245N LS245 SN54LS245FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 FUNCTION TABLE INPUTS OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation schematics of inputs and outputs EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS VCC VCC 50 Ω NOM 9 kΩ NOM Input Output logic diagram (positive logic) DIR 1 19 A1 2 18 To Seven Other Channels 2 OE POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 B1 SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Package thermal impedance, qJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to GND. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions SN54LS245 SN74LS245 UNIT VCC IOH Supply voltage IOL TA Low-level output current MIN NOM 4.5 5 High-level output current MAX MIN NOM MAX 5.5 4.75 5 5.25 V –15 mA 24 mA 70 °C –12 12 Operating free-air temperature –55 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 125 0 3 SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS† PARAMETER VIH VIL High-level input voltage VIK Input clamp voltage SN54LS245 TYP‡ MIN SN74LS245 MAX 2 TYP‡ VCC = MIN, VCC = MIN II = –18 mA VCC = MIN, VIH = 2 V V, VIL = VIL(max) IOH = –3 mA IOL = 12 mA VOH High level output voltage High-level VOL Low level output voltage Low-level IOZH Off-state output current, high-level voltage applied VCC = MIN, VIH = 2 V V, VIL = VIL(max) VCC = MAX, OE at 2 V IOZL Off-state output current, low-level voltage applied VCC = MAX, OE at 2 V II Input current at maximum input voltage VCC = MAX A or B DIR or OE IIH IIL High-level input current Low-level input current VCC = MAX, VCC = MAX, IOS Short-circuit output current§ VCC = MAX ICC Supply current IOH = MAX –1.5 0.2 0.4 0.2 0.4 2.4 3.4 2.4 3.4 VCC = MAX 0.8 V –1.5 V V V 2 2 0.4 0.4 V IOL = 24 mA 0.5 VO = 2.7 V 20 20 µA VO = 0.4 V –200 –200 µA VI = 5.5 V 0.1 0.1 VI = 7 V 0.1 0.1 mA VIH = 2.7 V VIL = 0.4 V –40 20 20 µA –0.2 –0.2 mA –225 mA –225 Total, outputs high Total, outputs low UNIT V 0.7 A or B MAX 2 Low-level input voltage Hysteresis (VT+ – VT–) MIN Outputs open Outputs at high Z 40 48 70 48 70 62 90 62 90 64 95 64 95 TYP MAX 12 mA † For conditions shown as MIN or MAX, use the appropriate values specified under recommended operating conditions. ‡ All typical values are at VCC = 5 V, TA = 25°C. § Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second. switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1) PARAMETER 4 TEST CONDITIONS tPLH Propagation delay time, low- to high-level output tPHL Propagation delay time time, high high- to low low-level level output tPZL tPZH Output enable time to low level tPLZ tPHZ Output disable time from low level Output enable time to high level Output disable time from high level POST OFFICE BOX 655303 MIN CL = 45 pF pF, RL = 667 W 8 8 12 CL = 45 pF, pF RL = 667 W 27 40 25 40 CL = 5 pF, pF RL = 667 W 15 25 15 28 • DALLAS, TEXAS 75265 UNIT ns ns ns SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 PARAMETER MEASUREMENT INFORMATION SERIES 54LS/74LS DEVICES VCC Test Point VCC RL From Output Under Test CL (see Note A) CL (see Note A) High-Level Pulse 1.3 V S2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.3 V 5 kΩ Test Point LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR 2-STATE TOTEM-POLE OUTPUTS S1 (see Note B) CL (see Note A) RL (see Note B) RL From Output Under Test VCC From Output Under Test Test Point 1.3 V 0V tw Low-Level Pulse 1.3 V tsu 0V In-Phase Output (see Note D) 3V 1.3 V 1.3 V 0V tPZL tPLZ tPHL VOH 1.3 V 1.3 V Waveform 1 (see Notes C and D) VOL + 0.5 V VOL tPZH tPLH VOH 1.3 V 1.3 V VOL Waveform 2 (see Notes C and D) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ≈1.5 V 1.3 V VOL tPHL Out-of-Phase Output (see Note D) 1.3 V 0V Output Control (low-level enabling) 1.3 V tPLH 1.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.3 V 3V Data Input 1.3 V VOLTAGE WAVEFORMS PULSE DURATIONS Input th tPHZ VOH 1.3 V VOH – 0.5 V ≈1.5 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open for tPZL. E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples. F. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 1.5 ns, tf ≤ 2.6 ns. G. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuits and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type 5962-8002101VRA ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type 5962-8002101VSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 80021012A ACTIVE LCCC FK 20 1 TBD 8002101SA ACTIVE CFP W 20 1 TBD JM38510/32803B2A ACTIVE LCCC FK 20 1 TBD JM38510/32803BRA ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type JM38510/32803BSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type SN54LS245J ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type SN74LS245DBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245J OBSOLETE CDIP J 20 SN74LS245N ACTIVE PDIP N 20 POST-PLATE N / A for Pkg Type A42 N / A for Pkg Type POST-PLATE N / A for Pkg Type TBD Call TI 20 Pb-Free (RoHS) CU NIPDAU Call TI TBD Call TI 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type N / A for Pkg Type SN74LS245N3 OBSOLETE PDIP N 20 SN74LS245NE4 ACTIVE PDIP N 20 Call TI SN74LS245NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54LS245FK ACTIVE LCCC FK 20 1 TBD SNJ54LS245J ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type SNJ54LS245W ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type POST-PLATE N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 30-Apr-2007 TAPE AND REEL INFORMATION Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com Device 30-Apr-2007 Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74LS245DBR DB 20 MLA 330 16 8.2 7.5 2.5 12 16 Q1 SN74LS245DWR DW 20 MLA 330 24 10.8 13.0 2.7 12 24 Q1 SN74LS245NSR NS 20 MLA 330 24 8.2 13.0 2.5 12 24 Q1 TAPE AND REEL BOX INFORMATION Device Package Pins Site Length (mm) Width (mm) Height (mm) SN74LS245DBR DB 20 MLA 333.2 333.2 28.58 SN74LS245DWR DW 20 MLA 333.2 333.2 31.75 SN74LS245NSR NS 20 MLA 333.2 333.2 31.75 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 30-Apr-2007 Pack Materials-Page 3 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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