Revised June 2002 74LVT32245 • 74LVTH32245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs General Description Features The LVT32245 and LVTH32245 contain thirty-two noninverting bidirectional buffers with 3-STATE outputs and are intended for bus oriented applications. The devices are byte controlled. Each byte has separate control inputs which can be shorted together for full 32-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. ■ Input and output interface capability to systems at 5V VCC The LVTH32245 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These non-inverting transceivers are designed for low voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT32245 and LVTH32245 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. ■ Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH32245), also available without bushold feature (74LVT32245). ■ Live insertion/extraction permitted ■ Power Up/Down high impedance provides glitch-free bus loading ■ Outputs source/sink −32 mA/+64 mA ■ ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V ■ Packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Ordering Code: Order Number Package Number Package Description 74LVT32245G (Note 1)(Note 2) BGA96A (Preliminary) 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 74LVTH32245G (Note 1)(Note 2) BGA96A 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Note 1: Ordering code “G” indicates Trays. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2002 Fairchild Semiconductor Corporation DS500433 www.fairchildsemi.com 74LVT32245 • 74LVTH32245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs March 2002 74LVT32245 • 74LVTH32245 Connection Diagram Pin Descriptions Pin Names Description OEn Output Enable Input (Active LOW) T/Rn Transmit/Receive Input A0–A31 Side A Inputs/3-STATE Outputs B0–B31 Side B Inputs/3-STATE Outputs FBGA Pin Assignments (Top Thru View) 1 2 A B1 B0 B B3 B2 C B5 B4 D B7 E F 3 4 5 6 T/R1 OE1 A0 A1 GND GND A2 A3 VCC1 VCC1 A4 A5 B6 GND GND A6 A7 B9 B8 GND GND A8 A9 B11 B10 VCC1 VCC1 A10 A11 G B13 B12 GND GND A12 A13 H B14 B15 T/R2 OE2 A15 A14 J B17 B16 T/R3 OE3 A16 A17 K B19 B18 GND GND A18 A19 L B21 B20 VCC2 VCC2 A20 A21 M B23 B22 GND GND A22 A23 N B25 B24 GND GND A24 A25 P B27 B26 VCC2 VCC2 A26 A27 R B29 B28 GND GND A28 A29 T B30 B31 T/R4 OE4 A31 A30 Truth Tables Inputs OE1 Inputs T/R1 Outputs OE3 T/R3 Outputs L L Bus B0–B7 Data to Bus A0–A7 L L Bus B16–B23 Data to Bus A16–A23 L H Bus A0–A7 Data to Bus B0–B7 L H Bus A16–A23 Data to Bus B16–B23 H X HIGH–Z State on A0–A7,B0–B7 H X HIGH–Z State on A16–A23,B16–B23 Inputs OE2 Inputs T/R2 Outputs OE4 T/R4 Outputs L L Bus B8–B15 Data to Bus A8–A15 L L Bus B24–B31 Data to Bus A24–A31 L H Bus A8–A15 Data to Bus B8–B15 L H Bus B24–A31 Data to Bus B24–B31 H X HIGH–Z State on A8–A15,B8–B15 H X HIGH–Z State on A24–A31,B24–B31 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance www.fairchildsemi.com 2 The LVT32245 and LVTH32245 contain thirty-two non-inverting bidirectional buffers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain 16-bit or full 32-bit operation. Logic Diagrams Byte 1 Byte 3 Byte 2 Byte 4 VCC1 is associated with Bytes 1 and 2. VCC2 is associated with Bytes 3 and 4. Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com 74LVT32245 • 74LVTH32245 Functional Description 74LVT32245 • 74LVTH32245 Absolute Maximum Ratings(Note 3) Symbol Parameter Value Conditions Units VCC Supply Voltage −0.5 to +4.6 VI DC Input Voltage −0.5 to +7.0 VO Output Voltage −0.5 to +7.0 Output in 3-STATE −0.5 to +7.0 Output in HIGH or LOW State (Note 4) V V V IIK DC Input Diode Current −50 VI < GND mA IOK DC Output Diode Current −50 VO < GND mA IO DC Output Current 64 Output at HIGH State, VO > VCC 128 Output at LOW State, VO > VCC mA ICC DC Supply Current per Supply Pin ±64 mA IGND DC Ground Current per Ground Pin ±128 mA TSTG Storage Temperature Range −65 to +150 °C Recommended Operating Conditions Symbol Parameter VCC Supply Voltage VI Input Voltage IOH HIGH-Level Output Current IOL LOW-Level Output Current TA Free-Air Operating Temperature ∆t/∆V Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V Min Max Units 2.7 3.6 V 0 5.5 V −32 mA 64 mA −40 +85 °C 0 10 ns/V Note 3: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Note 4: IO Absolute Maximum Ratings must be observed. DC Electrical Characteristics Symbol TA = −40°C to +85°C VCC Parameter (V) Min Input Clamp Diode Voltage VIH Input HIGH Voltage 2.7–3.6 VIL Input LOW Voltage 2.7–3.6 VOH Output HIGH Voltage 2.7–3.6 VCC − 0.2 2.7 2.4 3.0 2.0 VOL II(HOLD) 2.7 Output LOW Voltage Bushold Input Minimum Drive Max −1.2 VIK 2.0 0.8 (Note 5) Current to Change State II Input Current VO ≤ 0.1V or V VO ≥ VCC − 0.1V V IOH = −8 mA IOH = −32 mA IOL = 100 µA 2.7 0.5 IOL = 24 mA 3.0 0.4 3.0 0.5 IOL = 32 mA 3.0 0.55 IOL = 64 mA 75 3.0 500 3.6 V µA µA −500 Data Pins V 0.2 3.0 Control Pins II = −18 mA IOH = −100 µA −75 Bushold Input Over-Drive Conditions V 2.7 (Note 5) II(OD) Units ±1 −5 3.6 VI = 0.8V VI = 2.0V (Note 6) (Note 7) VI = 5.5V 10 3.6 IOL = 16 mA µA VI = 0V or VCC VI = 0V VI = VCC 1 0 ±100 µA 0–1.5 ±100 µA 3-STATE Output Leakage Current 3.6 −5 µA VO = 0.5V IOZL (Note 5) 3-STATE Output Leakage Current 3.6 −5 µA VO = 0.0V IOZH 3.6 5 µA VO = 3.0V IOFF Power Off Leakage Current IPU/PD Power Up/Down 3-STATE Output Current IOZL 3-STATE Output Leakage Current www.fairchildsemi.com 4 0V ≤ VI or VO ≤ 5.5V VO = 0.5V to 3.0V VI = GND or VCC Symbol (Continued) TA = −40°C to +85°C VCC Parameter (V) Min Units Conditions Max IOZH (Note 5) 3-STATE Output Leakage Current 3.6 5 µA IOZH+ 3-STATE Output Leakage Current 3.6 10 µA VO = 3.6V VCC < VO ≤ 5.5V ICCH Power Supply Current VCC1 or VCC2 3.6 0.19 mA Outputs HIGH ICCL Power Supply Current VCC1 or VCC2 3.6 5.0 mA Outputs LOW ICCZ Power Supply Current VCC1 or VCC2 3.6 0.19 mA Outputs Disabled ICCZ+ Power Supply Current VCC1 or VCC2 3.6 0.19 mA VCC ≤ VO ≤ 5.5V, Outputs Disabled ∆ICC Increase in Power Supply Current (Note 8) 3.6 0.2 One Input at VCC − 0.6V mA VCC1 or VCC2 Other Inputs at VCC or GND Note 5: Applies to bushold versions only (74LVTH32245). Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND. Dynamic Switching Characteristics Symbol Parameter (Note 9) TA = 25°C VCC (V) Min Typ Conditions Units CL = 50 pF, RL = 500Ω Max VOLP Quiet Output Maximum Dynamic VOL 3.3 0.8 V (Note 10) VOLV Quiet Output Minimum Dynamic VOL 3.3 −0.8 V (Note 10) Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested. Note 10: Max number of outputs defined as (n). n−1 data inputs are driven 0V to 3V. Output under test held LOW. AC Electrical Characteristics TA = −40°C to +85°C Symbol tPLH CL = 50 pF, RL = 500Ω Parameter VCC = 3.3V ± 0.3V Propagation Delay Data to Output tPHL tPZH Output Enable Time tPZL Output Disable Time tPHZ tPLZ Capacitance Symbol Units VCC = 2.7V Min Max Min Max 1.5 3.5 1.5 3.9 1.3 3.5 1.3 3.9 1.5 4.5 1.5 5.3 1.6 5.3 1.6 6.9 2.3 5.4 2.3 6.1 2.2 5.1 2.2 5.4 ns ns ns (Note 11) Typical Units CIN Input Capacitance Parameter VCC = 0V, VI = 0V or VCC Conditions 4 pF CI/O Input/Output Capacitance VCC = 3.0V, VO = 0V or VCC 8 pF Note 11: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012. 5 www.fairchildsemi.com 74LVT32245 • 74LVTH32245 DC Electrical Characteristics 74LVT32245 • 74LVTH32245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA96A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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