Preliminary Revised August 2001 74LVT32244 • 74LVTH32244 Low Voltage 32-Bit Buffer/Line Driver with 3-STATE Outputs (Preliminary) General Description Features The LVT32244 and LVTH32244 contain thirty-two noninverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Individual 3-STATE control inputs can be shorted together for 8-bit, 16-bit, or 32-bit operation. ■ Input and output interface capability to systems at 5V VCC The LVTH32244 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These buffers and line drivers are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT32244 and LVTH32244 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation ■ Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH32244), also available without bushold feature (74LVT32244). ■ Live insertion/extraction permitted ■ Power Up/Down high impedance provides glitch-free bus loading ■ Outputs source/sink −32 mA/+64 mA ■ ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V ■ Packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary) Ordering Code: Order Number Package Number Package Description 74LVT32244GX (Note 1) BGA96A (Preliminary) 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [Tape and Reel] 74LVTH32244GX (Note 1) BGA96A (Preliminary) 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [Tape and Reel] Note 1: BGA package available in Tape and Reel only. Logic Symbol © 2001 Fairchild Semiconductor Corporation DS500434 www.fairchildsemi.com 74LVT32244 • 74LVTH32244 Low Voltage 32-Bit Buffer/Line Driver with 3-STATE Outputs (Preliminary) January 2001 74LVT32244 • 74LVTH32244 Preliminary Connection Diagram Truth Tables Inputs Outputs OE1 I0-I3 L L L L H H H X Z Inputs Outputs OE2 I4-I7 L L L L H H H X Inputs Pin Names Description Output Enable Input (Active LOW) I0–I31 Inputs O0–O31 I8-I11 L L L L H H H X Z Pin Assignments for FBGA A 1 2 3 4 5 6 O1 O0 OE1 OE2 I0 I1 O8–O11 Outputs OE4 I12-I15 L L L L H H H X Z Inputs Outputs Z Outputs Inputs OEn O4-O7 OE3 (Top Thru View) Pin Descriptions O0-O3 O12-O15 Outputs OE5 I16-I19 L L L L H H H X Z Inputs O16-O19 Outputs B O3 O2 GND GND I2 I3 OE6 C O5 O4 VCC1 VCC1 I4 I5 L L L D O7 O6 GND GND I6 I7 L H H H X Z I20-I23 O20-O23 E O9 O8 GND GND I8 I9 F O11 O10 VCC1 VCC1 I10 I11 G O13 O12 GND GND I12 I13 H O14 O15 OE4 OE3 I15 I14 J O17 O16 OE5 OE6 I16 K O19 O18 GND GND L O21 O20 VCC2 VCC2 M O23 O22 GND GND I22 I23 N O25 O24 GND GND I24 I25 OE8 I28-I31 P O27 O26 VCC2 VCC2 I26 I27 L L L R O29 O28 GND GND I28 I29 L H H T O30 O31 OE8 OE7 I31 I30 H X Z www.fairchildsemi.com Inputs Outputs OE7 I24-I27 L L L I17 L H H I18 I19 H I20 I21 X Inputs Z Outputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial (HIGH or LOW, inputs may not float) Z = High Impedance 2 O24-O27 O28-O31 Preliminary 3-STATE outputs are controlled by an Output Enable (OEn) input. When OEn is LOW, the outputs are in the 2-state mode. When OEn is HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the inputs. The 74LVT32244 and 74LVTH32244 contain thirty-two non-inverting buffers with 3-STATE outputs. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 32-bit operation. The Logic Diagrams Byte 1 Byte 2 Byte 3 Byte 4 VCC1 is associated with Bytes 1 and 2. VCC2 is associated with Bytes 3 and 4. Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com 74LVT32244 • 74LVTH32244 Functional Description 74LVT32244 • 74LVTH32244 Preliminary Absolute Maximum Ratings(Note 2) Symbol Parameter Value Conditions Units VCC Supply Voltage −0.5 to +4.6 VI DC Input Voltage −0.5 to +7.0 VO Output Voltage −0.5 to +7.0 Output in 3-STATE −0.5 to +7.0 Output in High or Low State (Note 3) V V V IIK DC Input Diode Current −50 VI < GND mA IOK DC Output Diode Current −50 VO < GND mA IO DC Output Current 64 VO > VCC Output at HIGH State 128 VO > VCC Output at LOW State mA ICC DC Supply Current per Supply Pin ±64 mA IGND DC Ground Current per Ground Pin ±128 mA TSTG Storage Temperature −65 to +150 °C Recommended Operating Conditions Symbol Parameter Min Max 2.7 3.6 V 0 5.5 V High-Level Output Current −32 mA Low-Level Output Current 64 mA VCC Supply Voltage VI Input Voltage IOH IOL TA Free Air Operating Temperature ∆t/∆V Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V Units −40 +85 °C 0 10 ns/V Note 2: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Note 3: IO Absolute Maximum Rating must be observed. DC Electrical Characteristics Symbol Parameter VIK Input Clamp Diode Voltage TA = −40°C to +85°C VCC (V) Min 2.7 VIH Input HIGH Voltage 2.7–3.6 VIL Input LOW Voltage 2.7–3.6 VOH Output HIGH Voltage 2.7–3.6 VCC − 0.2 2.7 2.4 3.0 2.0 VOL II(HOLD) Output LOW Voltage Bushold Input Minimum Drive Max V VO ≤ 0.1V or 0.8 V VO ≥ VCC − 0.1V V IOH = −8 mA (Note 4) Current to Change State II Input Current IOH = −32 mA 2.7 0.2 IOL = 100 µA 2.7 0.5 IOL = 24 mA 3.0 0.4 3.0 0.5 IOL = 32 mA 3.0 0.55 IOL = 64 mA 3.0 75 3.0 Data Pins 500 µA IOFF Power Off Leakage Current IPU/PD Power Up/Down 3-STATE Current 3.6 10 3.6 ±1 −5 3.6 V µA −500 Control Pins II = −18 mA IOH = −100 µA −75 Bushold Input Over-Drive Conditions V 2.0 (Note 4) II(OD) Units −1.2 IOL = 16 mA VI = 0.8V VI = 2.0V (Note 5) (Note 6) VI = 5.5V µA VI = 0V or VCC VI = 0V VI = VCC 1 0 ±100 µA 0 – 1.5V ±100 µA 0V ≤ VI or VO ≤ 5.5V VO = 0.5V to 3.0V VI = GND or VCC IOZL 3-STATE Output Leakage Current 3.6 −5 µA IOZH 3-STATE Output Leakage Current 3.6 5 µA VO = 3.0V IOZH+ 3-STATE Output Leakage Current 3.6 10 µA VCC < VO ≤ 5.5V www.fairchildsemi.com 4 VO = 0.5V Preliminary Symbol (Continued) TA = −40°C to +85°C VCC Parameter (V) Min Units Conditions Max ICCH Power Supply Current VCC1 or VCC2 3.6 0.19 mA Outputs High ICCL Power Supply Current VCC1 or VCC2 3.6 5.0 mA Outputs Low ICCZ Power Supply Current VCC1 or VCC2 3.6 0.19 mA Outputs Disabled ICCZ+ Power Supply Current VCC1 or VCC2 3.6 0.19 mA VCC ≤ V O ≤ 5.5V, ∆ICC Increase in Power Supply Current 3.6 0.2 mA One Input at VCC − 0.6V Outputs Disabled VCC1 or VCC2 (Note 7) Other Inputs at VCC or GND Note 4: Applies to bushold versions only (LVTH32244). Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND. Dynamic Switching Characteristics Symbol (Note 8) TA = 25°C VCC Parameter (V) Min Typ Max Conditions Units CL = 50 pF, RL = 500Ω VOLP Quiet Output Maximum Dynamic VOL 3.3 0.8 V (Note 9) VOLV Quiet Output Minimum Dynamic VOL 3.3 −0.8 V (Note 9) Note 8: Characterized in SSOP package. Guaranteed parameter, but not tested. Note 9: Max number of outputs defined as (n). n−1 data inputs are driven 0V to 3V. Output under test held LOW. AC Electrical Characteristics TA = −40°C to +85°C Symbol tPLH CL = 50 pF, RL = 500Ω Parameter VCC = 3.3V ± 0.3V Propagation Delay Data to Output tPHL tPZH Output Enable Time tPZL tPHZ Output Disable Time tPLZ Capacitance Symbol VCC = 2.7V Min Max Min Max 1.2 3.5 1.2 3.9 1.2 3.5 1.2 3.9 1.2 4.0 1.2 5.0 1.2 5.0 1.2 6.5 2.0 4.7 2.0 5.2 1.5 4.2 1.5 4.4 Units ns ns ns (Note 10) Typical Units CIN Input Capacitance Parameter VCC = 0V, VI = 0V or VCC Conditions 4 pF COUT Output Capacitance VCC = 3.0V, VO = 0V or VCC 8 pF Note 10: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012. 5 www.fairchildsemi.com 74LVT32244 • 74LVTH32244 DC Electrical Characteristics 74LVT32244 • 74LVTH32244 Low Voltage 32-Bit Buffer/Line Driver with 3-STATE Outputs (Preliminary) Preliminary Physical Dimensions inches (millimeters) unless otherwise noted 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA96A Preliminary Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6