74VHC174 HEX D-TYPE FLIP FLOP WITH CLEAR PRELIMINARY DATA ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX =175 MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.) DESCRIPTION The 74VHC174 is an advanced high-speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Information signals applied to D inputs are M (Micro Package) T (TSSOP Package) ORDER CODES : 74VHC174M 74VHC174T transfered to the Q outputs on the positive going edge of the clock pulse. When the CLEAR input is held low, the Q outputs are held low independently of the other inputs. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/10 74VHC174 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1 CLEAR NAME AND FUNCT ION 2, 5, 7, 10, 12, 15 Q0 to Q5 Flip-Flop Outputs 3, 4, 6, 11, 13, 14 D0 to D5 Data Inputs 9 CLOCK Clock Input (LOW-to-HIGH, Edge- Triggered) 8 GND Ground (0V) 16 VCC Positive Supply Voltage Asyncronous Master Reset (Active LOW) TRUTH TABLE INPUTS OUT PUT S CL EAR D CLO CK Q X L L X H L H H H H X Qn X:Don’t Care LOGIC DIAGRAM Thislogic diagram has notbe used to estimate propagation delays 2/10 F UNCTIO N CLEAR L NO CHANGE 74VHC174 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) ± 25 mA ± 50 mA -65 to +150 o 300 o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Valu e Unit 2.0 to 5.5 V VI Input Voltage 0 to 5.5 V VO Output Voltage 0 to VCC V Top Operating Temperature dt/dv o -40 to +85 Input Rise and Fall Time (see note 1) (VCC = 3.3 ± 0.3V) (V CC = 5.0 ± 0.5V) C 0 to 100 0 to 20 ns/V ns/V 1) VIN from 30% to70%of VCC DC SPECIFICATIONS Symb ol VIH VIL VOH VOL II ICC Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current T est Cond ition s Value o Un it o T A = 25 C -40 to 85 C V CC (V) Min. 2.0 1.5 1.5 3.0 to 5.5 0.7VCC 0.7VCC Typ . Max. Min . Max. V 2.0 0.5 0.5 3.0 to 5.5 0.3VCC 0.3VCC 2.0 IO=-50 µA 1.9 2.0 1.9 3.0 IO=-50 µA 2.9 3.0 2.9 4.5 IO=-50 µA 4.4 4.5 4.4 3.0 IO=-4 mA 2.58 4.5 IO=-8 mA 3.94 2.0 0.0 0.1 0.1 3.0 IO=50 µA IO=50 µA 0.0 0.1 0.1 4.5 IO=50 µA 0.0 0.1 0.1 3.0 IO=4 mA 0.36 0.44 V V 2.48 3.8 V 4.5 IO=8 mA 0.36 0.44 0 to 5.5 VI = 5.5V or GND ±0.1 ±1.0 µA 5.5 VI = VCC or GND 4 40 µA 3/10 74VHC174 AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns) Symb ol Parameter 3.3(*) 15 Value T A = 25 o C Min. Typ . Max. 7.2 11.0 3.3(*) 5.0(**) 5.0(**) 3.3(*) 3.3(*) 50 15 50 15 50 9.7 4.9 6.4 7.4 9.9 14.5 7.2 9.2 11.4 14.9 1.0 1.0 1.0 1.0 1.0 16.5 8.5 10.5 13.5 17.0 (**) 15 50 5.1 6.6 7.6 9.6 1.0 1.0 9.0 11.0 V CC (V) tPLH tPHL Propagation Delay Time CK to Q tPHL Propagation Delay Time CLR to Q Test Co ndition CL (pF ) 5.0 5.0(**) (*) Un it -40 to 85 o C Min . Max. 1.0 13.0 ns ns tw CLR pulse Width LOW 3.3 5.0(**) 5.0 5.0 5.0 5.0 ns tw CK pulse Width HIGH r LOW 3.3(*) 5.0(**) 5.0 5.0 5.0 5.0 ns ts Setup Time D to CK HIGH or LOW 3.3(*) 5.0(**) 5.0 4.5 6.0 4.5 ns th Hold Time D to CK HIGH or LOW 3.3(*) 5.0(**) 0.0 0.5 0.0 0..5 ns tREM Removal Time CLR to CK 3.3(*) 5.0(**) 3.0 2.5 3.0 2.5 ns fMAX Maximum Clock Frequency 3.3(*) 15 95 150 80 (*) 3.3 5.0(**) 50 15 55 130 85 175 50 110 (**) 50 90 120 80 5.0 MHz (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5V ± 0.5V CAPACITIVE CHARACTERISTICS Symb ol Parameter T est Cond ition s Value o T A = 25 C Min. Typ . Max. C IN Input Capacitance 4 CPD Power Dissipation Capacitance (note 1) 29 10 Un it o -40 to 85 C Min . Max. 10 pF pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/6 (per Flip-Flop) 4/10 74VHC174 DYNAMIC SWITCHING CHARACTERISTICS Symb ol Parameter T est Cond ition s Dynamic Low Voltage Quiet Output (note 1, 2) 5.0 VIHD Dynamic High Voltage Input (note 1, 3) 5.0 VILD Dynamic Low Voltage Input (note 1, 3) 5.0 VOLP VOLV Value T A = 25 o C V CC (V) Min. -0.8 C L = 50 pF Un it -40 to 85 o C Typ . Max. 0.3 0.8 Min . Max. -0.3 3.5 V 1.5 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n -1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. TEST CIRCUIT CL = 15/50 pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) 5/10 74VHC174 WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 6/10 74VHC174 WAVEFORM 2: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 3: RECOVERY TIME (f=1MHz; 50% duty cycle) 7/10 74VHC174 Plastic DIP-16 (0.25) MECHANICAL DATA mm DIM. MIN. a1 0.51 B 0.77 TYP. inch MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 8/10 74VHC174 SO-16 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.004 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 e3 0.050 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8 (max.) P013H 9/10 74VHC174 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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