74VHC03 QUAD 2-INPUT OPEN DRAIN NAND GATE PRELIMINARY DATA ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 03 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.) DESCRIPTION The 74VHC03 is an advanced high-speed CMOS QUAD 2-INPUT OPEN DRAIN NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. This device can, with an external pull-up resistor, M (Micro Package) T (TSSOP Package) ORDER CODES : 74VHC03M 74VHC03T be used in wired AND configuration. This device can also be used as a led driver and in any other application requiring a current sink. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2kV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1/7 74VHC03 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 4, 9, 12 1A to 4A NAME AND FUNCT ION Data Inputs 2, 5, 10, 13 1B to 4B Data Inputs 3, 6, 8, 11 1Y to 4Y Data Outputs 7 GND Ground (0V) 14 VCC Positive Supply Voltage TRUTH TABLE A B Y L L Z L H Z H L Z H H L Z: High Impedance ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current 25 mA ± 50 mA VCC ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) -65 to +150 o 300 o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature dt/dv Input Rise and Fall Time (see note 1) (VCC = 3.3 ± 0.3V) (V CC = 5.0 ± 0.5V) 1) VIN from 30% to70%of VCC 2/7 Valu e Unit 2.0 to 5.5 V 0 to 5.5 V 0 to VCC -40 to +85 0 to 100 0 to 20 V o C ns/V ns/V 74VHC03 DC SPECIFICATIONS Symb ol VIH VIL VOL Parameter T est Cond ition s Min. II ICC Typ . Un it -40 to 85 o C Max. Min . Max. High Level Input Voltage 2.0 1.5 1.5 3.0 to 5.5 0.7VCC 0.7VCC Low Level Input Voltage 2.0 0.5 0.5 3.0 to 5.5 0.3VCC 0.3VCC Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current V 2.0 I O=50 µA 0.0 0.1 0.1 3.0 IO=50 µA IO=50 µA 0.0 0.1 0.1 0.0 0.1 0.1 4.5 IOZ Value T A = 25 o C V CC (V) V V 3.0 IO=4 mA 0.36 0.44 4.5 IO=8 mA 0.36 0.44 VI = VIH or VIL VO = VCC or GND ±0.25 ±2.5 µA 5.5 0 to 5.5 VI = 5.5V or GND ±0.1 ±1.0 µA 5.5 VI = VCC or GND 2 20 µA AC ELECTRICAL CHARACTERISTICS (Input tr = tf =3 ns) Symbol Parameter V CC (V) tPZL tPLZ Propagation Delay Time Propagation Delay Time T est Conditio n CL (p F) 3.3 (*) 3.3 (*) 5.0(**) 5.0(**) 3.3 (*) 15 50 15 50 50 RL RL RL RL RL (**) 50 R L = 1 KΩ 5.0 Valu e T A = 25 o C Min. = 1 KΩ = 1 KΩ = 1 KΩ = 1 KΩ = 1 KΩ Unit -40 to 85 o C T yp. 5.5 8.0 3.7 5.2 8.0 Max. 7.9 11.4 5.5 7.5 11.4 Min. 1.0 1.0 1.0 1.0 1.0 Max. 9.5 13.0 6.5 8.5 13.0 5.2 7.5 1.0 8.5 ns ns (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5V ± 0.5V CAPACITIVE CHARACTERISTICS Symb ol Parameter T est Cond ition s Value T A = 25 o C Min. C IN Input Capacitance Un it -40 to 85 o C Typ . Max. 4 10 Min . Max. 10 pF COUT Output Capacitance 5 pF CPD Power Dissipation Capacitance (note 1) 6 pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/4 (per Gate) 3/7 74VHC03 DYNAMIC SWITCHING CHARACTERISTICS Symb ol Parameter T est Cond ition s Dynamic Low Voltage Quiet Output (note 1, 2) 5.0 VIHD Dynamic High Voltage Input (note 1, 3) 5.0 VILD Dynamic Low Voltage Input (note 1, 3) 5.0 VOLP VOLV Value T A = 25 o C V CC (V) Min. -0.8 C L = 50 pF Un it -40 to 85 o C Typ . Max. 0.3 0.8 Min . Max. -0.3 3.5 V 1.5 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n -1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. TEST CIRCUIT CL = 15/50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) 4/7 74VHC03 SO-14 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 0.244 e 1.27 e3 0.050 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.68 0.026 8 (max.) P013G 5/7 74VHC03 TSSOP14 MECHANICAL DATA mm DIM. MIN. inch TYP. A MAX. MIN. MAX. 1.1 0.433 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.25 6.4 6.5 0.246 0.252 0.256 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 BSC 0.0256 BSC K 0o 4o 8o 0o 4o 8o L 0.50 0.60 0.70 0.020 0.024 0.028 A A2 A1 b e K c E1 PIN 1 IDENTIFICATION 1 L E D 6/7 TYP. 74VHC03 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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