AD AD8009AR-REEL

a
1 GHz, 5,500 V/␮s
Low Distortion Amplifier
AD8009
FEATURES
Ultrahigh Speed
5,500 V/␮s Slew Rate, 4 V Step, G = +2
545 ps Rise Time, 2 V Step, G = +2
Large Signal Bandwidth
440 MHz, G = +2
320 MHz, G = +10
Small Signal Bandwidth (–3 dB)
1 GHz, G = +1
700 MHz, G = +2
Settling Time 10 ns to 0.1%, 2 V Step, G = +2
Low Distortion Over Wide Bandwidth
SFDR
–44 dBc @ 150 MHz, G = +2, VO = 2 V p-p
–41 dBc @ 150 MHz, G = +10, VO = 2 V p-p
3rd Order Intercept (3IP)
26 dBm @ 70 MHz, G = +10
18 dBm @ 150 MHz, G = +10
Good Video Specifications
Gain Flatness 0.1 dB to 75 MHz
0.01% Differential Gain Error, RL = 150 ⍀
0.01ⴗ Differential Phase Error, RL = 150 ⍀
High Output Drive
175 mA Output Load Drive
10 dBm with –38 dBc SFDR @ 70 MHz, G = +10
Supply Operation
ⴞ5 V Voltage Supply
14 mA (Typ) Supply Current
APPLICATIONS
Pulse Amplifier
IF/RF Gain Stage/Amplifiers
High Resolution Video Graphics
High Speed Instrumentations
CCD Imaging Amplifier
FUNCTIONAL BLOCK DIAGRAM
8-Lead Plastic SOIC (SO-8)
NC 1
8
AD8009
NC
–IN 2
7 +VS
+IN 3
6
OUT
–VS 4
5
NC
VOUT 1
5
+VS
4
–IN
–VS 2
+IN 3
NC = NO CONNECT
PRODUCT DESCRIPTION
The AD8009 is an ultrahigh speed current feedback amplifier
with a phenomenal 5,500 V/µs slew rate that results in a rise
time of 545 ps, making it ideal as a pulse amplifier.
The high slew rate reduces the effect of slew rate limiting and
results in the large signal bandwidth of 440 MHz required for
high resolution video graphic systems. Signal quality is maintained over a wide bandwidth with worst case distortion of
–40 dBc @ 250 MHz (G = +10, 1 V p-p). For applications
with multitone signals such as IF signal chains, the third order
Intercept (3IP) of 12 dBm is achieved at the same frequency.
This distortion performance coupled with the current feedback
architecture make the AD8009 a flexible component for a gain
stage amplifier in IF/RF signal chains.
The AD8009 is capable of delivering over 175 mA of load
current and will drive four back terminated video loads while
maintaining low differential gain and phase error of 0.02% and
0.04° respectively. The high drive capability is also reflected in
the ability to deliver 10 dBm of output power @ 70 MHz with
–38 dBc SFDR.
The AD8009 is available in a small SOIC package and will
operate over the industrial temperature range –40°C to +85°C.
–30
2
G = +2
RF = 301⍀
RL = 150⍀
1
G=2
RF = 301⍀
VO = 2V p-p
–40
0
2ND,
100⍀ LOAD
–50
–1
VO = 2Vp–p
–2
–3
DISTORTION – dBc
NORMALIZED GAIN – dB
AD8009
5-Lead SOT-23 (RT-5)
G = +10
RF = 200⍀
RL = 100⍀
–4
–5
–60
2ND,
150⍀ LOAD
–70
3RD,
100⍀ LOAD
–80
3RD,
150⍀ LOAD
–6
–90
–7
–8
–100
1
100
10
FREQUENCY RESPONSE – MHz
1000
Figure 1. Large Signal Frequency Response; G = +2 & +10
1
10
FREQUENCY RESPONSE – MHz
100
200
Figure 2. Distortion vs. Frequency; G = +2
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
(@ T = +25ⴗC, V = ⴞ5 V, R = 100 ⍀, for R Package: R = 301 ⍀ for G = +1, +2,
AD8009–SPECIFICATIONS
R = 200 ⍀ for G = +10, for RT Package: R = 332 ⍀ for G = +1, R = 226 ⍀ for G = +2 and R = 191 for G = +10, unless otherwise noted.)
A
F
F
Model
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth, VO = 0.2 V p-p
R Package
RT Package
Large Signal Bandwidth, VO = 2 V p-p
Gain Flatness 0.1 dB, VO = 0.2 V p-p
Slew Rate
Settling Time to 0.1%
Rise and Fall Time
HARMONIC/NOISE PERFORMANCE
SFDR G = +2, VO = 2 V p-p
SFDR G = +10, VO = 2 V p-p
Third Order Intercept (3IP)
W.R.T. Output, G = +10
Input Voltage Noise
Input Current Noise
Differential Gain Error
Differential Phase Error
S
L
F
F
F
Conditions
G = +1, RF = 301 Ω
G = +1, RF = 332 Ω
G = +2
G = +10
G = +2
G = +10
G = +2, RL = 150 Ω
G = +2, RL = 150 Ω, 4 V Step
G = +2, RL = 150 Ω, 2 V Step
G = +10, 2 V Step
G = +2, RL = 150 Ω, 4 V Step
Min
480
300
390
235
45
4500
5 MHz
70 MHz
150 MHz
5 MHz
70 MHz
150 MHz
70 MHz
150 MHz
250 MHz
f = 10 MHz
f = 10 MHz, +In
f = 10 MHz, –In
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 37.5 Ω
NTSC, G = +2, RL = 150 Ω
NTSC, G = +2, RL = 37.5 Ω
DC PERFORMANCE
Input Offset Voltage
AD8009AR
Typ
MHz
MHz
MHz
MHz
MHz
MHz
MHz
V/µs
ns
ns
ns
–74
–53
–44
–58
–41
–41
26
18
12
1.9
46
41
0.01
0.02
0.01
0.04
dBc
dBc
dBc
dBc
dBc
dBc
dBm
dBm
dBm
nV/√Hz
pA/√Hz
pA/√Hz
%
%
Degrees
Degrees
2
TMIN–TMAX
+Input Bias Voltage
TMIN–TMAX
Open Loop Transresistance
90
TMIN–TMAX
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Current
Short Circuit Current
+Input
–Input
+Input
VCM = ± 2.5
± 3.7
RL = 10 Ω, PD Package = 0.7 W 150
POWER SUPPLY
Operating Range
Quiescent Current
Power Supply Rejection Ratio
50
4
50
75
50
75
250
170
5
7
150
150
mV
mV
µV/°C
±µA
±µA
±µA
±µA
kΩ
kΩ
kΩ
Ω
pF
±V
dB
± 3.8
175
330
V
mA
mA
14
64
0.03
0.05
0.03
0.08
110
8
2.6
3.8
52
±4
TMIN–TMAX
VS = ± 4 V to ± 6 V
Units
1000
845
700
350
440
320
75
5500
10
25
0.725
TMIN–TMAX
Offset Voltage Drift
–Input Bias Current
Max
70
±6
16
18
V
mA
mA
dB
Specifications subject to change without notice.
–2–
REV. B
AD8009
ABSOLUTE MAXIMUM RATINGS 1
MAXIMUM POWER DISSIPATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12.6 V
Internal Power Dissipation2
Small Outline Package (R) . . . . . . . . . . . . . . . . . 0.75 Watts
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ± VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . ± 3.5 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Storage Temperature Range R Package . . . . –65°C to +125°C
Operating Temperature Range (A Grade) . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
The maximum power that can be safely dissipated by the
AD8009 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic
encapsulated devices is determined by the glass transition
temperature of the plastic, approximately +150°C. Exceeding
this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the
package. Exceeding a junction temperature of +175°C for an
extended period can result in device failure.
While the AD8009 is internally short circuit protected, this
may not be sufficient to guarantee that the maximum junction
temperature (+150°C) is not exceeded under all conditions.
To ensure proper operation, it is necessary to observe the
maximum power derating curves.
2.0
MAXIMUM POWER DISSIPATION – Watts
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Lead SOIC Package: θJA = 155°C/W.
TJ = +150°C
1.5
8-LEAD SOIC PACKAGE
1.0
0.5
5-LEAD SOT-23 PACKAGE
0
–50 –40 –30 –20 –10 0 10 20 30 40 50 60
AMBIENT TEMPERATURE – °C
70 80 90
Figure 3. Plot of Maximum Power Dissipation vs.
Temperature
ORDERING GUIDE
Model
AD8009AR
AD8009AR-REEL
AD8009ART
AD8009ART-REEL
AD8009ART-REEL7
AD8009-EB
Temperature
Range
Package
Description
Package
Option
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead SOIC
13" Tape and Reel
5-Lead SOT-23
13" Tape and Reel
7" Tape and Reel
Evaluation Board
SO-8
SO-8
RT-5
RT-5
RT-5
SO-8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8009 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. B
–3–
Branding
Information
HKJ
HKJ
HKJ
WARNING!
ESD SENSITIVE DEVICE
AD8009–Typical Performance Characteristics
3
6.2
2
6.1
G = +1, R
G = +1, RT
6.0
0
R PACKAGE:
RL = 100⍀
VO = 200mV p–p
G = +1, +2: RF = 301⍀
G = +10: RF = 200⍀
RT PACKAGE:
G = +1: RF = 332⍀
G = +2: RF = 226⍀
G = +10: RF = 191⍀
–1
–2
–3
–4
–5
GAIN FLATNESS – dB
NORMALIZED GAIN – dB
1
G = +2, R & RT
G = +10, R & RT
G = +2
RF = 301⍀
RL = 150⍀
VO = 200mV p–p
5.8
5.7
5.6
5.5
5.4
–6
–7
5.9
5.3
5.2
10
100
FREQUENCY – MHz
1
1000
1
1000
Figure 7. Gain Flatness; G = +2
Figure 4. Frequency Response; G = +1, +2, +10, R and RT
Packages
8
22
7
21
6
20
5
19
G = +2
RF = 301⍀
RL = 150⍀
VO AS SHOWN
4
3
2
GAIN – dB
GAIN – dB
10
100
FREQUENCY – MHz
4V p–p
2V p–p
G = +10
RF = 200⍀
RL = 100⍀
VO AS SHOWN
18
17
2V p–p
4V p–p
16
1
15
0
14
–1
13
12
–2
1
10
100
FREQUENCY – MHz
1000
1
Figure 5. Large Signal Frequency Response; G = +2
10
100
FREQUENCY – MHz
1000
Figure 8. Large Signal Frequency Response; G = +10
8
22
7
21
+85ⴗC
6
20
–40ⴗC
19
–40ⴗC
G = +2
RF = 301⍀
RL = 150⍀
VO = 2V p–p
4
3
2
GAIN – dB
GAIN – dB
5
+85ⴗC
17
–40ⴗC
+85ⴗC
16
1
15
0
14
–1
13
–2
G = +10
RF = 200⍀
RL = 100⍀
VO = 2V p–p
18
12
1
10
100
FREQUENCY – MHz
1000
1
Figure 6. Large Signal Frequency Response vs.
Temperature; G = +2
10
100
FREQUENCY – MHz
1000
Figure 9. Large Signal Frequency Response vs.
Temperature; G = +10
–4–
REV. B
AD8009
–30
–30
G=2
RF = 301⍀
VO = 2V p-p
–40
DISTORTION – dBc
–50
DISTORTION – dBc
–40
2ND,
100⍀ LOAD
–60
2ND,
150⍀ LOAD
–70
3RD,
100⍀ LOAD
–80
3RD,
150⍀ LOAD
–45
–50
–55
3RD
–60
–65
–75
–80
–100
1
10
FREQUENCY RESPONSE – MHz
100
5
200
200
–35
–40
250MHz
–40
–45
–45
70MHz
DISTORTION – dBc
–55
5MHz
–60
–65
200⍀
–70
22.1⍀
50⍀
50⍀
50⍀
–60
–65
–70
–90
–95
–10
0
2
4
6
8
10
200⍀
22.1⍀
50⍀ P
OUT
–85
–85
–10 –8
–2
5MHz
–75
–80
–4
70MHz
–55
–80
POUT
–75
–6
250MHz
–50
–50
12
14
POUT – dBm
50⍀
50⍀
–8
–6
–4
–2
0
2
4
6
8
10
12
14
POUT – dBm
Figure 11. 2nd Harmonic Distortion vs. POUT; (G = +10)
Figure 14. 3rd Harmonic Distortion vs. POUT; (G = +10)
50
0.02
G = +2
RF = 301⍀
0.01
22.1⍀
0.00
–0.01
RL = 37.5⍀
0
IRE
0.10
G = +2
0.05 RF = 301⍀
200⍀
45
RL = 150⍀
INTERCEPT POINT – dBm
DIFF GAIN – %
100
Figure 13. Distortion vs. Frequency; G = +10
–35
–0.02
10
FREQUENCY – MHz
Figure 10. Distortion vs. Frequency; G = +2
DIFF PHASE – Degrees
2ND
–70
–90
DISTORTION – dBc
G = +10
RF = 200⍀
RL = 100⍀
VO = 2V p–p
–35
100
RL = 37.5⍀
50⍀ P
OUT
40
50⍀
50⍀
35
30
25
20
–0.00
RL = 150⍀
15
–0.05
–0.10
0
IRE
10
10
100
250
Figure 15. Two Tone, 3rd Order IMD Intercept vs.
Frequency; G = +10
Figure 12. Differential Gain and Phase
REV. B
100
FREQUENCY – MHz
–5–
AD8009
1M
0
–10
301⍀
301⍀
VIN =
200mVp–p
–20
–40
GAIN
RL = 100⍀
10k
–80
PHASE
VO
154⍀
154⍀
100⍀
–25
CMRR– dB
100k
PHASE – Degrees
TRANSRESISTANCE– ⍀
–15
–30
–35
–40
–45
1k
–120
–50
–55
100
0.01
0.1
1
100
10
–160
1000
–60
1
10
100
FREQUENCY – MHz
1000
FREQUENCY – MHz
Figure 16. Transresistance and Phase vs. Frequency
Figure 19. CMRR vs. Frequency
10
100
–10
PSRR – dB
–20
–30
–PSRR
+PSRR
–40
G = +2
RF = 301⍀
OUTPUT RESISTANCE – ⍀
G = +2
RF = 301⍀
RL = 100⍀
100mV p–p ON TOP OF VS
0
–50
–60
10
1
0.1
0.01
–70
0.03 0.1
1
10
500
100
0.03 0.1
1
FREQUENCY – MHz
Figure 17. PSRR vs. Frequency
100
500
Figure 20. Output Resistance vs. Frequency
10
300
INPUT VOLTAGE NOISE – nV Hz
250
INPUT CURRENT – pA Hz
10
FREQUENCY – MHz
200
150
100
NONINVERTING CURRENT
50
8
6
4
2
INVERTING CURRENT
0
10
100
1k
10k
100k
1M
10M
0
10
100M 250M
100
1k
10k
100k
1M
10M
100M 250M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 18. Current Noise vs. Frequency
Figure 21. Voltage Noise vs. Frequency
–6–
REV. B
AD8009
–20
25
–30
G = +10
RF = 200⍀
20
–50
15
S12 – dB
NOISE FIGURE – dB
–40
G = +10
RF = 301⍀
RL = 100⍀
10
–60
–70
–80
5
–90
0
1
10
100
SOURCE RESISTANCE – ⍀
500
1
Figure 22. Noise Figure
10
100
FREQUENCY – MHz
1000
Figure 25. Reverse Isolation (S12 ); G = +10
2.0
2.2
1.8
2.0
CCOMP
49.9⍀
49.9⍀
1.8
1.6
VSWR
VSWR
200⍀
1.4
1.6
22.1⍀
1.4
CCOMP = 0pF
1.2
1.2
CCOMP = 3pF
1
1
0
0.1
1
10
FREQUENCY – MHz
100
0
0.1
500
Figure 23. Input VSWR; G = +10
1
10
FREQUENCY – MHz
100
500
Figure 26. Output VSWR; G = +10
20
18
POUT MAX – dBm
16
G = +2
RF = 301⍀
14
VOUT
100
90
12
G = +10
RF = 200⍀
10
G = +10
RF = 200⍀
RL = 100⍀
VIN = 2VSTEP
8
RF
6
RG
50⍀
4
10
POUT
0%
50⍀
50⍀
2
2V
2V
250ns
0
5
10
100
250
FREQUENCY – MHz
Figure 24. Maximum Output Power vs. Frequency
REV. B
Figure 27. Overdrive Recovery; G = +10
–7–
AD8009
G = +2
RF = 301⍀
RL = 150⍀
VO = 200mV p–p
50mV
G = +10
RF = 200⍀
RL = 100⍀
VO = 200mV p–p
1ns
50mV
Figure 28. Small Signal Transient Response; G = +2
Figure 31. Small Signal Transient Response; G = +10
G = +2
RF = 301⍀
RL = 150⍀
VO = 2V p–p
500mV
G = +10
RF = 200⍀
RL = 100⍀
VO = 2V p–p
1ns
500mV
Figure 29. 2 V Transient Response; G = +2
2ns
Figure 32. 2 V Transient Response; G = +10
G = +2
RF = 301⍀
RL = 150⍀
VO = 4V p–p
1V
2ns
G = +10
RF = 200⍀
RL = 100⍀
VO = 4V p–p
1.5ns
1V
Figure 30. 4 V Transient Response; G = +2
3ns
Figure 33. 4 V Transient Response; G = +10
–8–
REV. B
AD8009
8
12
CA = 2pF
3 dB/div
7
6
6
CA = 1pF
1 dB/div
4
0
CA = 0pF
1 dB/div
3
–3
2
–6
VOUT = 200mV p–p
VIN
1
50⍀
CA
0.001␮F
2
49.9⍀
100⍀
499⍀
0
+5V
–9
VOUT
ZIN = 50⍀
ZOUT = 50⍀
3
GAIN – dB
5
GAIN – dB
HP8753D
9
0.1␮F
+
10␮F
7
AD8009
3
49.9⍀
6
WAVETEK 5201
BPF
4
–12
301⍀
499⍀
–15
–1
301⍀
1
10
1000
100
FREQUENCY – MHz
0.001␮F
–5V
Figure 34. Small Signal Frequency Response vs. Parasitic
Capacitance
0.1␮F
10␮F
+
Figure 36. AD8009 Driving a Bandpass RF Filter
0
VIN
50⍀
CA
CA = 1pF
VOUT
499⍀
AD8009
G=2
RF = RG= 301⍀
DRIVING
WAVETEK 5201
TUNABLE BPF
fC = 50MHz
–10
100⍀
499⍀
–20
VOUT = 200mV p–p
VS = ⴞ5V
–30
REJECTION – dB
CA = 2pF
CA = 0pF
–40
–50
–60
–70
–80
40mV
1.5ns
–90
CENTER 50.000 MHz
Figure 35. Small Signal Pulse Response vs. Parasitic
Capacitance
APPLICATIONS
All current feedback op amps are affected by stray capacitance
on their –INPUT. Figures 34 and 35 illustrate the AD8009’s
response to such capacitance.
Figure 34 shows the bandwidth can be extended by placing a
capacitor in parallel with the gain resistor. The small signal pulse
response corresponding to such an increase in capacitance/
bandwidth is shown in Figure 35.
As a practical consideration, the higher the capacitance on the
–INPUT to GND, the higher RF needs to be to minimize
peaking/ringing.
RF Filter Driver
The output drive capability, wide bandwidth and low distortion
of the AD8009 are well suited for creating gain blocks that can
drive RF filters. Many of these filters require that the input be
driven by a 50 Ω source, while the output must be terminated in
50 Ω for the filters to exhibit their specified frequency response.
REV. B
SPAN 80.000 MHz
Figure 37. Frequency Response of Bandpass Filter Circuit
Figure 36 shows a circuit for driving and measuring the
frequency response of a filter, a Wavetek 5201 Tunable Band
Pass Filter that is tuned to a 50 MHz center frequency. The
HP8753D network provides a stimulus signal for the measurement. The analyzer has a 50 Ω source impedance that drives a
cable that is terminated in 50 Ω at the high impedance noninverting input of the AD8009.
The AD8009 is set at a gain of two. The series 50 Ω resistor at
the output, along with the 50 Ω termination provided by the
filter and its termination, yield an overall unity gain for the
measured path. The frequency response plot of Figure 37
shows the circuit to have an insertion loss of 1.3 dB in the pass
band and about 75 dB rejection in the stop band.
–9–
AD8009
75⍀ COAX
PRIMARY MONITOR
IOUTR
ADV7160
ADV7162
75⍀
RED
75⍀
75⍀
GREEN
75⍀
75⍀
BLUE
75⍀
IOUTG
IOUTB
5V
+
0.1␮F
10␮F
7
3
ADDITIONAL MONITOR
AD8009
2
6
75⍀
75⍀ COAX
4
RED
75⍀
301⍀
301⍀
0.1␮F
–5V
+
10␮F
3
6
AD8009
75⍀
2
GREEN
75⍀
BLUE
75⍀
301⍀
301⍀
3
AD8009
6
75⍀
2
301⍀
301⍀
Figure 38. Driving an Additional High Resolution Monitor Using Three AD8009s
RGB Monitor Driver
High resolution computer monitors require very high full power
bandwidth signals to maximize their display resolution. The
RGB signals that drive these monitors are generally provided by
a current-out RAMDAC that can directly drive a 75 Ω doubly
terminated line.
There are times when the same output wants to be delivered to
additional monitors. The termination provided internally by
each monitor prohibits the ability to simply connect a second
monitor in parallel with the first. Additional buffering must be
provided.
Figure 38 shows a connection diagram for two high resolution
monitors being driven by an ADV7160 or ADV7162, a 220 MHz
(Mega-pixel per second) triple RAMDAC. This pixel rate
requires a driver whose full power bandwidth is at least half the
pixel rate or 110 MHz. This is to provide good resolution for a
worst case signal that swings between zero scale and full scale
on adjacent pixels.
The primary monitor is connected in the conventional fashion
with a 75 Ω termination to ground at each end of the 75 Ω
cable. Sometimes this configuration is called “doubly terminated” and is used when the driver is a high output impedance
current source.
For the additional monitor, each of the RGB signals close to the
RAMDAC output is applied to a high input impedance, noninverting input of an AD8009 that is configured for a gain of +2. The
outputs each drive a series 75 Ω resistor, cable and termination
resistor in the monitor that divides the output signal by two, thus
providing an overall unity gain. This scheme is referred to as
“back termination” and is used when the driver is a low output
impedance voltage source. Back termination requires that the
voltage of the signal be double the value that the monitor sees.
Double termination requires that the output current be double the
value that flows in the monitor termination.
–10–
REV. B
AD8009
Driving a Capacitive Load
A capacitive load, like that presented by some A/D converters,
can sometimes be a challenge for an op amp to drive depending
on the architecture of the op amp. Most of the problem is
caused by the pole created by the output impedance of the op
amp and the capacitor that is driven. This creates extra phase
shift that can eventually cause the op amp to become unstable.
One way to prevent instability and improve settling time when
driving a capacitor is to insert a resistor in series between the op
amp output and the capacitor. The feedback resistor is still
connected directly to the output of the op amp, while the series
resistor provides some isolation of the capacitive load from the
op amp output.
+5V
G = + 2: RF = 301⍀ = RG
G = + 10: RF = 200⍀, RG = 22.1⍀
0.001␮F
3
RT
49.9⍀
RG
+
0.1␮F
10␮F
Figure 39 shows such a circuit with an AD8009 driving a 50 pF
load. With RS = 0, the AD8009 circuit will be unstable. For a
gain of +2 and +10, it was found experimentally that setting RS
to 42.2 Ω will minimize the 0.1% settling time with a 2 V step at
the output. The 0.1% settling time was measured to be 40 ns with
this circuit.
For smaller capacitive loads, a smaller RS will yield optimal
settling time, while a larger RS will be required for larger
capacitive loads. Of course, a larger capacitance will always
require more time for settling to a given accuracy than a smaller
one, and this will be lengthened by the increase in RS required.
At best, a given RC combination will require about 7 time
constants by itself to settle to 0.1%, so a limit will be reached
where too large a capacitance cannot be driven by a given
op amp and still meet the system’s required settling time
specification.
7
AD8009
2
6 2VSTEP
RS
CL
4
50pF
RF
0.001␮F
–5V
0.1␮F
+
10␮F
Figure 39. Capacitive Load Drive Circuit
REV. B
–11–
AD8009
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
C2199–0–4/00 (rev. B)
8-Lead SOIC
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
0.1574 (4.00)
0.1497 (3.80)
8
5
1
4
PIN 1
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
0.2440 (6.20)
0.2284 (5.80)
0.0500 0.0192 (0.49)
(1.27) 0.0138 (0.35)
BSC
0.0196 (0.50)
x 45°
0.0099 (0.25)
0.0098 (0.25)
0.0075 (0.19)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
5-Lead Plastic Surface Mount (SOT-23)
(RT-5)
0.1181 (3.00)
0.1102 (2.80)
0.0669 (1.70)
0.0590 (1.50)
5
1
4
2
0.1181 (3.00)
0.1024 (2.60)
3
PIN 1
0.0374 (0.95) BSC
0.0748 (1.90)
BSC
0.0512 (1.30)
0.0354 (0.90)
0.0197 (0.50)
0.0138 (0.35)
SEATING
PLANE
10ⴗ
0ⴗ
0.0217 (0.55)
0.0138 (0.35)
PRINTED IN U.S.A.
0.0059 (0.15)
0.0019 (0.05)
0.0079 (0.20)
0.0031 (0.08)
0.0571 (1.45)
0.0374 (0.95)
–12–
REV. B