20 MHz to 500 MHz IF Amplifier ADL5534 Preliminary Technical Data 14 NC 13 RFOUT1 ADL5534 Bias 11 NC 10 NC 9 NC RFOUT2 8 NC 3 NC 4 12 CLIN1 Bias CLIN2 7 NC 1 NC 2 15 NC 16 RFIN1 FUNCTIONAL BLOCK DIAGRAM NC 6 Fixed gain of 20 dB Operation up to 500 MHz Input/output internally matched to 50 Ω Integrated bias control circuit OIP3 of 40.4 dBm at 70 MHz P1dB of 20.4 dBm at 70 MHz Noise Figure of 2.6 dB at 70 MHz Single 5 V power supply Power supply current of 90 mA per amplifier ADL5531 20 dB gain single-channel version + 1 kV ESD (Class 1C) RFIN2 5 FEATURES Figure 1. Block Diagram GENERAL DESCRIPTION The ADL5534 contains two independent broadband, fixed-gain, linear amplifiers that operates at frequencies up to 500 MHz. The device can be used in a wide variety of applications including cellular, satellite, broadband, and instrumentation equipment. The ADL5534 has a fixed gain 20 dB and is stable over frequency, temperature, power supply and from device to device. The ADL5534 is single-ended and internally matched to 50 Ω. Only input/output ac-coupling capacitors, power supply decoupling capacitors, and an external bias inductor is required for operation for each channel. The ADL5534 is fabricated on a GaAs HBT process, and has an ESD rating of + 1 kV (Class 1C). The device is packaged in a 16lead 5mm x 5mm LFCSP that uses an exposed paddle for excellent thermal impedance. The ADL5534 consumes 90 mA per channel on a single +5 V supply and is fully specified for operation from −40°C to +85°C. The ADL5531 is the 20 dB gain single-channel version, and fully populated evaluation boards for each IFA are available. Rev. PrE 2/08 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. ADL5534 Preliminary Technical Data TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................4 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions..............................5 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................6 Revision History ............................................................................... 2 EVALUATION BOARD ...................................................................7 Specifications..................................................................................... 3 OUTLINE DIMENSIONS ...............................................................9 Absolute Maximum Ratings............................................................ 4 ORDERING GUIDE.....................................................................9 REVISION HISTORY 2/08—Rev. PrE: Preliminary Version Rev. PrE | Page 2 of 9 Preliminary Technical Data ADL5534 SPECIFICATIONS VCC = 5 V, T = 25°C, unless otherwise noted. Table 1. Parameter OVERALL FUNCTION Frequency Range Gain vs. Frequency Input Return Loss (S11) Output Return Loss (S22) Isolation (RFIN1 to RFOUT2 and RFIN2 to RFOUT1) Isolation (RFIN1 to RFOUT2 and RFIN2 to RFOUT1) FREQUENCY = 70 MHz Gain vs. Temperature Output 1 dB Compression Point Output Third-Order Intercept Noise Figure FREQUENCY = 190 MHz Gain vs. Temperature Output 1 dB Compression Point Output Third-Order Intercept Noise Figure FREQUENCY = 380 MHz Gain vs. Temperature Output 1 dB Compression Point Output Third-Order Intercept Noise Figure POWER INTERFACE Supply Voltage Supply Current vs. Temperature Power Dissipation Conditions Min Typ 20 Max Unit 500 ± 50 MHz. Center Frequency = 190 MHz or 380 MHz 30 MHz to 500 MHz 30 MHz to 500 MHz Frequency = 200 MHz ±0.2 -10 -10 -36.5 MHz dB dB dB dB Frequency = 500 MHz -30.6 dB 21.0 ±.25 20.4 40.4 2.6 dB dB dBm dBm dB 20.4 ±.25 20.6 38.9 2.8 dB dB dBm dBm dB 19.8 ±.25 20.4 36.3 3.0 dB dB dBm dBm dB −40°C ≤ TA ≤ +85°C ∆f = 1 MHz, Output Power (POUT) = 0 dBm (per tone) −40°C ≤ TA ≤ +85°C ∆f = 1 MHz, Output Power (POUT) = 0 dBm (per tone) −40°C ≤ TA ≤ +85°C ∆f = 1 MHz, Output Power (POUT) = 0 dBm (per tone) Pins RFOUT, Vcc 4.75 Current Consumption is Specified Per Amplifier −40°C ≤ TA ≤ +85°C (Specified Per Amplifier) VPOS = 5V (Specified Per Amplifier) Rev. PrE | Page 3 of 9 5 90 104 450 5.25 V mA mA mW ADL5534 Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage, VPOS Input Power Per Amplifier(re: 50 Ω) Internal Power Dissipation Per Amplifier (Paddle Soldered) θJA (Paddle Soldered) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range (Soldering 60 sec) Rating 5.5 V +12 dBm 650 mW TBD °C/W 150 °C −40°C to +85°C −65°C to +150°C 240°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rev. PrE | Page 4 of 9 Preliminary Technical Data ADL5534 14 NC 13 RFOUT1 15 NC 16 RFIN1 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR 12 CLIN1 TOP VIEW (Not to Scale) 10 NC 9 NC RFOUT2 8 CLIN2 7 11 NC NC 3 NC 4 NC 6 ADL5534 RFIN2 5 NC 1 NC 2 Figure 2. Table 3. Pin Function Descriptions Pin No. 1, 2, 3, 4, 6, 9, 10, 11, 14, 15 5, 16 8, 13 Mnemonic NC Description No connect. RFIN2, RFIN1 RFOUT2, RFOUT1 7, 12 CLIN2, CLIN1 RF Input: Requires a DC blocking capacitor. Use a 10 nF capacitor for normal operation. RF Output and Bias: DC bias is provided to this pin through an inductor. A 470 nH inductor is recommended for normal operation. RF path requires a DC blocking capacitor. Use a 10 nF capacitor for normal operation. A 1 nF capacitor connected between 7 and ground an Pin12 and ground provides decoupling for the on board linearizer. Internally connected to GND. Solder to a low impedance ground plane Exposed Paddle Rev. PrE | Page 5 of 9 ADL5534 Preliminary Technical Data TYPICAL PERFORMANCE CHARACTERISTICS 45 -5 40 -10 -15 35 Return Loss & Isolation (dB) Gain, NF, P1dB, OIP3 (dB, dBm) 0 30 25 20 Gain NF OIP3 P1dB 15 10 -20 -25 S11 S22 S12 -30 -35 -40 -45 5 -50 0 -55 0 50 100 150 200 250 300 350 400 450 500 0 100 200 300 Freq (MHz) 400 500 600 Freq (MHz) Figure 3 ADL5534 Gain, Noise Figure, OIP3 and P1dB vs Frequency Figure 5 ADL5534 Input / Output Return Loss and Reverse Isolation vs Frequency 48 46 -10 44 -20 42 40 -30 -40 36 Isolation (dB) OIP3 - dBm 38 34 20 MHz 70 MHz 190 MHz 380 MHz 500 Mhz 32 30 28 -50 -60 -70 26 RFIN2 to RF1OUT RFIN1 to RF2OUT -80 24 -90 22 -6 -4 -2 0 2 4 6 8 10 12 14 16 18 20 -100 Pout (dBm) 0 50 100 150 200 250 300 350 400 450 500 Freq (MHz) Figure 4 ADL5534 OIP3 vs Pout and Frequency Figure 6. ADL5534 Input to alternate Output Isolation Rev. PrE | Page 6 of 9 Preliminary Technical Data ADL5534 EVALUATION BOARD Applying 5 V toVpos1 will bias the amplifier corresponding to RFIN2 – RFOUT2 To bias both amplifiers from a single supply, connect 5V to Vpos or Vpos1 and attach a jumper across W3 Figure 7 shows the schematic for the ADL5534 evaluation board. The board is powered by a single 5 V supply. The components used on the board are listed in. Table 4 Transformers, T1 and T2 are provided so the ADL5534 maybe configured as a balanced amplifier. Applying 5V to Vpos will bias the amplifier corresponding to RFIN1 - RFOUT2. Vpos C7 10 nF 4 R3 open NC RFOUT1 NC CLIN1 12 NC ADL5534 NC NC C5 1 nF 11 C16 open 1 7 C14 Open C6 1 nF Vpos T2 ADT2-1T-1P 10 9 R6 Open R8 Open R4 Open C4 10nF L2 470 nH W3 R2 Open C13 Open 8 6 5 C3 10nF NC RFIN1 Z1 NC NC RFOUT2 3 CLIN2 C12 Open RFIN2 2 Open NC C15 C2 10nF 13 1 T1 R7 ADT2-1T-1P open NC 14 1 15 16 C11 Open R1 open R5 open RFIN2 L1 470 nH C1 10nF RFIN1 C9 W1 1 uF Gnd Vpos1 Vpos1 C8 10 nF C10 1 uF W2 Gnd Figure 7. Evaluation Board Schematic Table 4. Evaluation Board Configuration Options Component C1, C2, C3, C4 C5, C6 R1, R2, R3, R4, R5, R6, R7 R8 T1, T2 Function AC-coupling capacitors. Provides decoupling for the on board linearizer. Optional components used for Configuring ADL5534 as a balanced amplifier. Default Value 10 nF 0402 1 nF 0603 Open 0603 T1 and T2 are 50 Ω t o100 Ω impedance transformers used to configure the ADL5534 as a balanced amplifier. T1 and T2 are used to present a 100 Ω differential impedance to the ADL5534. Optional components used for Configuring ADL5534 as a balanced amplifier. MiniCircuits ADT2-1T-1P C11, C12, C13, C14, C15, C16 C9, C10 C7, C8 L1, L2 VCC & GND Power Supply decoupling capacitors capacitor. Power Supply decoupling capacitors capacitor. DC bias inductor. Clip-on terminals for power supply. W1,W2 W3 2-pin jumper for connection of ground and supply via cable. 2-pin jumper use to connect Vpos to Vpos1 Rev. PrE | Page 7 of 9 C11-C14: Open 0402 C15,C16: Open 0402 1 uF 0603 10 nF 0603 470 nH 1008CS VCC Red GND Black Open ADL5534 Preliminary Technical Data Figure 9. Evaluation Board Layout (Bottom) Figure 8. Evaluation Board Layout (Top) Rev. PrE | Page 8 of 9 Preliminary Technical Data ADL5534 OUTLINE DIMENSIONS a 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 5 x 5 mm Body, Very Thin Quad (CP-16-6) Dimensions shown in millimeters 5.00 BSC SQ PIN 1 INDICATOR 0.80 BSC TOP VIEW PIN 1 INDICATOR 13 12 16 1 EXPOSED PAD 4.75 BSC SQ 0.75 0.60 0.50 (BOTTOM VIEW) 3.25 3.10 SQ 2.95 4 9 8 5 0.25 MIN 2.40 BSC 0.80 MAX 0.65 TYP 12° MAX 0.05 MAX 0.02 NOM SEATING PLANE 0.35 0.30 0.25 0.20 REF COPLANARITY 0.08 COMPLIANT TO JEDEC STANDARDS MO-220-VHHB 010606-0 1.00 0.85 0.80 0.60 MAX 0.60 MAX Figure 10. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 5mm × 5 mm Body, Very Thin, Quad Lead CP-16-6 Dimensions shown in millimeters ORDERING GUIDE Model ADL5534ACPZ-R7 1 1 ADL5534-EVALZ 1 Temperature Range Package Description Package Option −40°C to +85°C 8-Lead LFCSP_VQ, Tape and Reel CP-16-6 Evaluation Board Z = RoHS Compliant part. ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR06836-0-2/08(PrE) Rev. PrE | Page 9 of 9 Branding Ordering Quantity