SLLS202E − MAY 1995 − REVISED JUNE 2005 D D D D D D D D D D OR NS† PACKAGE (TOP VIEW) Switching Rates up to 32 MHz Operates From Single 3.3-V Supply Ultra-Low Power Dissipation . . . 27 mW Typ Open-Circuit, Short-Circuit, and Terminated Fail-Safe −0.3-V to 5.5-V Common-Mode Range With ± 200-mV Sensitivity Accepts 5-V Logic Inputs With 3.3-V VCC Input Hysteresis . . . 50 mV Typ 235 mW With Four Receivers at 32 MHz Pin-to-Pin Compatible With AM26C32, AM26LS32, and MB570 1B 1A 1Y G 2Y 2A 2B GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 4B 4A 4Y G 3Y 3A 3B description/ordering information The AM26LV32, BiCMOS, quadruple, differential line receiver with 3-state outputs is designed to be similar to TIA/EIA-422-B and ITU Recommendation V.11 receivers with reduced common-mode voltage range due to reduced supply voltage. The device is optimized for balanced bus transmission at switching rates up to 32 MHz. The enable function is common to all four receivers and offers a choice of active-high or active-low inputs. The 3-state outputs permit connection directly to a bus-organized system. Each device features receiver high input impedance and input hysteresis for increased noise immunity, and input sensitivity of ± 200 mV over a common-mode input voltage range from −0.3 V to 5.5 V. When the inputs are open circuited, the outputs are in the high logic state. This device is designed using the Texas Instruments (TI) proprietary LinIMPACT-C60 technology, facilitating ultra-low power consumption without sacrificing speed. This device offers optimum performance when used with the AM26LV31 quadruple line drivers. The AM26LV32C is characterized for operation from 0°C to 70°C. The AM26LV32I is characterized for operation from −45°C to 85°C. ORDERING INFORMATION ORDERABLE PART NUMBER PACKAGE† TA TOP-SIDE MARKING AM26LV32CDG4 D Tape and reel AM26LV32CDR AM26LV32C AM26LV32CDRG4 0°C 0 C to 70 70°C C NS Tube AM26LV32CNS Tape and reel AM26LV32CNSR 26LV32 AM26LV32ID SOP – D −40°C to 85°C SOP – NS Tube AM26LV32IDR Tube AM26LV32INS Tape and reel AM26LV32INSR AM26LV32I 26LV32I † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinIMPACT-C60 and TI are trademarks of Texas Instruments. Copyright 2005, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SLLS202E − MAY 1995 − REVISED JUNE 2005 FUNCTION TABLE (each receiver) DIFFERENTIAL INPUT ENABLES OUTPUT G G VID ≥ 0.2 V H X X L H H −0.2 V < VID < 0.2 V H X X L ? ? VID ≤ − 0.2 V H X X L L L Open, shorted, or terminated† H X X L H H X L H Z H = high level, L = low level, X = irrelevant, Z = high impedance (off), ? = indeterminate † See application information attached. logic symbol‡ logic diagram (positive logic) G G G 1A 1B 2A 2B 3A 3B 4A 4B 4 12 2 ≥1 G EN 3 1 6 7 10 9 14 15 5 11 13 1A 2 1B 1 2A 6 2B 7 3A 10 3B 9 4A 14 4B 15 3 1Y 1Y 2Y 5 2Y 3Y 4Y ‡ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2 4 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 3Y 13 4Y SLLS202E − MAY 1995 − REVISED JUNE 2005 schematics of equivalent inputs and outputs EQUIVALENT OF EACH INPUT (A, B) TYPICAL OF ALL OUTPUTS (Y) EQUIVALENT OF EACH ENABLE INPUT (G, G) VCC VCC VCC 7.2 kΩ 1.5 kΩ Enable G, G A, B 15 kΩ 100 Ω Y 1.5 kΩ 7.2 kΩ GND GND GND absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Input voltage range, VI (A or B inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −4 V to 8 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12 V Enable input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Maximum output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to the GND terminal. 2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input. 3. The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions MIN NOM MAX Supply voltage, VCC 3 3.3 3.6 High-level input voltage, VIH(EN) 2 Low-level input voltage, VIL(EN) Common-mode input voltage, VIC −0.3 UNIT V V 0.8 V 5.5 V ± 5.8 Differential input voltage, VID High-level output current, IOH Low-level output current, IOL AM26LV32C Operating free-air temperature, TA AM26LV32I POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 −5 mA 5 mA 0 70 −40 85 °C 3 SLLS202E − MAY 1995 − REVISED JUNE 2005 electrical characteristics over recommended supply-voltage and operating free-air temperature ranges (unless otherwise noted) PARAMETER TEST CONDITIONS VIT+ VIT− Differential input high-threshold voltage VIK VOH Enable input clamp voltage VOL IOZ Low-level output voltage IIH(E) IIL(E) High-level enable input current rI Input resistance II ICC Input current High-impedance-state output current Low-level enable input current MAX −0.2 II = − 18 mA VID = 200 mV, VID = − 200 mV, VO = 0 to VCC VCC = 0 or 3 V, VCC = 3.6 V, IOH = − 5 mA IOL = 5 mA 2.4 VI = 5.5 V or − 0.3 V, VI(E) = VCC or GND, −1.5 3.2 0.17 VI = 5.5 V VI = 0 V 0.5 V µA 12 All other inputs GND 8 V ±50 10 Cpd Power dissipation capacitance‡ One channel † All typical values are at VCC = 3.3 V and TA = 25°C. ‡ Cpd determines the no-load dynamic current: IS = Cpd × VCC × f + ICC. V V −10 No load, line inputs open UNIT V −0.8 7 Supply current TYP† 0.2 Differential input low-threshold voltage High-level output voltage MIN µA A kΩ ±700 µA 17 mA 150 pF switching characteristics, VCC = 3.3 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX 8 16 20 8 16 20 UNIT tPLH tPHL Propagation delay time, low- to high-level output tt tPZH Transistion time (tr or tf) See Figure 1 5 Output-enable time to high level See Figure 2 17 40 ns tPZL tPHZ Output-enable time to low level See Figure 3 10 40 ns Output-disable time from high level See Figure 2 20 40 ns tPLZ tsk(p)§ tsk(o)¶ Output-disable time from low level See Figure 3 16 40 ns Pulse skew 4 6 ns Pulse skew 4 6 Propagation delay time, high- to low-level output See Figure 1 ns ns ns # tsk(pp) Pulse skew (device to device) 6 9 ns § tsk(p) is |tPLH − tPHL| of each channel of the same device. ¶ tsk(o) is the maximum difference in propagation delay times between any two channels of the same device switching in the same direction. # tsk(pp) is the maximum difference in propagation delay times between any two channels of any two devices switching in the same direction. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS202E − MAY 1995 − REVISED JUNE 2005 PARAMETER MEASUREMENT INFORMATION A Generator (see Note B) Y VO B 50 Ω CL = 15 pF (see Note A) 50 Ω A 2V B 1V Input tPLH Output VCC tPHL 90% 50% 10% G G (see Note C) 90% tr VOH 50% 10% V OL tf NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: ZO = 50 Ω, PRR = 10 MHz, tr and tf (10% to 90%) ≤ 2 ns, 50% duty cycle. C. To test the active-low enable G, ground G and apply an inverted waveform G. Figure 1. tPLH and tPHL Test Circuit and Voltage Waveforms VID = 1 V A Y VO B CL = 15 pF (see Note A) RL = 2 kΩ G Generator (see Note B) 50 Ω G VCC (see Note C) VCC Input 50% 50% 0V tPZH Output tPHZ 50% VOH VOH − 0.3 V Voff ≈ 0 NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: ZO = 50 Ω, PRR = 10 MHz, tr and tf (10% to 90%) ≤ 2 ns, 50% duty cycle. C. To test the active-low enable G, ground G and apply an inverted waveform G. Figure 2. tPZH and tPHZ Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SLLS202E − MAY 1995 − REVISED JUNE 2005 PARAMETER MEASUREMENT INFORMATION VCC RL = 2 kΩ A VID = 1 V Y VO B CL = 15 pF (see Note A) G Generator (see Note B) 50 Ω G VCC (see Note C) VCC Input 50% 50% 0V tPZL tPLZ Voff ≈ VCC Output 50% VOL + 0.3 V VOL NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: ZO = 50 Ω, PRR = 10 MHz, tr and tf (10% to 90%) ≤ 2 ns, 50% duty cycle. C. To test the active-low enable G, ground G and apply an inverted waveform G. Figure 3. tPZL and tPLZ Test Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS202E − MAY 1995 − REVISED JUNE 2005 APPLICATION INFORMATION fail-safe conditions The AM26LV32 quadruple differential line receiver is designed to function properly when appropriately connected to active drivers. Applications do not always have ideal situations where all bits are being used, the receiver inputs are never left floating, and fault conditions don’t exist. In actuality, most applications have the capability to either place the drivers in a high-impedance mode or power down the drivers altogether, and cables may be purposely (or inadvertently) disconnected, both of which lead to floating receiver inputs. Furthermore, even though measures are taken to avoid fault conditions like a short between the differential signals, this does occur. The AM26LV32 has an internal fail-safe circuitry which prevents the device from putting an unknown voltage signal at the receiver outputs. In the following three cases, a high-state is produced at the respective output: 1. Open fail-safe − Unused input pins are left open. Do not tie unused pins to ground or any other voltage. Internal circuitry places the output in the high state. 2. 100-ohm terminated fail-safe − Disconnected cables, drivers in high-impedance state, or powered-down drivers will not cause the AM26LV32 to malfunction. The outputs will remain in a high state under these conditions. When the drivers are either turned-off or placed into the high-impedance state, the receiver input may still be able to pick up noise due to the cable acting as an antenna. To avoid having a large differential voltage being generated, the use of twisted-pair cable will induce the noise as a common-mode signal and will be rejected. 3. Shorted fail-safe − Fault conditions that short the differential input pairs together will not cause incorrect data at the outputs. A differential voltage (VID) of 0 V will force a high state at the outputs. Shorted fail-safe, however, is not supported across the recommended common-mode input voltage (VIC) range. An unwanted state can be induced to all outputs when an input is shorted and is biased with a voltage between −0.3 V and 5.5 V. The shorted fail-safe circuitry will function properly when an input is shorted, but with no external common-mode voltage applied. fail-safe precautions The internal fail-safe circuitry was designed such that the input common-mode (VIC) and differential (VID)voltages must be observed. In order to ensure the outputs of unused or inactive receivers remain in a high state when the inputs are open-circuited, shorted, or terminated, extra precaution must be taken on the active signal. In applications where the drivers are placed in a high-impedance mode or are powered-down, it is recommended that for 1, 2, or 3 active receiver inputs, the low-level input voltage (VIL) should be greater than 0.4 V. As in all data transmission applications, it is necessary to provide a return ground path between the two remote grounds (driver and receiver ground references) to avoid ground differences. Table 1 and Figures 4 through 7 are examples of active input voltages with their respective waveforms and the effect each have on unused or inactive outputs. Note that the active receivers behave as expected, regardless of the input levels. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SLLS202E − MAY 1995 − REVISED JUNE 2005 APPLICATION INFORMATION Table 1. Active Receiver Inputs vs Outputs 1, 2, OR 3 ACTIVE INPUTS SEE FIGURE 1, 2, OR 3 ACTIVE OUTPUTS 3, 2, OR 1 UNUSED OR INACTIVE OUTPUTS VIL† 900 mV VID 200 mV VIC† 1V 4 Known state High state −100 mV 200 mV 0V 5 Known state ? 600 mV 800 mV 1V 6 Known state High state 0 800 mV 400 mV 7 Known state ? † Measured with respect to ground. VIC = 1V VIL = 900 mV Produces a High State at Unused or Inactive Outputs VID = 200 mV 0V Figure 4. Waveform One An Unknown State is Produced at Unused or Inactive Outputs VIC = 0V VIL = −100 mV VID = 200 mV Figure 5. Waveform Two VID = 800 mV VIL = 600 mV Produces a High State at Unused or Inactive Outputs VIC = 1V 0V Figure 6. Waveform Three An Unknown State is Produced at Unused or Inactive Outputs VID = 800 mV VIL = 0V 0V VIC = 400 mV Figure 7. Waveform Four 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS202E − MAY 1995 − REVISED JUNE 2005 APPLICATION INFORMATION In most applications, it is not customary to have a common-mode input close to ground and to have a differential voltage larger than 2 V. Since the common-mode input voltage is typically around 1.5 V, a 2-V VID would result in a VIL of 0.5 V, thus satisfying the recommended VIL level of greater than 0.4 V. Figure 8 plots seven different input threshold curves from a variety of production lots and shows how the fail-safe circuitry behaves with the input common-mode voltage levels. These input threshold curves are representative samples of production devices. The curves specifically illustrate a typical range of input threshold variation. The AM26LV32 is specified with ±200 mV of input sensitivity to account for the variance in input threshold. Each data point represents the input’s ability to produce a known state at the output for a given VIC and VID. Applying a differential voltage at or above a certain point on a curve would produce a known state at the output. Applying a differential voltage less than a certain point on a curve would activate the fail-safe circuit and the output would be in a high state. For example, inspecting the top input threshold curve reveals that for a VIC + 1.6 V, VID yields around 87 mV. Applying 90 mV of differential voltage to this particular production lot generates a known receiver output voltage. Applying a VID of 80 mV activates the input fail-safe circuitry and the receiver output is placed in the high state. Texas Instruments specifies the input threshold at ±200 mV, since normal process variations affect this parameter. Note that at common-mode input voltages around 0.2 V, the input differential voltages are low compared to their respective data points. This phenomenon points to the fact that the inputs are very sensitive to small differential voltages around 0.2 V VIC. It is recommended that VIC levels be kept greater than 0.5 V to avoid this increased sensitivity at VIC [ 0.2 V. In most applications, since VIC typically is 1.5 V, the fail-safe circuitry functions properly to provide a high state at the receiver output. Most Applications 100 90 VID − Differential Voltage − mV 80 70 60 50 Not Recommended 40 30 20 10 Increased Receiver Input Sensitivity 0 −1 −0.8 −0.6 −0.4 −0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 VIC − Common-Mode Input Voltage − V Figure 8. VIC Versus VID Receiver Sensitivity Levels POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SLLS202E − MAY 1995 − REVISED JUNE 2005 APPLICATION INFORMATION Figure 9 represents a typical application where two receivers are not used. In this case, there is no need to worry about the output voltages of the unused receivers since they are not connected in the system architecture. AM26LV32 Connector RT System RT Unused Circuit Figure 9. Typical Application with Unused Receivers Figure 10 shows a common application where one or more drivers are either disabled or powered down. To ensure the inactive receiver outputs are in a high state, the active receiver inputs must have VIL > 0.4 V and VIC > 0.5 V. Driver AM26LV32 Connector Connector RT Enable RT Cable System RT Disable or Power Off RT Figure 10. Typical Application Where Two or More Drivers are Disabled 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS202E − MAY 1995 − REVISED JUNE 2005 APPLICATION INFORMATION Figure 11 is an alternative application design to replace the application in Figure 10. This design uses two AM26LV32 devices, instead of one. However, this design does not require the input levels be monitored to ensure the outputs are in the correct state, only that they comply to the RS-232 standard. Driver AM26LV32 Connector Connector RT Enable RT Cable Unused Circuit Disable or Power Off System AM26LV32 RT RT Unused Circuit Figure 11. Alternative Solution for Figure 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 SLLS202E − MAY 1995 − REVISED JUNE 2005 APPLICATION INFORMATION Figures 12 and 13 show typical applications where a disconnected cable occurs. Figure 12 illustrates a typical application where a cable is disconnected. Similar to Figure 10, the active input levels must be monitored to make sure the inactive receiver outputs are in a high state. An alternative solution is shown in Figure 13. Driver Connector AM26LV32 Connector Cable RT RT System Unplugged Cable RT RT Figure 12. Typical Application Where Two or More Drivers are Disconnected 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS202E − MAY 1995 − REVISED JUNE 2005 APPLICATION INFORMATION Figure 13 is an alternative solution so the receiver inputs do not have to be monitored. This solution also requires the use of two AM26LV32 devices, instead of one. Driver AM26LV32 Connector Connector Cable RT RT Unused Circuit System AM26LV32 Unplugged Cable RT RT Unused Circuit Figure 13. Alternative Solution to Figure 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 SLLS202E − MAY 1995 − REVISED JUNE 2005 APPLICATION INFORMATION When designing a system using the AM26LV32, the device provides a robust solution where fail-safe and fault conditions are of concern. The RS-422-like inputs accept common-mode input levels from −0.3 V to 5.5 V with a specified sensitivity of ±200mV. As previously shown, care must be taken with active input levels since they can affect the outputs of unused or inactive bits. However, most applications meet or exceed the requirements to allow the device to perform properly. 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty AM26LV32CD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32CDE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32CDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32CDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32CDRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32CDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32CNSLE OBSOLETE SO NS 16 AM26LV32CNSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32CNSRE4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32CNSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32ID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32IDE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32IDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32IDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32IDRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32INS ACTIVE SO NS 16 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32INSE4 ACTIVE SO NS 16 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32INSG4 ACTIVE SO NS 16 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32INSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32INSRE4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM AM26LV32INSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TBD (1) Lead/Ball Finish Call TI MSL Peak Temp (3) Call TI The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 4-Oct-2007 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant AM26LV32CDR D 16 SITE 27 330 16 6.5 10.3 2.1 8 16 Q1 AM26LV32CDR D 16 SITE 41 330 16 6.5 10.3 2.1 8 16 Q1 AM26LV32CNSR NS 16 SITE 41 330 16 8.2 10.5 2.5 12 16 Q1 AM26LV32IDR D 16 SITE 27 330 16 6.5 10.3 2.1 8 16 Q1 AM26LV32INSR NS 16 SITE 41 330 16 8.2 10.5 2.5 12 16 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Oct-2007 Device Package Pins Site Length (mm) Width (mm) Height (mm) AM26LV32CDR D 16 SITE 27 342.9 336.6 28.58 AM26LV32CDR D 16 SITE 41 346.0 346.0 33.0 AM26LV32CNSR NS 16 SITE 41 346.0 346.0 33.0 AM26LV32IDR D 16 SITE 27 342.9 336.6 28.58 AM26LV32INSR NS 16 SITE 41 346.0 346.0 33.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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