DIODES AP7173

AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
General Description
Features
•
•
•
•
•
•
•
•
•
•
•
Low VIN and wide VIN range: 1.0V to 5.5V
Bias voltage (VVCC) range: 2.7V to 5.5V
Low VOUT range: 0.8V to 3.3V
Low dropout: 165mV typical at 1.5A, VVCC = 5V
2% accuracy over line, load and temperature range
Power-Good (PG) output for supply monitoring and for
sequencing of other supplies
Programmable soft-start provides linear voltage startup
Bias supply permits low VIN operation with good
transient response
Stable with any output capacitor ≥ 2.2µF
DFN3030-10 and SOP-8L-EP: available in “Green”
molding compound (No Br, Sb)
Lead-free finish/ RoHS Compliant (Note 1)
The AP7173 is a 1.5A low-dropout (LDO) linear regulator that
features a user-programmable soft-start, an enable input and a
power-good output.
The soft-start reduces inrush current of the load capacitors and
minimizes stress on the input power source during start-up. The
enable input and power-good output allow users to configure
power management solutions that can meet the sequencing
requirements of FPGAs, DSPs, and other applications with
different start-up and power-down requirements.
The AP7173 is stable with any type of output capacitor of 2.2µF or
more. A precision reference and feedback control deliver 2%
accuracy over load, line, and operating temperature ranges. The
AP7173 is available in both DFN3030-10 and SOP-8L-EP
packages.
Applications
•
•
•
•
•
PCs, Servers, Modems, and Set-Top-Boxes
FPGA Applications
DSP Core and I/O Voltages
Post-Regulation Applications
Applications With Sequencing Requirements
Ordering Information
AP 7173 - X X X
Package
Lead Free
Packing
FN : DFN3030-10
SP : SOP-8L-EP
G : Green
-7/13 : Tape & Reel
Device
AP7173-FN
AP7173-SP
Notes:
Package
Code
FN
SP
Packaging
(Note 2)
DFN3030-10
SOP-8L-EP
7”/13” Tape and Reel
Quantity
Part Number Suffix
3000/Tape & Reel
-7
2500/Tape & Reel
-13
1. RoHS revision 13.2.2003. Glass and high temperature solder exemptions applied, see EU Directive Annex Notes 5 and 7.
2. Pad layout as shown on Diodes Inc. suggested pad layout document can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
AP7173 Rev. 4
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Pin Assignments
( Top View )
( Top View )
IN
1
10
OUT
IN
2
9
OUT
PG
3
8
FB
VCC
4
7
SS
EN
5
6
GND
IN
1
8
OUT
PG
2
7
FB
VCC
3
6
SS
EN
4
5
GND
DFN3030-10
SOP-8L-EP
Pin Descriptions
PIN #
Pin
Name
SOP-8L-EP
DFN3030-10
Description
IN
1
1, 2
PG
2
3
VCC
3
4
EN
4
5
GND
5
6
SS
6
7
FB
7
8
Power Input pin.
Power-Good pin, open-drain output. When the VOUT is below the
PG threshold the PG pin is driven low; when the VOUT exceeds the
threshold, the PG pin goes into a high-impedance state. To use the
PG pin, use a 10kΩ to 1MΩ pull-up resistor to pull it up to a supply of
up to 5.5V, which can be higher than the input voltage.
Bias Input pin, provides input voltage for internal control circuitry.
This voltage should be higher than the VIN.
Enable pin. This pin should be driven either high or low and must not
be floating. Driving this pin high enables the regulator, while pulling it
low puts the regulator into shutdown mode.
Ground.
Soft-Start pin. Connect a capacitor between this pin and the ground
to set the soft-start ramp time of the output voltage. If no capacitor is
connected, the soft-start time is typically 100µS.
Feedback pin. Connect this pin to an external voltage divider to set
the output voltage.
OUT
8
9, 10
Thermal Pad
—
—
AP7173 Rev. 4
Regulated Output pin.
Solder this pad to large ground plane for increased thermal
performance.
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Block Diagram
IN
EN
OUT
Gate
Driver
Current Limit and
Thermal Shutdown
VCC
SS
+
0.8V
PG
FB
+
0.72V
GND
Typical Application Circuit
VOUT
R3
VIN
OUT
IN
VVCC
C1
PG
VCC
C3
EN
R1
C2
FB
AP7173
R2
SS
GND
CSS
Figure 1. Typical Application Circuit (Adjustable Output)
AP7173 Rev. 4
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Typical Application Circuit
(Continued)
Table 1. Resistor Values for Programming the Output Voltage (Note 3)
R1 (kΩ)
Short
0.619
1.13
1.37
1.87
2.49
4.12
3.57
3.57
3.57
R2 (kΩ)
Open
4.99
4.53
4.42
4.99
4.99
4.75
2.87
1.69
1.15
VOUT (V)
0.8
0.9
1
1.05
1.1
1.2
1.5
1.8
2.5
3.3
(Note: 3) VOUT = 0.8 x (1 + R1 / R2)
Table 2. Capacitor Values for Programming the Soft-Start Time (Note 4)
CSS
Open
270pF
560pF
2.7nF
5.6nF
0.01μF
SOFT-START TIME
0.1ms
0.5ms
1ms
5ms
10ms
18ms
–7
(Note: 4) tSS(s) = 0.8 x CSS(F) / (4.4 x 10 )
Figure 2. Turn-On Response
AP7173 Rev. 4
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Absolute Maximum Ratings
Symbol
ESD HBM
ESD MM
VIN, VVCC
VEN
VPG
VSS
VFB
VOUT
IOUT
TJ
TST
Notes:
(Note 5)
Parameter
Ratings
Human Body Model ESD Protection
Machine Model ESD Protection
Input Voltage Range
Enable Voltage Range
Power-Good Voltage Range
Soft-Start Voltage Range
Feedback Voltage Range
Output Voltage Range
Maximum Output Current
Junction Temperature Range
Storage Junction Temperature Range
Unit
4000
V
350
V
-0.3 to +6
V
-0.3 to +6
V
-0.3 to +6
V
-0.3 to +6
V
-0.3 to +6
V
-0.3 to VIN +0.3
V
Internally Limited
-40 to +150
ºC
-65 to +150
ºC
5. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods
may affect device reliability.
Recommended Operating Conditions
Symbol
VIN
VVCC
IOUT
TA
Notes
Parameter
Input Voltage (Note 6)
Bias Voltage
Output Current
Operating Ambient Temperature
Min
1.0
2.7
0
-40
Max
5.5
5.5
1.5
85
Unit
V
V
A
ºC
6. At VIN =1V, the maximum load currents may be lower than 1.5A.
AP7173 Rev. 4
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Electrical Characteristics
At VEN = 1.1V, VIN = VOUT + 0.5V, CVCC = 0.1uF, CIN = COUT = 10uF, IOUT = 50mA, VVCC = 5.0V, and TA = –40°C to +85°C, unless otherwise
noted. Typical values are at TA = +25°C.
Symbol
VIN
VVCC
VREF
VOUT
ΔVOUT /ΔVIN / VOUT
ΔVOUT /VOUT /ΔIOUT
VDO
ICL
ISHORT
IVCC
ISHDN
IFB
PSRR
TST
ISS
VEN, HI
VEN, LO
VEN, HYS
IEN
VPG, TH
VPG, HYS
VPG, LO
IPG, LKG
TSD
θJA
Notes:
Parameter
Test Conditions
Input Voltage Range
Bias Pin Voltage Range
(Note 7)
Internal Reference
TA = +25 ºC
(Adj.)
Output Voltage Range VIN= 5V, IOUT= 1.5A
2.97V≤VVCC≤5.5V,
Accuracy (Note 8)
50mA≤IOUT≤1.5A
Line Regulation
VOUT (NOM) + 0.5≤VIN, 5.5V
Load Regulation
50mA≤IOUT≤1.5A
IOUT = 1.5A,VVCC–VOUT(NOM)≥3.25V
Dropout Voltage
(Note 9)
IOUT= 1.5A, VIN = VVCC
Current Limit
VOUT = 80% x VOUT (NOM)
Short-Circuit Current
VOUT < 0.2V
Bias Pin Current
Shutdown Supply
VEN≤0.4V
Current (IGND)
Feedback Pin Current
1KHz, IOUT= 1A,
Power-Supply Rejection VIN= 1.8V, VOUT= 1.5V
(VIN to VOUT)
300KHz, IOUT =1A,
VIN= 1.8V, VOUT =1.5V
1KHz, IOUT = 1A,
Power-SupplyRejection VIN= 1.8V, VOUT =1.5V
(VVCC to VOUT)
300KHz, IOUT = 1A,
VIN= 1.8V, VOUT =1.5V
Startup Time
RLOAD for IOUT = 1.0A, CSS = open
Soft-Start Charging
VSS= 0.4V
Current
Enable Input High Level
Enable Input Low Level
Enable Pin Hysteresis
Enable Pin Current
VEN= 5V
PG Trip Threshold
VOUT decreasing
PG Trip Hysteresis
PG Output Low Voltage IPG= 1mA (sinking), VOUT<VPG, TH
PG Leakage Current
VPG= 5.25V, VOUT>VPG, TH
Shutdown, temperature increasing
Thermal Shutdown
Temperature
Reset, temperature decreasing
DFN3030-10 (Note 10)
Thermal Resistance
Junction-to-Ambient
SOP-8L-EP (Note 11)
Min
VOUT + VDO
Typ.
Max
5.5
Unit
V
5.5
V
0.808
V
3.3
V
2
%
0.03
0.09
165
1.5
3
1
1
270
1.7
4
2
%/V
%/A
mV
V
A
A
mA
1
50
µA
0.1
1
µA
2.7
0.792
0.8
0.8
–2
2
0.6
–1
±0.5
60
dB
30
50
dB
30
100
µS
440
nA
1.1
0
85
5.5
0.4
50
0.1
90
3
0.1
+150
+130
38
30
1
94
0.3
1
V
V
mV
µA
%VOUT
%VOUT
V
µA
ºC
o
C/W
7. VVCC should be higher or equal to VIN in this chip.
8. Tested at 0.8V; resistor tolerance is not taken into account.
9. Dropout is defined as the voltage from VIN to VOUT when VOUT is 3% below nominal.
10. Test condition for DFN3030-10: Device mounted on FR-4 substrate (2s2p), 2"*2" PCB, with 2oz copper trace thickness and large pad pattern.
11. Test condition for SOP-8L-EP: Device mounted on FR-4 substrate (2s2p), 2"*2" PCB, with 2oz copper trace thickness and large pad pattern.
AP7173 Rev. 4
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Typical Performance Characteristics
At TA = +25℃, VIN = VOUT(TYP) + 0.3V, VVCC = 5V, IOUT = 50mA, VEN = VIN, CIN = 1µF, CVCC = 4.7µF, and COUT = 10µF, unless otherwise noted.
VIN LINE REGULATION
VVCC LINE REGULATION
0.5
0.20
0.4
0.15
0.3
o
25 C
o
125 C
0.05
0.00
o
25 C
0.2
o
Vout(V)
change in Vout(%)
0.10
125 C
0.1
0.0
-0.1
-0.05
o
-40 C
-0.2
o
-40 C
-0.10
-0.3
-0.15
-0.4
-0.20
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
-0.5
0.5
5.0
1.0
1.5
2.0
2.5
3.0
Vin-Vout(V)
Vvcc-Vout(V)
Figure 3
Figure 4
LOAD REGULATION
3.5
4.0
LOAD REGULATION
1.0
o
25 C
0.8
0.6
o
Change Vout(%)
125 C
0.4
0.2
0.0
-0.2
-0.4
o
-0.6
-40 C
-0.8
-1.0
50
200
350
500
650
800
950
1100
1250
1400 1500
Iout(mA)
Figure 5
Figure 6
VIN DROPOUT VOLTAGE vs.
IOUT AND TEMPERATURE(TA)
VIN DROPOUT VOLTAGE vs.
(VVCC-VOUT) AND TEMPERATURE(TA)
300
240
280
220
260
180
VDropout(Vin-Vout)(mV)
VDropout(Vin-Vout)(V)
200
o
25 C
160
140
o
125 C
120
100
80
60
-40 C
200
o
25 C
180
160
o
-40 C
140
120
100
Iout=1.5A
80
40
20
20
0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
Iout(mA)
0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
Vvcc-Vout(V)
Figure 7
AP7173 Rev. 4
220
60
o
40
o
125 C
240
Figure 8
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Typical Performance Characteristics
(Continued)
At TA = +25℃, VIN = VOUT(TYP) + 0.3V, VVCC = 5V, IOUT = 50mA, VEN = VIN, CIN = 1µF, CVCC = 4.7µF, and COUT = 10µF, unless otherwise noted.
VIN DROPOUT VOLTAGE vs.
(VVCC-VOUT) AND TEMPERATURE(TA)
VVCC DROPOUT VOLTAGE vs.
IOUT AND TEMPERATURE(TA)
200
2000
180
VDropout(Vvcc-Vout)(mV)
VDropout(Vin-Vout)(mV)
1800
Iout=0.5A
160
140
120
o
25 C
o
125 C
100
80
60
1600
o
125 C
1400
o
-40 C
1200
o
25 C
1000
40
800
20
o
-40 C
0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
600
0.00
4.5
0.25
0.50
Figure 9
VIN PSRR vs. FREQUENCY
Power Supply Rejection Ratio(dB)
Power Supply Rejection Ratio(dB)
Io=0.1A
60
Io=1.5A
50
40
Vin=1.8V
Vout=1.2V
Vvcc=5V
Css=1nF
30
20
10
80
70
Io=0.1A
60
50
40
30
20
Vin=1.8V
Vout=1.2V
Vvcc=5V
Css=1nF
Io=1.5A
10
0
10
100
1000
10000
100000
0
10
500000
100
1000
10000
100000
Frequency(Hz)
Frequency(Hz)
Figure 11
Figure 12
VIN PSRR vs. (VIN-VOUT)
1000000
1E7
LOW-LEVEL PG VOLTAGE vs. CURRENT
0.8
90
Vout=1.2V
Iout=1.5A
Css=1nF
VoL Low-Level PG Voltage(V)
Power Supply Rejection Ratio(dB)
1.50
VVCC PSRR vs. FREQUENCY
70
1KHz
60
10KHz
50
100KHz
40
30
500KHz
20
0.7
0.6
0.5
0.4
0.3
0.2
0.1
10
0
0.00
1.25
90
80
70
1.00
Figure 10
90
80
0.75
Iout(A)
Vvcc-Vout
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
Vin-Vout(V)
0
2
4
6
8
10
12
PG Current(mA)
Figure 13
AP7173 Rev. 4
0.0
Figure 14
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Typical Performance Characteristics
(Continued)
At TA = +25℃, VIN = VOUT(TYP) + 0.3V, VVCC = 5V, IOUT = 50mA, VEN = VIN, CIN = 1µF, CVCC = 4.7µF, and COUT = 10µF, unless otherwise noted.
VIN LINE TRANSIENT
VVCC LINE TRANSIENT
Figure 15
Figure 16
OUTPUT LOAD TRANSIENT
TURN-ON RESPONSE
Figure 17
Figure 18
VCC PIN CURRENT vs.
IOUT AND TEMPERATURE (TA)
2.0
2.0
1.8
1.8
1.6
o
1.6
o
25 C
125 C
1.4
1.2
1.2
1.0
0.8
1.0
0.6
o
-40 C
o
-40 C
0.4
0.4
0.2
AP7173 Rev. 4
125 C
25 C
0.8
0.6
0.0
0.0
o
o
1.4
Ivcc(mA)
Ivcc(mA)
VCC PIN CURRENT vs.
VVCC AND TEMPERATURE (TA)
0.2
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.0
2.0
2.4
2.8
3.2
3.6
4.0
Iout(A)
Vvcc(V)
Figure 19
Figure 20
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4.8
5.2
5.6
MARCH 2008
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Typical Performance Characteristics
(Continued)
At TA = +25℃, VIN = VOUT(TYP) + 0.3V, VVCC = 5V, IOUT = 50mA, VEN = VIN, CIN = 1µF, CVCC = 4.7µF, and COUT = 10µF, unless otherwise noted.
QUIESCENT CURRENT vs. IOUT
p
QUIESCENT CURRENT vs. VVCC
g
1.25
1.50
Vout=1.2V
1.15
Quiescent Current(mA)
Quiescent Current(IGND) (mA)
1.20
1.10
Vin=2.5V
1.05
1.00
0.95
0.90
Vin=1.8V
Io=0A
1.25
Io=1.5A
1.00
Vin=1.8V
Vout=1.2V
0.75
0.85
Io=0.5A
0.80
0.75
0.00
0.25
0.50
0.75
1.00
1.25
0.50
2.50
1.50
2.75
3.00
3.25
Iout(A)
Vvcc(V)
Figure 21
Figure 22
QUIESCENT CURRENT vs. TEMPERATURE
3.50
CURRENT LIMIT vs. (VVCC – VOUT)
1.50
3.0
2.9
2.8
1.25
Current limit(A)
Quiescent Current(mA)
Vvcc=5V
1.00
Vvcc=3.3V
Vin=1.8V
Vout=1.2V
2.7
2.6
o
o
25 C
-40 C
2.5
2.4
2.3
o
0.75
125 C
2.2
2.1
0.50
-50
-25
0
25
50
75
100
125
o
2.0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Vvcc-Vout(V)
Temperature( C)
Figure 23
Figure 24
SOFT-START CHARGING
CURRENT (I SS) vs. TEMPERATURE
POWER-UP/POWER-DOWN
500
475
450
Iss(nA)
425
400
375
350
325
300
-50
-25
0
25
50
75
100
125
o
Temperature( C)
Figure 25
AP7173 Rev. 4
Figure 26
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Application Note
BIAS VOLTAGE VVCC
DROPOUT VOLTAGE
The AP7173 is a low VIN, low dropout regulator that uses an
NMOS pass FET. The VCC pin must be connected to a DC
bias supply VVCC for the internal control circuitry and the gate
drive of the pass FET to function properly and to obtain low
dropout. The VVCC needs to be equal to or higher than the VIN
and in the range of 2.7V-5.5V. Figure 27 illustrates the typical
application circuit for the AP7173.
The very low dropout makes the AP7173 well suited for
high-current, low VIN/low VOUT applications. To achieve the
specified low-dropout performance for such applications, the
VCC pin should be connected to a separate supply of at least
3.25V higher than VOUT. Figure 28 shows an application circuit
where VVCC is 5V and VOUT is 1.2V.
VVCC (5V)
VOUT
R3
VIN
+5V
PG
C1
VCC
EN
C3
VCC
OUT
IN
R1
IN
C2
IOUT (1.5A)
VOUT (1.2V)
+
FB
AP7173
VIN (1.5V)
_
R2
SS
Vref
OUT
R1
GND
CSS
C2
FB
AP7173
R2
Figure 27. Typical Application Circuit for AP7173
Figure 28. Typical Application Circuit for AP7173
Using Separate VCC and IN Rails
ADJUSTABLE OUTPUT VOLTAGE
With an external voltage divider, the AP7173 can provide
output voltage from 0.8V to 3.3V. R1 and R2 can be calculated
for any output voltage using the following equation, where
VREF=0.8 is the AP7173’s internal reference voltage. Refer to
Table 1 for resistor combinations for commonly used output
voltages. For maximum voltage accuracy, R2 should be ≤ 5kΩ.
For applications where low dropout is not required or a separate
VVCC supply is not available, the IN and VCC pins can be tied
together. In this situation, a voltage difference of at least 1.7V
between the VVCC and VOUT has to be maintained for the VVCC to
provide enough gate drive to the pass FET. Therefore, the VOUT
needs to be 1.7V or more below VIN, as shown in Figure 29.
VOUT = VREF x (1 + R1/R2)
VIN (3.0V)
INPUT VIN AND BIAS VVCC CAPACITORS
VCC
It is important to keep the IN and VCC pins clear of large
ripples, glitches and other noises by connecting capacitors to
the IN and VCC pins. The required capacitance on these pins
is strongly dependent on source and wiring impedance of the
supplies.
IOUT (1.5A)
OUTPUT CAPACITOR
The output capacitor affects the stability and transient response
of the LDO. The AP7173 is designed to be stable for all types
of output capacitors ≥ 2.2μF, single or multiple in parallel. Using
high-quality, low ESR capacitors and placing them close to the
OUT and GND pins can improve perfomance.
AP7173 Rev. 4
VOUT (1.2V)
+
_
Vref
OUT
R1
To provide good decoupling for the input power supply VIN, it is
recommended that a ceramic capacitor with capacitance of at
least 1μF is connected between the IN and GND pins at a
location as close to them as possible. High quality, low ESR
capacitors should be used for better performance.
It is critical to provide good decoupling to the VCC pin for the
AP7173’s internal control circuitry to function properly. The
minimum recommended capacitance for the VVCC is 1μF when
the VVCC and VIN are separate supplies. If the VIN and VVCC are
connected to the same supply, the recommended minimum
capacitance for VVCC is 4.7μF. Again good quality, low ESR
capacitors should be used for optimum performance.
IN
AP7173
C2
FB
R2
Figure 29. Typical Application Circuit for AP7173
Without an Auxiliary VCC Rail
PROGRAMMABLE SOFT-START
The AP7173 features a voltage-controlled soft-start that is
programmable with an external capacitor (CSS). The AP7173
achieves a monotonic soft-start by tracking the voltage ramp of
the external soft-start capacitor until the ramp voltage reaches
the internal reference voltage. The relationship between the
soft-start time and the soft-start charging current (ISS), soft-start
capacitance (CSS), and the internal reference voltage (VREF) is
tSS = (VREF x CSS) / ISS
Refer to Table 2 for suggested soft-start capacitor values.
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Application Note
(Continued)
ENABLE/SHUTDOWN
The EN pin can be used with standard digital signals or
relatively slow-ramping analog signals. Pulling the VEN below
0.4V turns the regulator off, while driving the VEN above 1.1V
turns the regulator on. Figure 30 shows an example where an
RC circuit is used to delay start the AP7173.
If not used, the EN pin can be connected to the VCC or IN pin
when the VIN is greater than 1.1V, as long as good decoupling
measures are taken for the EN pin.
VOUT
R3
VIN
OUT
IN
VVCC
VCC
R4
C3
C5
EN
R1
C2
FB
PG
C1
AP7173
R2
SS
GND
For more effective protection against short-circuit failure, the
AP7173 also includes a short-circuit foldback mechanism that
lowers the current limit to a typical value of 1.0A when the VFB
drops to below 0.2V.
THERMAL PROTECTION
Thermal shutdown limits the AP7173 junction temperature and
protects the device from damage as a result of overheating.
Thermal protection turns off the VOUT when the AP7173’s
junction temperature rises to approximately +150°C, allowing it
to cool down. When the junction temperature drops to
approximately +130°C, the output is re-enabled. Therefore, the
thermal protection circuit may cycle on and off at a rate
dependent on the power dissipation, thermal resistance, and
ambient temperature.
POWER DISSIPATION
CSS
Figure 30. Delayed Start Using an RC Circuit
to Enable AP7173
Thermal shutdown is intented to protect the AP7173 against
abnormal overheating. For normal operation, excessive power
dissipation should be avoided and good heatsinking should be
provided. Power dissipation in the device is the product of the
device dropout voltage and the load current,
PD = (VIN - VOUT) x IOUT
POWER-GOOD
The power-good (PG) pin is an open-drain output and can be
pulled up through a resistor of 10kΩ to1MΩ to VIN, VOUT or any
other rail that is 5.5V or lower. When the VOUT ≥ VPG,TH+VPG,HYS,
the PG output is high-impedance; if the VOUT drops to below
VPG,TH, VVCC ≤ 1.9V or the device is disabled, the PG pin is
pulled to low by an internal MOSFET.
As can be seen, power dissipation can be minimized by using
the lowest input voltage necessary to achieve the required
output voltage regulation.
To ensure that the device junction temperature does not
exceed the specified limit of 125°C, an application should
provide heat conduction paths that have junction-to-ambient
thermal resistance lower than the calculated value here:
OVER-CURRENT AND SHORT-CIRCUIT PROTECTION
The AP7173 features a factory-trimmed, temperature and
supply voltage compensated internal current limit and an
over-current protection circuitry to protect the device against
overload conditions. It limits the device current to a typical
value of 3A and reduces the VOUT when the load tries to pull
more current.
AP7173 Rev. 4
RθJA = (125°C –TA ) / PD
For the DFN package with exposed pad, the primary
conduction path for heat is through the exposed pad to the
printed circuit board (PCB). The pad should be attached to an
appropriate amount of copper PCB area to ensure that the
device does not overheat.
12 of 15
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Marking Information
(1) DFN3030-10
( Top View )
XX
YMX
Part Number
AP7173
XX : BA : AP7173
Y : Year 0~9
M : Month A~L
X : A~Z : Green
Package
DFN3030-10
Identification Code
BA
(2) SOP-8L-EP
( Top View )
8
5
Logo
Part No .
AP 7173
YY WW X X E
1
4
~
Internal code
G : Green
E : SOP-8L-EP
Xth week : 01~ 52
Year : "07" = 2007
"08" = 2008
AP7173 Rev. 4
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© Diodes Incorporated
AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Package Information
(All Dimensions in mm)
(1) DFN3030-10
0.15Typ.
Seating Plane
Side View
2X-
0.25 A
0.08 C
0/0.05
0.10 C
0.57/0.60
TOP MARK
C
2.9/3.1
2.3/2.5
B
A
R0
.30
0
0.25/0.55
1.5/1.7
2.9/3.1
(Pin #1 ID)
2X-
0.25 B
0.50Typ.
0.375Typ.
0.2/0.3
0.10
C A B
Bottom View
(2) SOP-8L-EP
Detail "A"
Exposed pad
2.4Ref.
3.70/4.10
45°
0.35max.
5.79/6.20
3.70/4.10
7°~9°
7°~9° 1
1
0.20typ
1.75max.
1.30/1.50
3.3Ref.
Bottom View
0.08/0.25
0.254
0.3/0.5
1.27typ
4.80/5.30
1
Gauge Plane
Seating Plane
0.38/1.27
Detail "A"
8x-0.60
5.4
Exposed pad
8x-1.55
6x-1.27
Land Pattem Recommendation
AP7173 Rev. 4
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© Diodes Incorporated
AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Taping Orientation
Notes:
12. The taping orientation of the other package type can be found on our website at http://www.diodes.com/datasheets/ap02007.pdf
IMPORTANT NOTICE
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further
notice to any product herein. Diodes Incorporated does not assume any liability arising out of the application or use of any product described herein; neither
does it convey any license under its patent rights, nor the rights of others. The user of products in such applications shall assume all risks of such use and will
agree to hold Diodes Incorporated and all the companies whose products are represented on our website, harmless against all damages.
LIFE SUPPORT
Diodes Incorporated products are not authorized for use as critical components in life support devices or systems without the expressed written approval of the
President of Diodes Incorporated.
AP7173 Rev. 4
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