ANPEC APL3546A

APL3546A
Power -Distribution Switches with Soft Start
Features
General Description
•
•
The APL3546A is a power-distribution switch with some
protection functions. The device incorporates a 78mΩ N-
78mΩ High Side MOSFET
Soft Start Time Programmable by External
channel MOSFET power switch that is controlled by an
enable logic pin and has a SS pin dedicated to soft start
Capacitor
•
•
•
•
•
•
Wide Supply Voltage Range: 4.5V to 24V
ramp-up rate control that can be used in application where
the inrush current is concerned.
Current Limit Protections
Under Voltage Lockout Protection
Over-temperature Protection
The device integrates some protection features, including current limit protection, over-temperature protection,
Logic Level Enable Input
Lead Free and Green Devices Available (RoHS
UVLO and current limit setting. The current limit protection can protect down-stream devices from catastrophic
Compliant)
•
Current Limit setting
failure by limiting the output current at current limit threshold during over-load or short circuit events. The over-temperature protection function shuts down IC when the junction temperature rises beyond 150oC. The UVLO function
Applications
•
•
•
•
keeps the power switch in off state until there is a valid
input voltage present. The current limit can be set by con-
TFT LCD Modules
necting resistor from the current limit adjustable pin ISET
to ground.
Notebook and Desktop Computers
USB Ports
High-side Power Protection Switches
Simplified Application Circuit
APL 3546A
VIN
VOUT
SS
ISET
EN
GND
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
1
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APL3546A
Pin Configuration
APL3546A
VIN
SS
GND
NC
1
2
3
4
9
GND
APL3546A
8
7
6
5
VOUT
ISET
EN
NC
VOUT
VIN
1
6
SS
2
5
ISET
GND
3
4
EN
TDFN2x2-6
(Top View)
SOP-8P Top
Ordering and Marking Information
APL3546A
Package Code
KA : SOP-8P QB : TDFN2x2-6
Operating Ambient Temperature Range
I : -40 to 80oC
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
Assembly Material
Handling Code
Temperature Range
Package Code
APL3546A KA:
.
APL3546A
XXXXX
APL3546A QB:
XXXXX - Date Code
.
46A
X
X - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings (Note 1)
Symbol
Rating
Unit
VIN to GND Voltage
-0.3 ~ 26
V
VOUT
VOUT to GND Voltage
-0.3 ~ 26
V
VEN
EN to GND Voltage
-0.3 ~ 7
V
VISET
ISET to GND Voltage
-0.3 ~ 7
V
VSS
SS to GND Voltage
-0.3 ~ 7
V
IOUT
IOUT output current
Setting by RISET
VIN
TJ
TSTG
TSDR
Parameter
Maximum Junction Temperature
Storage Temperature
Maximum Lead Soldering Temperature (10 Seconds)
A
-40 ~ 150
o
-65 ~ 150
o
260
o
C
C
C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
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APL3546A
Thermal Characteristics (Note 2)
Symbol
θJA
Parameter
Typical Value
Unit
Junction-to-Ambient Resistance in Free Air
SOP-8P
TDFN2x2-6
o
75
130
C/W
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions (Note 3)
Symbol
VIN
Parameter
VIN Input Voltage
CSS
SS Pin Soft-Start Capacitor
TA
Ambient Temperature
TJ
IOUT continuous current.
IOUT
IOUT output current
Unit
4.5 ~ 24
V
VIN Input Voltage=4.5V ~ 7V
3.3n ~ 10n
VIN Input Voltage=7V ~ 24V
1n ~ 10n
Junction Temperature
IOUT
Range
F
-40 ~ 85
o
-40 ~ 125
o
C
C
2.5
A
See Output Current vs. VIN
Input Voltage curve
A
Note 3: Refer to the typical application circuit
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN=12V, VEN =5V. Typical values are at TA=25oC.
Symbol
Parameter
APL3546A
Test Conditions
Unit
Min.
Typ.
Max.
No load, VEN=0V
-
30
50
µA
No load, VEN=5V
-
250
400
µA
VOUT=GND , VEN=0V
-
-
1
µA
IOUT=2A, TA= 25 oC ,VIN=12V
-
78
90
mΩ
IOUT=2A, VIN=12V
-
78
100
mΩ
3.3
-
3.9
V
-
0.2
-
V
SUPPLY CURRENT
VIN Supply Current
Leakage Current
POWER SWITCH
RDS(ON)
Power Switch On Resistance
UNDER-VOLTAGE LOCKOUT
VIN UVLO Threshold Voltage
VIN UVLO Hysteresis
CURRENT LIMIT AND SHORT CIRCUIT PROTECTIONS
VISET
ILIM
Current Limit Voltage
Current Limit Threshold
VIN=4.5V to 24V
-
0.6
-
V
RISET=82kΩ
-
6.2
-
A
VIN=12V,
1
2
3
µA
VIN=12V, No load, COUT=1uF, CSS =1nF
-
0.5
-
ms
VIN=12V, No load, COUT=1uF, CSS =open
1
2
3
ms
VEN=0V
-
300
-
Ω
SOFT-START CONTROL PIN
ISS
tSS
SS Current
Soft-Start Time
Soft-Star Discharge Resistance
Copyright  ANPEC Electronics Corp.
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APL3546A
Electrical Characteristics(Cont.)
Unless otherwise specified, these specifications apply over VIN=12V, VEN =5V. Typical values are at TA=25oC.
Symbol
Parameter
APL3546A
Test Conditions
Unit
Min.
Typ.
Max.
2
-
-
V
0.6
V
µA
EN INPUT PIN
VIH
VIL
Input Logic High
VIN=4.5V to 24V
Input Logic Low
VIN=4.5V to 24V
Input Current
-
-
-
-
1
-
950
-
Ω
tD(ON)
Turn on Delay Time
-
300
-
µs
tD(OFF)
Turn off Delay Time
-
3
-
µs
-
150
-
°C
VOUT Discharge Resistance
VEN=0V
OVERT-TEMPERATURE PROTECTION (OTP)
TOTP
Over-Temperature Threshold
TJ rising
Pin Description
FUNCTION
NO.
NAME
SOP-8P
TDFN2x2-6
1
1
VIN
Power Supply Input. Connect this pin to external DC supply.
2
2
SS
Soft Start Control Pin. Connect a capacitor to GND to control the soft start rate. If the SS pin
is left floating the soft start time is 2ms when VIN=12V.
3,9
3
GND
4
-
NC
5
-
NC
No connection.
Enable Input. Pull this pin to high to enable the device and pull this pin to low to disable
device. The EN pin cannot be left floating.
GND.
No connection.
6
4
EN
7
5
ISET
Connect a resistor to GND to adjust OCP level.
8
6
VOUT
Output Voltage Pin. The output voltage follows the input voltage. When EN is low the output
voltage is discharged by an internal resistor.
Copyright  ANPEC Electronics Corp.
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APL3546A
Typical Operating Characteristics
6.24
450
6.22
400
6.20
VIN Supply Current(uA)
Current Limit Threshold(A)
Current Limit Threshold
vs. VIN Input Voltage
6.18
6.16
6.14
6.12
6.10
6.08
350
VEN=5V
300
250
200
150
100
VEN=0V
50
6.06
6.04
0
5
10
15
20
5
25
10
15
25
VIN Input Voltage(V)
EN Input Voltage vs.
VIN Input Voltage
ISET resistor vs.
Current Limit Threshold
12
Input Logic High
V IN =12V, TA =25°C
Current Limit Threshold(A)
1.50
1.45
1.40
1.35
Input Logic Low
1.30
1.25
10
1.20
5
10
15
20
8
6
4
2
0
25
0
100
200
VIN Input Voltage(V)
300
400
500
600
ISET Resistor(kΩ)
Power Switch On Resistance
vs. VIN Input Voltage
91.0
7
90 .5
6
Output Current vs.
VIN Input Voltage
Current Limit
Output Current(A)
Power Switch On Resistance(mΩ)
20
VIN Input Voltage(V)
1.55
EN Input Voltage(V)
VIN Supply Current
vs. VIN Input Voltage
90.0
89.5
89.0
88.5
CSS=1nF
5
CSS=10nF
4
3
2
VEN = 5V
RISET = 82k
TA = 25°C
1
88.0
0
5
10
15
20
0
25
VIN Input Voltage(V)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
5
10
15
20
25
VIN Input Voltage(V)
5
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APL3546A
Operating Waveforms
Power Off
Power On
VIN
VOUT
VIN
1
1
VOUT
3
IIN
2
2
IIN
3
VIN=12V, CIN=1uF, COUT=10uF, ROUT=30Ω
VIN=12V, CIN=1uF, COUT=10uF, ROUT=30Ω
CH1: VIN (5V/Div)
CH2: VOUT (5V/Div)
CH3: IIN (0.5A/Div)
Time: 4ms/Div
CH1: VIN (5V/Div)
CH2: VOUT (5V/Div)
CH3: IIN (0.5A/Div)
Time: 400ms/Div
Turn Off Response
Turn On Response
EN
1
2
3
VOUT
EN
1
VOUT
2
IIN
3
VIN=12V, CIN=1uF, COUT=10uF, ROUT=30Ω
CH1: EN (2V/Div)
CH2: VOUT (5V/Div)
CH3: IIN (0.5A/Div)
Time: 400us/Div
VIN=12V, CIN=1uF, COUT=10uF, ROUT=30Ω
CH1: EN (2V/Div)
CH2: VOUT (5V/Div)
CH3: IIN (0.5A/Div)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
IIN
6
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APL3546A
Operating Waveforms
Soft Start Ramp Up Control
Short Circuit Response
EN
VIN
Css=open
Css=1nF
VOUT
Css=1.5nF
1
1
2
2
IOUT
Css=5.6nF
3
VIN=12V, CIN=1uF, COUT =10uF, ROUT =30Ω
CH1: EN (2V/Div)
CH2: VOUT (5V/Div)
Time: 400us/Div
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
VIN=12V, CIN=1uF, COUT=10uF, RISET=82kΩ
CH1: VIN (5V/Div)
CH2: VOUT (5V/Div)
CH3: IOUT (5A/Div)
Time: 10us/Div
7
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APL3546A
Block Diagram
ISET
VOUT
VIN
UVLO
Charge
Pump
Current
Limit
Gate Driver and Control
Logic
EN
Soft Start
SS
GND
OTP
Typical Application Circuit
APL3546A
VIN
VIN
VOUT
VOUT
1uF
10uF
VIN
1nF
SS
ISET
RISET
(OPTION)
EN
Controller
(OPTION)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
GND
(OPTION)
8
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APL3546A
Function Description
Under-voltage Lockout (UVLO)
Enable/Disable
The APL3546A power switch is built-in an under-voltage
Pull the EN below 0.6V to disable the device and pull EN
above 2V to enable the device. When the IC is disabled
lockout circuit to keep the output shut off until internal
circuitry is operating properly. The UVLO circuit has hys-
the supply current is reduced to less than 35µA. The enable input is compatible with both TTL and CMOS logic
teresis and a de-glitch feature so that it will typically ignore undershoot transients on the input. When input volt-
levels. The EN pin cannot be left floating.
age exceeds the UVLO threshold, the output voltage starts
a soft-start to reduce the inrush current.
Over-temperature Protection
When the junction temperature exceeds 150oC, the internal thermal sense circuit turns off the power FET and
Power Switch
The power switch is an N-channel MOSFET with a low
allows the device to cool down. When over temperature
protection occur, IC latch off. Thermal protection is de-
RDS(ON). The internal power MOSFET does not have
the body diode. When IC is off, the MOSFET prevents a
signed to protect the IC in the event of over temperature
conditions. For normal operation, the junction tempera-
current flowing from the VOUT back to VIN and VIN to
VOUT.
ture cannot exceed TJ=+125oC.
Current Limit Protection
The APL3546A power switch provides the current limit
protection function. When current limit occur, IC latch off.
For reliable operation, the device should not be operated
in current limit for extended period time.
Soft-Start
The APL3546A provides an adjustable soft-start circuitry
to control rise rate of the output voltage and limit the current surge during start-up. The soft-start ramp-up rate is
controlled by a capacitor from SS pin to ground. the soft
start time can be calculated by this following equation:
tss= 0.1( CSSx VIN )/ ISS
where,
tSS is soft start time of VOUT rising from 0 to 100%, of
which unit is second.
CSS is the value of the capacitor connected from SS pin to
GND, of which unit is micro-Farad.
VIN is the amplitude of input voltage applied to this device,
of which unit is volt.
ISS is the SS pin charge current, typical value is 2µA.
If the CSS is not connected or tied to VIN, the soft start time
is 2ms when VIN=12V.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
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APL3546A
Application Information
Power Sequencing
Layout Consideration
The PCB layout should be carefully performed to maxi-
VIN
mize thermal dissipation and to minimize voltage drop,
droop and EMI. The following guidelines must be
EN
threshold
considered:
1. Please place the input capacitors near the VIN pin as
EN
At start-up, it is necessary to ensure that the VIN and EN are
sequenced correctly.
Input Capacitor
A 1µF ceramic bypass capacitor from VIN to GND, located
near the APL3546A, is strongly recommended to suppress
the ringing during short-circuit fault event. Without the bypass capacitor, the output short may cause sufficient ringing on the input (from supply lead inductance) to damage
internal control circuitry.
close as possible.
2. Output decoupling capacitors for load must be placed
near the load as close as possible for decoupling high
frequency ripples.
3. Locate APL3546A and output capacitors near the load
to reduce parasitic resistance and inductance for excellent load transient performance.
4. The negative pins of the input and output capacitors
and the GND pin must be connected to the ground plane
of the load.
5. Keep VIN and VOUT traces as wide and short as possible.
Output Capacitor
Current Limit Setting
A low-ESR 10µF MLCC, aluminum electrolytic or tanta-
The current limit can be set by connecting resistor from
the current limit adjustable pin ISET to ground. The re-
lum between VOUT and GND is strongly recommended
to reduce the voltage droop during hot-attachment of
downstream peripheral. Higher-value output capacitor is
better when the output load is heavy. Additionally, bypassing the output with a 0.1µF ceramic capacitor improves
the immunity of the device to short-circuit transients.
quired value of resistor RISET for current limit is calcuated
as follows:
RISET = 510000 / ILIM
Soft-Start Capacitor
The APL3546A has a built-in adjustable soft-start control
for user to set an optimum soft-start time for the
application. The soft-start time can be calculated by the
equation, described in the paragraph of Soft-Start in Functional Description section. The soft-start time will become
internally controlled as if there is no CSS, tSS=2ms when
VIN=12V. Please note that there minimum value of soft
start capacitor in different VIN input voltage. Please make
sure the CSS is in the recommended value.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
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APL3546A
Package Information
SOP-8P
D
SEE VIEW A
h X 45o
E
THERMAL
PAD
E1
E2
D1
c
A1
0.25
A2
A
b
e
GAUGE PLANE
SEATING PLANE
θ
L
VIEW A
S
Y
M
B
O
L
SOP-8P
MILLIMETERS
MIN.
INCHES
MAX.
A
MIN.
MAX.
1.60
0.063
0.000
0.15
0.006
A1
0.00
A2
1.25
b
0.31
0.51
0.012
0.020
c
0.17
0.25
0.007
0.010
D
4.80
5.00
0.189
0.197
0.049
D1
2.50
3.50
0.098
0.138
E
5.80
6.20
0.228
0.244
E1
3.80
4.00
0.150
0.157
E2
2.00
3.00
0.079
0.118
e
1.27 BSC
0.050 BSC
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
0o C
8oC
0
0oC
8o C
Note : 1. Followed from JEDEC MS-012 BA.
2. Dimension "D" does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side .
3. Dimension "E" does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
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APL3546A
Package Information
TDFN2x2-6
A
b
E
D
D2
A1
A3
L
K
E2
Pin 1 Corner
e
TDFN2x2-6
S
Y
M
B
O
L
MIN.
MAX.
A
0.70
A1
0.00
MILLIMETERS
A3
INCHES
MIN.
MAX.
0.80
0.028
0.031
0.05
0.000
0.002
0.20 REF
0.008 REF
0.30
0.007
0.012
1.90
2.10
0.075
0.083
D2
1.00
1.60
0.039
0.063
E
1.90
2.10
0.075
0.083
E2
0.60
1.00
0.024
0.039
b
D
0.18
e
0.65 BSC
L
0.30
K
0.20
0.026 BSC
0.012
0.45
0.018
0.008
Note : 1. Followed from JEDEC MO-229 WCCC.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
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APL3546A
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
A
H
330.0±2.00
50 MIN.
P0
P1
T1
12.4+2.00
-0.00
P2
4.0±0.10
8.0±0.10
2.0±0.05
A
H
T1
C
13.0+0.50
-0.20
D0
1.5+0.10
-0.00
C
178.0±2.00
50 MIN.
8.4+2.00
-0.00
P0
P1
SOP-8P
Application
TDFN2x2-6
4.0±0.10
4.0±0.10
d
D
1.5 MIN.
20.2 MIN.
D1
A0
B0
K0
6.55±0.20
5.25±0.20
2.10±0.20
d
T
0.6+0.00
-0.40
D
W
E1
F
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.20
1.75±0.10
3.5±0.05
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
2.35±0.20
2.35±0.20
1.00±0.20
1.5 MIN.
W
E1
12.0±0.30 1.75±0.10
F
5.5±0.05
(mm)
Devices Per Unit
Package Type
Unit
Quantity
SOP-8P
Tape & Reel
2500
TDFN2x2-6
Tape & Reel
3000
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
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APL3546A
Taping Direction Information
SOP-8P
USER DIRECTION OF FEED
TDFN2x2-6
USER DIRECTION OF FEED
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
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APL3546A
Classification Profile
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
15
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APL3546A
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
16
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
www.anpec.com.tw
APL3546A
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2013
17
www.anpec.com.tw