APL3534

APL3534/A/B
Compact, Small Package 1A Power-Distribution Switches
Features
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General Description
High Side N-MOSFET with Internal Charge Pump
1A Continuous Current
The APL3534/A/B is a power-distribution switch with current- limiting function and output OVP protections that can
Built-in Soft-Start
Wide Supply Voltage Range
deliver current up to 1A. The device incorporates a 110mΩ
N-channel MOSFET power switch.
Current-Limit and Short-Circuit Protections
Input Voltage Under Voltage Lockout Protection
The device integrates some protection features, including current-limit protection, output over-voltage protection,
Reverse Current Blocking when Switch Disabled
Output OVP Protection
over-temperature protection and UVLO. The current-limit
protection can protect down-stream devices from cata-
Reverse Current-Limit Protection
Output Discharge
strophic failure by limiting the output current at currentlimit threshold during over-load or short-circuit events.
Over-Temperature Protection
UL Approved-File No. E328191
The output over-voltage protection can prevent current
flowing from VOUT to VIN when an abnormally high volt-
Nemko IEC/EN 60950-1 CB Scheme Certified,
No.79342
age exists in VOUT. The over-temperature protection function shuts down the N-channel MOSFET power switch
TUV IEC/EN 60950-1 Certified, No.44 780 14 406748004
when the junction temperature rises beyond 140 C and
will automatically turns on the power switch when the
Lead Free and Green Devices Available (RoHS
Compliant)
temperature drops by 20 C. The UVLO function keeps
the power switch in off state until there is a valid input
o
o
voltage present.
The device is available in lead free SOT-23-3 and
Applications
•
•
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SOT-23-5 packages.
HDMI Port Protection Switches
Bluetooth Protection Switches
Pin Configuration
High-side Power Protection Switches
Simplified Application Circuit
VIN
GND 1
3 VIN
VOUT
VOUT 2
APL3534
SOT-23-3
APL3534
GND 1
EN 2
VOUT 3
GND
VIN
5 NC
4 VIN
APL3534A
SOT-23-5
VOUT
APL3534A/B
5 NC
GND 1
ENB 2
VOUT 3
EN/ENB
GND
4 VIN
APL3534B
SOT-23-5
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
1
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APL3534/A/B
Ordering and Marking Information
Enable Function
Blank : No Enable Function A : Active High
B : Active Low
Package Code
A : SOT-23-3 B : SOT-23-5
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
APL3534
Assembly Material
Handling Code
Temperature Range
Package Code
Enable Function
APL3534 A:
L34X
X - Date Code
APL3534A B:
L4AX
X - Date Code
APL3534B B:
L4BX
X - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
Symbol
VIN
VOUT
VEN, VENB
TJ
(Note 1)
Parameter
Rating
Unit
VIN to GND Voltage
-0.3 ~ 6.5
V
VOUT to GND Voltage
-0.3 ~ 6.5
V
EN, ENB to GND Voltage
-0.3 ~ 6.5
Maximum Junction Temperature
TSTG
Storage Temperature
TSDR
Maximum Lead Soldering Temperature (10 Seconds)
V
-40 ~ 150
o
-65 ~ 150
o
260
o
C
C
C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Thermal Characteristics
Symbol
θJA
(Note 2)
Parameter
Typical Value
Junction-to-Ambient Resistance in free air (SOT-23-3, SOT-23-5)
Unit
o
260
C/W
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
2
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APL3534/A/B
Recommended Operating Conditions (Note 3)
Symbol
Parameter
VIN
VIN Input Voltage
IOUT
OUT Output Current
TA
TJ
Range
Unit
2.7~ 5.4
V
0~1
Ambient Temperature
Junction Temperature
A
-40 ~ 85
o
-40 ~ 125
o
C
C
Note 3: Refer to the typical application circuit.
Electrical Characteristics
o
VIN=5V, VEN=5V or VENB=0V and TA=25 C (unless otherwise noted).
Symbol
Parameter
APL3534/A/B
Test Conditions
Unit
Min.
Typ.
Max.
2.35
2.5
2.65
V
-
0.1
-
V
UNDER-VOLTAGE LOCKOUT
VIN UVLO Threshold Voltage
VIN rising
VIN UVLO Hysteresis
SUPPLY CURRENT
IVIN
VIN Supply Current
No load,
VEN = High (or VENB = Low)
-
100
150
µA
ISD
VIN Shutdown Current
No load,
VEN = Low (or VENB = High)
-
-
1
µA
OUT Leakage Current
VOUT tied to ground,
VEN =Low (or VENB = High)
-
-
1
µA
OUT Input Current
VOUT=5V, VIN = 0V, no matter VEN =
Low or High
-
-
1
µA
VIN=5V, IOUT=1A, TJ=25oC
-
110
140
mΩ
-
-
175
mΩ
VIN=3.3V, IOUT=1A, TJ=25 C
-
120
155
mΩ
VIN=3.3V, IOUT=1A, TJ=-40~125oC
-
-
195
mΩ
TJ=25oC,
1.3
1.6
1.9
A
TJ=-40~125oC
1.05
-
-
A
VOUT<1.2V (This function is disabled
during soft start interval)
0.3
0.6
1
A
VOUT - VIN=1V, TJ=25oC
0.3
0.5
0.7
A
POWER SWITCH
o
RDS(ON)
Power Switch On Resistance
VIN=5V, IOUT=1A, TJ=-40~125 C
o
CURRENT-LIMIT PROTECTIONS
ILIM
ISHORT
Current-Limit Threshold
Short-Circuit Output Current
OUTPUT OVER-VOLTAGE PROTECTS
IRV
Reverse Current Blocking Threshold
tRVDEG
Reverse Current Blocking Deglitch Time Guaranteed by Design
-
0.7
-
ms
VOVP
Output OVP Threshold
5.5
5.75
6
V
TOVD
Output OVP Delay Time
-
20
-
µs
1
2.5
4
ms
SOFT-START CONTROL PIN
tSS
Soft-Start Time
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
VIN=5V, VOUT=10% to 90%
3
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APL3534/A/B
Electrical Characteristics (Cont.)
o
VIN=5V, VEN=5V or VENB=0V and TA=25 C (unless otherwise noted).
Symbol
Parameter
APL3534/A/B
Test Conditions
Unit
Min.
Typ.
Max.
-
40
-
Ω
2
-
-
V
OUTPUT DISCHARGE AND ENABLE
VOUT Discharge Resistance
VIN=5V, VEN=Low(or VENB=High),
VOUT=1V
Input Logic High
VEN, VENB
Input Logic Low
-
-
0.8
V
EN, ENB Input Current
VEN=5V or VENB=5V
-
-
1
µA
EN, ENB Leakage
VEN=0V or VENB=0V
-
-
1
µA
TJ rising
-
140
-
°C
-
20
-
°C
OUTPUT TEMPERATURE PROTECTION (OTP)
TOTP
Over-Temperature Threshold
Over-Temperature Hysteresis
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
4
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APL3534/A/B
Typical Operating Characteristics
Supply Current vs.
Junction Temperature
2.65
150
2.60
140
VIN = 5V
Supply Current, ICC (µA)
UVLO Threshold Voltage, VUVLO (V)
UVLO Threshold Voltage vs.
Junction Temperature
VIN Increasing
2.55
2.50
2.45
VIN Decreasing
130
120
110
100
2.40
2.35
-50
90
-25
0
25
50
75
100
125
-50
-25
125
140
Switch On Resistance, RDS(ON) (mΩ)
Switch On Resistance, RDS(ON) (mΩ)
100
Switch On Resistance vs.
Input Voltage
140
130
120
110
100
90
-50
-25
0
25
50
75
100
IOUT = 500mA
TJ = 25oC
135
130
125
120
115
110
105
100
125
2.5
3.0
Junction Temperature, TJ (oC)
3.5
4.0
4.5
5.0
5.5
Input Voltage, VIN (V)
Current Limit Threshold vs.
Junction Temperature
Short-Circuit Output Current vs.
Junction Temperature
1.0
2.0
VIN = 5V
VIN = 5V
Short-Circuit Output Current,
ISHORT (mA)
Current Limit Threshold, ILIM (mA)
75
Switch On Resistance vs.
Junction Temperature
150
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
50
Junction Temperature, TJ ( C)
VIN = 5V
IOUT = 100mA
160
1.9
25
Junction Temperature, TJ ( C)
170
80
0
o
o
-50
-25
0
25
50
75
100
0.8
0.7
0.6
0.5
0.4
0.3
125
-50
Junction Temperature, TJ (oC)
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
0.9
-25
0
25
50
75
100
125
Junction Temperature, TJ (oC)
5
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APL3534/A/B
Typical Operating Characteristics
Switch On Resistance vs.
Output Current
Current-Limit Response vs.
Output Peak Current
140
VIN=5V, TJ=25oC
CIN=330µF, COUT=0µF
35
Switch On Resistance, RDS(ON) (mΩ)
Current-Limit Response, tCL (µs)
40
30
25
20
15
10
5
135
130
120
VIN = 5V
115
110
105
100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
0
0.1
0.3
0.4
0.5
0.6
0.7
0.8
Output Current, IOUT (A)
Output OVP Threshold vs.
Junction Temperature
Reverse Current Blocking Threshold
vs. Junction Temperature
Reverse Current Blocking Threshold,
IRV (mA)
VIN = 5V
5.95
5.90
5.85
5.80
5.75
5.70
5.65
5.60
5.55
VIN = 4V
650
600
550
500
450
400
350
300
-50
-25
0
25
50
75
100
125
VOUT = 5V
-50
Junction Temperature, TJ ( C)
Reverse Current Blocking Threshold
vs. Output Voltage
0
25
50
75
100
125
EN pin Threshold Voltage vs.
Input Voltage
2.0
VIN = 4V, TJ=25oC
EN pin Threshold Voltage , VEN (V)
0.70
-25
Junction Temperature, TJ (oC)
o
Reverse Current Blocking Threshold,
IRV (mA)
0.2
Output Peak Current, IOUT (A)
700
6.00
Output OVP Threshold, VOVP (V)
VIN = 3.3V
125
0
5.50
TJ = 25oC
0.65
0.60
0.55
0.50
0.45
0.40
0.35
1.9
1.8
1.7
VEN Increasing
1.6
1.5
1.4
1.3
1.2
VEN Decreasing
1.1
1.0
0.9
0.8
0.30
2.5
4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4
Output Voltage, VOVP (V)
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
3.0
3.5
4.0
4.5
5.0
Input Voltage, VIN (V)
6
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APL3534/A/B
Operating Waveforms
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Power On
Power Off
VIN
VIN
1
1
VOUT
VOUT
2
2
IOUT
IOUT
3
3
CIN=0.1µF, COUT=0.1µF, ROUT=5Ω
CH1: VIN, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 0.5A/Div, DC
TIME: 5ms/Div
CIN=0.1µF, COUT=0.1µF, ROUT=5Ω
CH1: VIN, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 0.5A/Div, DC
TIME: 5ms/Div
Over-Current Protection
Short Circuit Response
VIN
VIN
1
1
VOUT
VOUT
2
2
I OUT
IOUT
3
3
CIN=330µF, COUT=0µF, ROUT=Open → 0Ω
CH1: VIN, 2V/Div, DC
CH2: VOUT , 2V/Div, DC
CH3: IOUT , 5A/Div, DC
TIME: 1µs/Div
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
CIN=330µF, COUT=0.1µF, IOUT= 5Ω to 2Ω
CH1: VIN, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 1A/Div, DC
TIME: 50µs/Div
7
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APL3534/A/B
Operating Waveforms
Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Reverse Current Protection
Output Over-Voltage Protection
IOUT
3
3
IOUT
VIN
VIN
1
1
VOUT
VOUT
2
2
CIN=0.1µF, COUT=0.1µF, RIN=5Ω
VIN=4.2V ,VOUT=open →5V
CH1: VIN, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 0.5A/Div, DC
TIME: 0.2ms/Div
CIN=0.1µF, COUT=0.1µF, VOUT=open → 6V, RIN=5Ω
CH1: VIN, 2V/Div, DC
CH2: VOUT, 2V/Div, DC
CH3: IOUT, 0.5A/Div, DC
TIME: 20µs/Div
Enable Response
Shutdown Response
VOUT
VOUT
1
1
VEN
VEN
2
2
IOUT
IOUT
3
3
CIN=0.1µF, COUT=0.1µF, ROUT=5Ω
CH1: VOUT, 2V/Div, DC
CH2: VEN, 5V/Div, DC
CH3: IOUT, 500mA/Div, DC
TIME: 1ms/Div
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
CIN=0.1µF, COUT=0.1µF, ROUT=5Ω
CH1: VOUT, 2V/Div, DC
CH2: VENB, 5V/Div, DC
CH3: IOUT, 500mA/Div, DC
TIME: 2µs/Div
8
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APL3534/A/B
Pin Description
PIN
FUNCTION
NO.
NAME
SOT-23-3
SOT-23-5
1
1
GND
2
3
VOUT
3
4
VIN
-
2
EN/ENB
-
5
NC
Ground.
Output Voltage Pin. The output voltage follows the input voltage. When EN is low or
VIN is UVLO, the output voltage is discharged by an internal resistor.
Power Supply Input Connect this pin to external DC supply.
Pulling the ENB above 2V or EN below 0.8V will disable the device, and pulling ENB
pin below 0.8V or EN above 2V will enable the device.
The EN and ENB pins cannot be left floating.
Not Connected Internally.
Block Diagram
VOUT
VIN
UVLO
Charge
Pump
Current- Limit
&
Short Current Limit
Gate Driver and
Control Logic
OVP
EN / ENB
(SOT-23-5)
OTP
GND
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
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APL3534/A/B
Typical Application Circuit
SOT-23-5
SOT-23-3
VIN
0.1µF
3
VIN
VOUT
2
APL3534
VIN
VOUT
0.1µF
4
VIN
VOUT
3
VOUT
0.1µF
0.1µF
APL3534A
GND
On
1
Off
2
EN
GND
1
SOT-23-5
VIN
4
3
VIN
VOUT
VOUT
0.1µF
0.1µF
APL3534B
Off
On
2
ENB
GND
1
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
10
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APL3534/A/B
Function Description
VIN Under-voltage Lockout (UVLO)
Output Over-Voltage Protection
The APL3534/A/B power switch has a built-in under-volt-
The output over-voltage protection is implemented by 2
either sensing mechanisms. One is by sensing when
age lockout circuit to keep the output shut off until internal
circuitry is operating properly. The UVLO circuit has hys-
VOUT voltage is above VOVP threshold, the internal power
MOSFET is turned off. The other is by sensing when re-
teresis and a de-glitch feature so that it will typically ignore undershoot transients on the input. When input volt-
verse current, flowing from VOUT to VIN, surpasses IRV.
When the reverse current reachers the reverse current
age exceeds the UVLO threshold, the output voltage starts
a soft-start to reduce the inrush current.
Blocking threshold, the device limits the reveres current
at IRV threshold level. When the reverse current fault ex-
Power Switch
ists for more than 0.7ms, the internal power MOSFET is
turned off. The internal power MOSFET is allowed to turn-
The power switch is an N-channel MOSFET with a low
RDS(ON). The internal power MOSFET does not have the
on once the output voltage gose below VIN-1.2V.
body diode. When IC is in UVLO state, the MOSFET prevents a current flowing from the VOUT back to VIN and
Output Discharge
VIN to VOUT.
When the input voltage is under VIN UVLO Threshold or
VEN=Low or VENB=High, the output discharge device is
Current-Limit Protection
The APL3534/A/B power switch provides the current-limit
protection function. During current-limit, the devices limit
turned on to discharge the output voltage.
output current at current-limit threshold. For reliable
operation, the device should not be operated in current-
Enable/Disable (SOT-23-5)
limit for extended period time.
the device, and pulling ENB pin below 0.8V or EN above
2V will enable the device.
Short-Circuit Protection
When the output voltage drops below 1.2V, which is
When the IC is disabled the supply current is reduced to
less than 1µA. The enable input is compatible with both
caused by the over load or short-circuit, the devices limit
the output current down to a safe level. The short-circuit
TTL and CMOS logic levels. The EN/ENB pins cannot be
left floating.
current-limit is used to reduce the power dissipation during short-circuit condition. If the junction temperature is
Over-temperature Protection
over the thermal shutdown temperature the device will
enter the thermal shutdown. This Function is disabled
When the junction temperature exceeds 140 C, the internal thermal sense circuit turns off the power FET and
during soft-start interval.
allows the device to cool down. When the device’s junco
tion temperature cools by 20 C, the internal thermal sense
Soft-Start
circuit will enable the device, resulting in a pulsed output
during continuous thermal protection. Thermal protec-
Pulling the ENB above 2V or EN below 0.8V will disable
o
The APLA3534/A/B has a built-in output soft-start control
tion is designed to protect the IC in the event of overtemperature conditions. For normal operation, the junc-
to limit the current surge during start-up. The soft-start
interval is 2.5ms.
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
tion temperature cannot exceed TJ=+125oC.
11
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APL3534/A/B
Application Information
Input Capacitor
For normal operation, do not exceed the maximum operating junction temperature of TJ = 125oC. The calculated
power dissipation should be less than:
A 1µF or higher ceramic bypass capacitor from VIN to GND,
located near the APL3534/A/B, is strongly recommended
to suppress the ringing during short circuit fault event.
When the load current trips the SCP threshold in an over
PD = (125-25) / 260
= 0.38(W) ------------------------------------------TA=25oC
load condition such as a short circuit, hot plug-in or heavy
load transient the IC immediately turns off the internal
power switch that will cause VIN ringing due to the inductance between power source and VIN. Without the by-
PD = (125-85) / 260
= 0.15(W) ------------------------------------------TA=85oC
pass capacitor, the output short may cause sufficient ringing on the input to damage internal control circuitry.
The power dissipation depends on operating ambient
temperature for fixed TJ=125 oC and thermal resistance
θJA . For APL3534 packages, the Figure 1 of derating
Input capacitor is especially important to prevent VIN from
ringing too high in some applications where the induc-
curves allows the designer to see the effect of rising
ambient temperature on the maximum power allowed.
tance between power source to VIN is large (ex, an extra
bead is added between power source line to VIN for EMI
the absolute maximum voltage of the device during over
load conditions.
Thermal Consideration
The APL3534 maximum power dissipation depends on
the differences of the thermal resistance and tempera-
0.40
TJ=125oC
Power Dissipation (W)
reduction), additional input capacitance may be needed
on the input to reduce voltage overshoot from exceeding
ture between junction and ambient air. The power dissipation PD across the device is:
0.35
0.30
0.25
0.20
0.15
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
Ambient Temperature (oC)
Figure 1. Derating Curves for APL3534 Package
PD = (TJ-TA) / θJA
Layout Consideration
The PCB layout should be carefully performed to maximize thermal dissipation and to minimize voltage drop,
where (TJ-TA) is the temperature difference between the
junction and ambient air. θJA is the thermal resistance
between junction and ambient air. Assuming the TA=25oC
droop and EMI. The following guidelines must be
considered:
o
and maximum TJ=140 C (typical thermal limit threshold),
the maximum power dissipation is calculated as:
1. Please place the input capacitors near the VIN pin as
close as possible.
2. Output decoupling capacitors for load must be placed
near the load as close as possible for decoupling high-
PD(MAX) = (140-25) / 260
= 0.44(W)
frequency ripples.
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
12
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APL3534/A/B
3. Locate APL3534/A/B and output capacitors near the
load to reduce parasitic resistance and inductance for
excellent load transient performance.
4. The negative pins of the input and output capacitors
and the GND pin must be connected to the ground plane
of the load.
5. Keep VIN and VOUT traces as wide and short as possible.
Application Information
Recommanded Minimum Footprit
0.057
0.037
0.074
0.102
0.024
Unit : Inch
SOT-23-3
0.05
0.1
0.076
0.038
0.02
Unit : Inch
SOT-23-5
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
13
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APL3534/A/B
Package Information
SOT-23-3
D
e
E
E1
SEE
VIEW A
c
b
0.25
A
L
GAUGE PLANE
SEATING PLANE
0
A1
A2
e1
VIEW A
S
Y
M
B
O
L
SOT-23-3
INCHES
MILLIMETERS
MIN.
MIN.
MAX.
MAX.
0.057
A
1.45
A1
0.00
0.15
0.000
0.006
A2
0.90
1.30
0.035
0.051
b
0.30
0.50
0.012
0.020
c
0.08
0.22
0.003
0.009
D
2.70
3.10
0.106
0.122
E
2.60
3.00
0.102
0.118
E1
1.40
1.80
0.055
0.071
e
0.95 BSC
e1
1.90 BSC
0.037 BSC
0.075 BSC
L
0.30
0.60
0
0°
8°
0.012
0°
0.024
8°
Note : Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
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APL3534/A/B
Package Information
SOT-23-5
D
e
E
E1
SEE
VIEW A
b
c
0.25
A
L
0
GAUGE PLANE
SEATING PLANE
A1
A2
e1
VIEW A
S
Y
M
B
O
L
SOT-23-5
INCHES
MILLIMETERS
MIN.
MIN.
MAX.
A
MAX.
0.057
1.45
A1
0.00
0.15
0.000
0.006
A2
0.90
1.30
0.035
0.051
b
0.30
0.50
0.012
0.020
c
0.08
0.22
0.003
0.009
D
2.70
3.10
0.106
0.122
E
2.60
3.00
0.102
0.118
E1
1.40
1.80
0.055
0.071
e
0.95 BSC
0.037 BSC
e1
1.90 BSC
0.075 BSC
L
0.30
0.60
0
0°
8°
0.012
0°
0.024
8°
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
15
www.anpec.com.tw
APL3534/A/B
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SOT-23-3
Application
SOT-23-5
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
4.0±0.10
4.0±0.10
(mm)
Devices Per Unit
Package Type
Unit
Quantity
SOT-23-3
Tape & Reel
3000
SOT-23-5
Tape & Reel
3000
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
16
www.anpec.com.tw
APL3534/A/B
Taping Direction Information
SOT-23-3
USER DIRECTION OF FEED
SOT-23-5
USER DIRECTION OF FEED
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
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APL3534/A/B
Classification Profile
Supplier Tp≧Tc
User Tp≦Tc
TC
TC -5oC
User tp
Supplier tp
Tp
Temperature
Max. Ramp
Max. Ramp
TL
Tsmax
tp
Up Rate = 3oC/s
Down Rate = 6oC/s
TC -5oC
t
Preheat Area
Tsmin
tS
25
Time 25oC to Peak
Time
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3 °C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
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APL3534/A/B
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.5 - Nov., 2015
19
www.anpec.com.tw