1.5SMC6.8AT3 Series 1500 Watt Peak Power Zener Transient Voltage Suppressors Unidirectional* http://onsemi.com The SMC series is designed to protect voltage sensitive components from high voltage, high energy transients. They have excellent clamping capability, high surge capability, low zener impedance and fast response time. The SMC series is supplied in ON Semiconductor’s exclusive, cost-effective, highly reliable Surmetic package and is ideally suited for use in communication systems, automotive, numerical controls, process controls, medical equipment, business machines, power supplies and many other industrial/consumer applications. Specification Features: • • • • • • • • • • PLASTIC SURFACE MOUNT ZENER OVERVOLTAGE TRANSIENT SUPPRESSORS 5.8 − 78 VOLTS 1500 WATT PEAK POWER Cathode Working Peak Reverse Voltage Range − 5.8 to 77.8 V Standard Zener Breakdown Voltage Range − 6.8 to 91 V Peak Power − 1500 Watts @ 1.0 ms ESD Rating of Class 3 (>16 kV) per Human Body Model Maximum Clamp Voltage @ Peak Pulse Current Low Leakage < 5.0 A Above 10 V UL 497B for Isolated Loop Circuit Protection Maximum Temperature Coefficient Specified Response Time is Typically < 1.0 ns Pb−Free Packages are Available Anode SMC CASE 403 PLASTIC MARKING DIAGRAM Mechanical Characteristics: CASE: Void-free, transfer-molded, thermosetting plastic FINISH: All external surfaces are corrosion resistant and leads are readily solderable MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: YWW xxxA Y WW xxxA 260°C for 10 Seconds LEADS: Modified L−Bend providing more contact area to bond pads POLARITY: Cathode indicated by molded polarity notch MOUNTING POSITION: Any ORDERING INFORMATION Device** 1.5SMCxxxAT3 MAXIMUM RATINGS 1.5SMCxxxAT3G Please See the Table on the Following Page = Year = Work Week = Specific Device Code = (See Table on Page 3) Package Shipping† SMC 2500/Tape & Reel SMC (Pb−Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *Bidirectional devices will not be available in this series. **The “T3” suffix refers to a 13 inch reel. Individual devices are listed on page 3 of this data sheet. Semiconductor Components Industries, LLC, 2004 April, 2004 − Rev. 5 1 Publication Order Number: 1.5SMC6.8AT3/D 1.5SMC6.8AT3 Series MAXIMUM RATINGS Rating Symbol Value Unit Peak Power Dissipation (Note 1) @ TL = 25°C, Pulse Width = 1 ms PPK 1500 W DC Power Dissipation @ TL = 75°C Measured Zero Lead Length (Note 2) Derate Above 75°C Thermal Resistance from Junction−to−Lead PD 4.0 W RJL 54.6 18.3 mW/°C °C/W W mW/°C °C/W DC Power Dissipation (Note 3) @ TA = 25°C Derate Above 25°C Thermal Resistance from Junction−to−Ambient PD RJA 0.75 6.1 165 Forward Surge Current (Note 4) @ TA = 25°C IFSM 200 A TJ, Tstg −65 to +150 °C Operating and Storage Temperature Range Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. 10 X 1000 s, non−repetitive 2. 1″ square copper pad, FR−4 board 3. FR−4 board, using ON Semiconductor minimum recommended footprint, as shown in 403 case outline dimensions spec. 4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum. ELECTRICAL CHARACTERISTICS (TA = 25°C unless I otherwise noted, VF = 3.5 V Max. @ IF (Note 5) = 100 A) IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR VBR IT VBR IF Parameter Symbol VC VBR VRWM Working Peak Reverse Voltage IR VF IT Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Maximum Temperature Coefficient of VBR IF Forward Current VF Forward Voltage @ IF IPP Uni−Directional TVS 5. 1/2 sine wave or equivalent, PW = 8.3 ms non−repetitive duty cycle http://onsemi.com 2 V 1.5SMC6.8AT3 Series ELECTRICAL CHARACTERISTICS (Devices listed in bold, italic are ON Semiconductor Preferred devices.) Breakdown Voltage VRWM (Note 6) IR @ VRWM Volts A Min Nom VC @ IPP (Note 8) @ IT VC IPP VBR Max mA Volts Amps %/°C VBR Volts (Note 7) Device Device Marking 1.5SMC6.8AT3 1.5SMC7.5AT3 1.5SMC8.2AT3 1.5SMC9.1AT3 6V8A 7V5A 8V2A 9V1A 5.8 6.4 7.02 7.78 1000 500 200 50 6.45 7.13 7.79 8.65 6.8 7.5 8.2 9.1 7.14 7.88 8.61 9.55 10 10 10 1 10.5 11.3 12.1 13.4 143 132 124 112 0.057 0.061 0.065 0.068 1.5SMC10AT3 1.5SMC11AT3 1.5SMC12AT3 1.5SMC13AT3 10A 11A 12A 13A 8.55 9.4 10.2 11.1 10 5 5 5 9.5 10.5 11.4 12.4 10 11 12 13 10.5 11.6 12.6 13.7 1 1 1 1 14.5 15.6 16.7 18.2 103 96 90 82 0.073 0.075 0.078 0.081 1.5SMC15AT3 1.5SMC15AT3G 1.5SMC16AT3 1.5SMC18AT3 1.5SMC20AT3 15A 15A 16A 18A 20A 12.8 12.8 13.6 15.3 17.1 5 5 5 5 5 14.3 14.3 15.2 17.1 19 15 15 16 18 20 15.8 15.8 16.8 18.9 21 1 1 1 1 1 21.2 21.2 22.5 25.2 27.7 71 71 67 59.5 54 0.084 0.084 0.086 0.088 0.09 1.5SMC22AT3 1.5SMC24AT3 1.5SMC27AT3 1.5SMC30AT3 22A 24A 27A 30A 18.8 20.5 23.1 25.6 5 5 5 5 20.9 22.8 25.7 28.5 22 24 27 30 23.1 25.2 28.4 31.5 1 1 1 1 30.6 33.2 37.5 41.4 49 45 40 36 0.092 0.094 0.096 0.097 1.5SMC33AT3 1.5SMC36AT3 1.5SMC39AT3 1.5SMC43AT3 33A 36A 39A 43A 28.2 30.8 33.3 36.8 5 5 5 5 31.4 34.2 37.1 40.9 33 36 39 43 34.7 37.8 41 45.2 1 1 1 1 45.7 49.9 53.9 59.3 33 30 28 25.3 0.098 0.099 0.1 0.101 1.5SMC47AT3 1.5SMC51AT3 1.5SMC56AT3 1.5SMC62AT3 1.5SMC62AT3G 47A 51A 56A 62A 40.2 43.6 47.8 53 53 5 5 5 5 5 44.7 48.5 53.2 58.9 58.9 47 51 56 62 62 49.4 53.6 58.8 65.1 65.1 1 1 1 1 1 64.8 70.1 77 85 85 23.2 21.4 19.5 17.7 17.7 0.101 0.102 0.103 0.104 0.104 1.5SMC68AT3 1.5SMC75AT3 1.5SMC82AT3 1.5SMC91AT3 68A 75A 82A 91A 58.1 64.1 70.1 77.8 5 5 5 5 64.6 71.3 77.9 86.5 68 75 82 91 71.4 78.8 86.1 95.5 1 1 1 1 92 103 113 125 16.3 14.6 13.3 12 0.104 0.105 0.105 0.106 Devices listed in bold, italic are ON Semiconductor Preferred devices. Preferred devices are recommended choices for future use and best overall value. * The “G” suffix indicates Pb−Free package available. 6. A transient suppressor is normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than the DC or continuous peak operating voltage level. 7. VBR measured at pulse test current IT at an ambient temperature of 25°C. 8. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data − 1500 Watt at the beginning of this group. NOTE: http://onsemi.com 3 1.5SMC6.8AT3 Series NONREPETITIVE PULSE WAVEFORM SHOWN IN FIGURE 2 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAYS TO 50% OF IPP. tr≤ 10 s 100 PEAK VALUE − IPP VALUE (%) Ppk, PEAK POWER (kW) 100 10 HALF VALUE − 50 IPP 2 tP 1 0.1 s 1 s 10 s 100 s 1 ms 0 10 ms 0 1 2 3 4 tP, PULSE WIDTH t, TIME (ms) Figure 1. Pulse Rating Curve Figure 2. Pulse Waveform 1000 140 IT, TEST CURRENT (AMPS) PEAK PULSE DERATING IN % OF PEAK POWER OR CURRENT @ TA = 25° C 160 120 100 80 60 40 20 0 0 25 50 75 100 125 150 500 VBR(NOM)=6.8TO13V 20V 43V 24V 75V TL=25°C tP=10s 200 100 120V 50 180V 20 10 5 2 1 0.3 0.5 0.7 1 2 3 5 7 10 20 30 VBR, INSTANTANEOUS INCREASE IN VBR ABOVE VBR (NOM) (VOLTS) TA, AMBIENT TEMPERATURE (°C) Figure 4. Dynamic Impedance Figure 3. Pulse Derating Curve UL RECOGNITION including Strike Voltage Breakdown test, Endurance Conditioning, Temperature test, Dielectric Voltage-Withstand test, Discharge test and several more. Whereas, some competitors have only passed a flammability test for the package material, we have been recognized for much more to be included in their Protector category. The entire series has Underwriters Laboratory Recognition for the classification of protectors (QVGV2) under the UL standard for safety 497B and File #116110. Many competitors only have one or two devices recognized or have recognition in a non-protective category. Some competitors have no recognition at all. With the UL497B recognition, our parts successfully passed several tests http://onsemi.com 4 1.5SMC6.8AT3 Series APPLICATION NOTES RESPONSE TIME minimum lead lengths and placing the suppressor device as close as possible to the equipment or components to be protected will minimize this overshoot. Some input impedance represented by Zin is essential to prevent overstress of the protection device. This impedance should be as high as possible, without restricting the circuit operation. In most applications, the transient suppressor device is placed in parallel with the equipment or component to be protected. In this situation, there is a time delay associated with the capacitance of the device and an overshoot condition associated with the inductance of the device and the inductance of the connection method. The capacitive effect is of minor importance in the parallel protection scheme because it only produces a time delay in the transition from the operating voltage to the clamp voltage as shown in Figure 5. The inductive effects in the device are due to actual turn-on time (time required for the device to go from zero current to full current) and lead inductance. This inductive effect produces an overshoot in the voltage across the equipment or component being protected as shown in Figure 6. Minimizing this overshoot is very important in the application, since the main purpose for adding a transient suppressor is to clamp voltage spikes. The SMC series have a very good response time, typically < 1.0 ns and negligible inductance. However, external inductive effects could produce unacceptable overshoot. Proper circuit layout, DUTY CYCLE DERATING The data of Figure 1 applies for non-repetitive conditions and at a lead temperature of 25°C. If the duty cycle increases, the peak power must be reduced as indicated by the curves of Figure 7. Average power must be derated as the lead or ambient temperature rises above 25°C. The average power derating curve normally given on data sheets may be normalized and used for this purpose. At first glance the derating curves of Figure 7 appear to be in error as the 10 ms pulse has a higher derating factor than the 10 s pulse. However, when the derating factor for a given pulse of Figure 7 is multiplied by the peak power value of Figure 1 for the same pulse, the results follow the expected trend. http://onsemi.com 5 1.5SMC6.8AT3 Series TYPICAL PROTECTION CIRCUIT Zin Vin V LOAD V Vin (TRANSIENT) VL OVERSHOOT DUE TO INDUCTIVE EFFECTS Vin (TRANSIENT) VL VL Vin td tD = TIME DELAY DUE TO CAPACITIVE EFFECT t t Figure 5. Figure 6. 1 0.7 DERATING FACTOR 0.5 0.3 0.2 PULSE WIDTH 10 ms 0.1 0.07 0.05 1 ms 0.03 100 s 0.02 10 s 0.01 0.1 0.2 0.5 1 2 5 10 D, DUTY CYCLE (%) 20 50 100 Figure 7. Typical Derating Factor for Duty Cycle http://onsemi.com 6 1.5SMC6.8AT3 Series PACKAGE DIMENSIONS SMC CASE 403−03 ISSUE B S A D NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P. B INCHES DIM MIN MAX A 0.260 0.280 B 0.220 0.240 C 0.075 0.095 D 0.115 0.121 H 0.0020 0.0060 J 0.006 0.012 K 0.030 0.050 P 0.020 REF S 0.305 0.320 C K P J H SOLDERING FOOTPRINT* 4.343 0.171 3.810 0.150 2.794 0.110 SCALE 4:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MILLIMETERS MIN MAX 6.60 7.11 5.59 6.10 1.90 2.41 2.92 3.07 0.051 0.152 0.15 0.30 0.76 1.27 0.51 REF 7.75 8.13 1.5SMC6.8AT3 Series Surmetic is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 8 For additional information, please contact your local Sales Representative. 1.5SMC6.8AT3/D