Datasheet AS8221 F l e x R a y S t a n d a r d Tr a n s c e i v e r 1 General Description This document is subject to change without notice. The AS8221 is a high speed automotive bus driver fully conforming to the FlexRay Electrical Physical Layer Specification V2.1 Rev B. The AS8221 operates as a bi-directional interface between the FlexRay Communication Controller and the twisted-pair copper wiring. The AS8221 provides an optimized host controller interface consisting of three low-active pins. The Enable (EN) and Standby (STBN) input pins for mode handling by the microcontroller and the Error (ERRN) out pin where system, chip failures or status information are signalled to the microcontroller. Signalling logic high on the Enable and Standby pin the device will enter NORMAL mode in case no fault condition is given and in this mode the device is fully operational meaning FlexRay communication is possible. Additionally, a RECEIVE-0NLY mode is implemented, which can be accessed by the microcontroller where only FlexRay streams can be received in order to avoid unwanted disturbances on the FlexRay bus while listening to the bus traffic. In the low-power modes (STANDBY and SLEEP mode) very low power consumption is achieved. In case of undervoltage at one of the supply voltages (VBAT, VCC, and VIO) the device will change its mode to a low-power mode (either STANDBY or SLEEP mode) and the device will signal an error accordingly. In case of low voltage is detected on both VBAT and VCC the device will enter the POWER-OFF mode, where no operation is possible. A safe mechanism from the low-power modes to POWER-OFF mode and vice versa is implemented ensuring that no deadlock can happen during the startup phase. Ensuring application in safety critical environments a two wire busguardian interface is implemented where additional monitoring circuitries on the electronic-control-unit can activate and deactivate the transmitter and additionally on the receive enable output (RxEN) in low-power modes the wake conditions and in normal power modes the received FlexRay streams can be monitored. 2 Key Features Compliant with FlexRay Electrical Physical Layer Specification V2.1 Rev. B Data transfer up to 10 Mbps Excellent EMC performance. High common mode range ensure excellent EMI Interface for Bus Guardian or supervision circuits Automatic thermal shutdown protection Supports 12V and 24V systems with very low sleep current Integrated power management system - Two inhibit pins for external voltage supply control - Local wake-up input - Remote wake-up capability via FlexRay bus in low-power modes Supports 2.5, 3, 3.3, 5 V microcontrollers, automatic adaptation to digital interface levels Protection against damage due to short circuit conditions on the bus (positive and negative battery voltage) Operating temperature range -40ºC to +125ºC Lead-free SSOP20 package 3 Applications The AS8221 FlexRay Standard Transceiver is best fitting for automotive FlexRay nodes where bus wake-up and voltage regulator control for voltage supplies is needed. The device addresses all ECUs connected to the permanent battery supply (clamp 30). The AS8221 can be used as only ECU wake-up component with very low power consumption in SLEEP mode. A thermal sensor circuit with an integral shutdown mechanism prevents damage to the device in extreme temperature conditions. The symmetrical transient control for the high- and low-side driver for both the bus-minus (BM) and bus-plus (BP) line allows an ideal balance of communications over different network topologies, with excellent EMC performance. www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 1 - 41 AS8221 Datasheet - A p p l i c a t i o n s Figure 1. AS8221 FlexRay Standard Transceiver Block Diagram AS8221 VIO STBN EN Bus Failure Detector Host Controller Interface ERRN VIO RxD TxD TxEN Communication Controller Interface BGE Bus Guardian Interface RxEN Internal Logic (IL) Transmitter BP BM Receiver VBAT INH1 INH2 VBAT Wake-Up Detector Power Supply Interface VBAT VIO VCC www.austriamicrosystems.com/flexray/AS8221 GND Revision 1.4 WAKE 2 - 41 AS8221 Datasheet - C o n t e n t s Contents 1 General Description .................................................................................................................................................................. 1 2 Key Features............................................................................................................................................................................. 1 3 Applications............................................................................................................................................................................... 1 4 Pin Assignments ....................................................................................................................................................................... 5 4.1 Pin Descriptions.................................................................................................................................................................................... 5 5 Absolute Maximum Ratings ...................................................................................................................................................... 6 6 Electrical Characteristics........................................................................................................................................................... 7 7 Typical Operating Characteristics ........................................................................................................................................... 13 8 Detailed Description................................................................................................................................................................ 14 8.1 Block Description................................................................................................................................................................................ 14 8.2 Events................................................................................................................................................................................................. 14 8.3 Operating Modes ................................................................................................................................................................................ 14 8.3.1 8.3.2 8.3.3 8.3.4 8.3.5 NORMAL Mode ......................................................................................................................................................................... RECEIVE-ONLY Mode .............................................................................................................................................................. STANDBY Mode........................................................................................................................................................................ GO-TO-SLEEP Mode ................................................................................................................................................................ SLEEP Mode ............................................................................................................................................................................. 8.4 Non Operating Mode .......................................................................................................................................................................... 15 15 15 15 15 15 8.4.1 POWER-OFF............................................................................................................................................................................. 15 8.5 Undervoltage Events .......................................................................................................................................................................... 16 8.5.1 Undervoltage/Voltage Recovery VBAT ...................................................................................................................................... 16 8.5.2 Undervoltage/Voltage Recovery VIO ......................................................................................................................................... 16 8.5.3 Undervoltage/Voltage Recovery VCC ........................................................................................................................................ 16 8.6 Power On/Off Events.......................................................................................................................................................................... 16 8.7 Wake-Up Events................................................................................................................................................................................. 16 8.7.1 Remote Wake-Up Event ............................................................................................................................................................ 16 8.7.2 Local Wake-Up Event ................................................................................................................................................................ 17 9 Application Information ........................................................................................................................................................... 18 9.1 Fail Silent Behavior............................................................................................................................................................................. 19 9.1.1 RxEN / BGE timeout .................................................................................................................................................................. 19 9.1.2 State Transitions due to Under Voltage Detection..................................................................................................................... 19 9.1.3 State Transitions due to Voltage Recovery Detection ............................................................................................................... 19 9.2 Mode Transitions ................................................................................................................................................................................ 19 9.2.1 Operating Mode Transitions ...................................................................................................................................................... 20 9.2.2 ERRN Signalling ........................................................................................................................................................................ 22 9.3 Loss of Ground ................................................................................................................................................................................... 22 9.4 Error Flags.......................................................................................................................................................................................... 22 9.4.1 9.4.2 9.4.3 9.4.4 9.4.5 9.4.6 Undervoltage ............................................................................................................................................................................. Bus Error (BUSERR) ................................................................................................................................................................. Short Circuit between BP and BM (BP_BM).............................................................................................................................. Over Temperature (OT) ............................................................................................................................................................. TxEN_BGE Timeout (TxEN_TO)............................................................................................................................................... Error Flag (ERROR) .................................................................................................................................................................. 9.5 Status Flags........................................................................................................................................................................................ 22 22 22 22 22 23 23 9.5.1 Local Wake Flag (LWAKE) ........................................................................................................................................................ 23 www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 3 - 41 AS8221 Datasheet - C o n t e n t s 9.5.2 Remote Wake Flag (RWAKE) ................................................................................................................................................... 23 9.5.3 Power on Flag (PWON) ............................................................................................................................................................. 23 9.6 Error Flags and Status Flags Read-Out ............................................................................................................................................. 23 9.6.1 Error and Status Flag Bit Order ................................................................................................................................................. 24 9.7 Bus Driver........................................................................................................................................................................................... 24 9.7.1 Bus States ................................................................................................................................................................................. 24 9.8 Transceiver Timing ............................................................................................................................................................................. 25 9.9 Transmitter.......................................................................................................................................................................................... 26 9.10 Receiver ........................................................................................................................................................................................... 27 9.10.1 Bus Activity and Idle Detection (only in NORMAL and RECEIVE-ONLY mode) ..................................................................... 28 9.10.2 Bus Data Detection (only in NORMAL and RECEIVE-ONLY mode)....................................................................................... 28 9.10.3 Receiver Test Signal................................................................................................................................................................ 29 9.11 Test Circuits ...................................................................................................................................................................................... 10 Appendix............................................................................................................................................................................... 30 31 10.1 FlexRay Functional Classes ............................................................................................................................................................. 31 10.2 FlexRay Parameter Comparison ...................................................................................................................................................... 31 11 Package Drawings and Markings.......................................................................................................................................... 38 12 Ordering Information............................................................................................................................................................. 40 www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 4 - 41 AS8221 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments Figure 2. Pin Assignments SSOP20 Package INH2 1 20 n.u INH1 2 19 VCC EN 3 18 BP VIO 4 17 BM TxD 5 16 GND TxEN 6 15 WAKE RxD 7 14 VBAT BGE 8 13 ERRN STBN 9 12 RxEN 10 11 n.u Reserved AS8221 4.1 Pin Descriptions Table 1. Pin Descriptions Pin Name Pin Number Pin Type Description INH2 1 INH1 2 EN 3 Digital input with pull-down VIO 4 Supply pad TxD 5 Digital input with pull-down TxEN 6 Digital input with pull-up RxD 7 Digital output BGE 8 STBN 9 Reserved 10 Analog/digital input/output with pull-down Not used 11 - RxEN 12 ERRN 13 VBAT 14 Supply pad Supply Voltage. Battery supply voltage WAKE 15 Analog I/O Analog Input. Local wake-up input GND 16 Supply pad Ground BM 17 BP 18 VCC 19 Supply pad Not used 20 - Analog Output. Inhibit 2 output for switching external voltage regulator Analog I/O Analog Output. Inhibit 1 output for switching external voltage regulator Supply Voltage. I/O supply voltage www.austriamicrosystems.com/flexray/AS8221 Analog I/O Digital Input. Transmit data input Digital Input. Transmitter enable input Digital Output. Receive data output Digital input with pull-down Digital output Digital Input. Enable input Digital Input. Bus guardian enable input Digital Input. Standby input To be connected to GND or to be unconnected Digital Output. Receive data enable output Digital Output. Error diagnosis output and wake status output Analog Input/Output. Bus line Minus Analog Input/Output. Bus line Plus Supply voltage Revision 1.4 5 - 41 AS8221 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 7 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter Min Max Units Battery Supply Voltage (VBAT) -0.3 +50 V Supply Voltage (VCC) -0.3 +7.0 V Supply Voltage (VIO) -0.3 +7.0 V DC Voltage at EN, STBN, ERRN, TxD, RxD, TxEN, BGE, RxEN -0.3 VIO + 0.3 V DC Voltage on pin WAKE, INH1, INH2 -0.3 VBAT + 0.3 DC Voltage at BP and BM -40 +50 V Input current (latchup immunity) -100 100 mA According to JEDEC 78 Electrostatic discharge at bus lines BP, BM, VBAT, WAKE -4 +4 kV According to AEC-Q100-002 Electrostatic discharge -2 +2 kV According to AEC-Q100-002 Transient voltage on BP, BM -200 +200 V According to ISO7637 part3 test pulses a and b; class C; RL=45 Ω, CL= 100 pF; (see Figure 18 on page 30). -200 +200 V According to ISO7637 part2 test pulses 1, 2, 3a and 3b; class C; RL=45 Ω, CL= 100 pF; (see Figure 18 on page 30). +6.5 +50 V According to ISO7637 part2 test pulse 4; class C; RL=45 Ω, CL= 100 pF; (see Figure 18 on page 30). Transient voltage on VBAT 150 mW Storage temperature -55 +150 ºC Junction temperature -40 +150 ºC Package body temperature Humidity non-condensing Moisture Sensitivity Level www.austriamicrosystems.com/flexray/AS8221 5 260 ºC 85 % 3 VIO < VCC According to ISO7637 part2 test pulse 5b; class C; RL=45 Ω, CL= 100 pF; (see Figure 18 on page 30). +50 Total power dissipation (all supplies and outputs) Notes The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/ JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). Represents a maximum floor life time of 168h Revision 1.4 6 - 41 AS8221 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics Tvj = -40 to +150 ºC, VCC= +4.75V to +5.25V, VBAT= 5.5V to +50V, VIO = +2.2 to VCC, RL= 45Ω, CL= 100 pF, unless otherwise specified. Table 3. Electrical Characteristics Symbol Parameter Conditions Min Typ Max Units +25 +125 ºC 3.05 V 50 µA 100 µA Supply Voltage TAMB Ambient temperature -40 VCC-VIO Difference of supplies -0.1 IBAT ICC IIO VBAT current consumption VCC current consumption VIO current consumption VBAT=12V; low-power modes Tvj < 125ºC (see footnote 1) 0 VBAT=12V; low-power modes Tvj < 150ºC 0 Non-low-power modes 0 0.15 1 mA Low-power Modes VCC = 0V to +5.25V (see footnote 1) -5 8 20 µA Non-low-power modes: NORMAL, driver enabled; 0 29 45 mA Non-low-power modes: NORMAL, driver enabled; RBUS = ∞Ω 0 7 15 mA Non-low-power modes: RECEIVE-ONLY 0 2.0 10 mA Low-power modes VIO = 0V to +5.25V -5 1 5 µA Non-low power modes 0 15 1000 µA 26 State Transitions tSTBN_RxD Delay STBN high to RxD high with wake flag set 1 9 50 µs tSTBN_RxEN Delay STBN high to RxEN high with wake flag set 1 9 50 µs tSLEEP_INH1 Delay STBN high to INH1 high INH1 high = 80% VBAT 1 11 50 µs tSTANDBY_INH2 Delay STBN high to INH2 high INH2 high = 80% VBAT 1 11 50 µs tSLEEP GO-TO-SLEEP hold time INH1 low = 20% VBAT 10 26 70 µs VBUS_DIFF_D0 Differential bus voltage low in NORMAL mode (Data0) VBPdata0 - VBMdata0; 40 ≤ RL ≤ 55Ω -2 -1 -0.6 V VBUS_DIFF_D1 Differential bus voltage high in NORMAL mode (Data1) VBPdata1 - VBMdata1; 40 ≤ RL ≤ 55Ω 0.6 1 2 V ΔVBUS_DIFF Matching between Data0 and Data1 differential bus voltage in NORMAL mode VBUS_DIFF_D0 - VBUS_DIFF_D1 40 ≤ RL ≤ 55Ω -200 0 200 mV VBUS_COM_D0 Common mode bus voltage in case of Data0 in non-low-power modes VBPdata0/2 + VBMdata0/2 40 ≤ RL ≤ 55Ω 0.4 * VCC 0.5 * VCC 0.6 * VCC V VBUS_COM_D1 Common mode bus voltage in case of Data1 in non-low-power modes VBPdata1/2 + VBMdata1/2 40 ≤ RL ≤ 55Ω 0.4 * VCC 0.5 * VCC 0.6 * VCC V Transmitter www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 7 - 41 AS8221 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 3. Electrical Characteristics Symbol Parameter Conditions Min Typ Max Units ΔVBUS_COM Matching between Data0 and Data1 common mode voltage VBUS_COM_D0 - VBUS_COM_D1 40 ≤ RL ≤ 55Ω -200 0 200 mV VBUS_DIFF_Idle Absolute differential bus voltage in bus idle mode Load on BM/BM: 40Ω || 100pF 0 30 mV IBPBMShortMax IBMBPShortMax Absolute max current when BP is shorted to BM VBP=VBM 35 +100 mA IBPGNDShortMax Absolute max current when BP is shorted to GND VBP= 0V 48 +100 mA IBMGNDShortMax Absolute max current when BM is shorted to GND VBM= 0V 48 +100 mA IBP-5VShortMax Absolute max current when BP is shorted to -5 V VBP= -5V 48 +100 mA IBM-5VShortMax Absolute max current when BM is shorted to -5 V VBM= -5V 48 +100 mA IBP27VShortMax Absolute max current when BP is shorted to 27 V VBP= 27V 71 +100 mA IBM27VShortMax Absolute max current when BM is shorted to 27 V VBM= 27V 71 +100 mA IBP48VShortMax Absolute max current when BP is shorted to 48 V VBP= 48V 72 +100 mA IBM48VShortMax Absolute max current when BM is shorted to 48 V VBM= 48V 72 +100 mA tTxD_BUS01 Delay time from TxD to BUS positive edge tTxD_RISE = 5ns 22 50 ns tTxD_BUS10 Delay time from TxD to BUS negative edge tTxD_FALL = 5ns 22 50 ns tTxD_MISMATCH Delay time from TxD to BUS mismatch tTxD_BUS10 - tTxD_BUS01 -4 0 4 ns tBUS10 Fall time differential bus voltage 80% - 20% of VBUS 3.75 12 18.75 ns tBUS01 Rise time differential bus voltage 20% - 80% of VBUS 3.75 12 18.75 ns tTxEN_BUS_Idle_Active Delay time from TxEN to bus active 14 50 ns tTxEN_BUS_Active_Idle Delay time from TxEN to bus idle 10 50 ns tTxEN_MISMATCH Delay time from TxEN to bus mismatch 4 50 ns tBGE_BUS_Idle_Active Delay time from BGE to bus active 15 50 ns tBGE_BUS_Active_Idle Delay time from BGE to bus idle 11 50 ns tBUS_Idle_Active Differential bus voltage transition time: idle to active 5 30 ns tBUS_Active_Idle Differential bus voltage transition time: active to idle 2 30 ns tTxEN_timeout TxEN timeout 4.9 15 ms www.austriamicrosystems.com/flexray/AS8221 |tTxEN_BUS_Idle_Active tTxEN_BUS_Active_Idle| 1.5 Revision 1.4 8 - 41 AS8221 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 3. Electrical Characteristics Symbol Parameter Conditions Min Typ Max Units RBP, RBM BP, BM input resistance Idle mode; RBUS=∞ 10 25 40 KΩ RDIFF BP, BM differential input resistance Idle mode; RBUS=∞ 20 50 80 KΩ VBPidle, VBMidle Idle voltage in non-low-power modes on pin BP, BM Non-low-power modes; VTxEN = VIO Load on BM/BM: 40Ω || 100pF 0.4 * VCC 0.5 * VCC 0.6 * VCC V VBPidle_low, VBMidle_low Idle voltage in low-power modes on pin BP, BM Low-power modes Load on BM/BM: 40Ω || 100pF -0.2 0 +0.2 V IBPidle Absolute idle output current on pin BP -40V < VBP < 50V 0 2 7.5 mA IBMidle Absolute idle output current on pin BM -40V < VBM < 50V 0 2 7.5 mA IBPleak, IBMleak Absolute leakage current, when not powered VBP = VBM = 5V, VCC = 0V, VBAT = 0V; VIO = 0V 0 7 +25 µA VBUSActiveHigh Activity detection differential input voltage high Non-low-power modes; VRECEIVE_COM: -10V < (VBP, VBM) < 15V 150 225 400 mV VBUSActiveLow Activity detection differential input voltage low Non-low-power modes; VRECEIVE_COM: -10V < (VBP, VBM)< 15V -400 -225 -150 mV VData1 Data1 detection differential input voltage Pre-condition: activity already detected. Non-low-power modes; VRECEIVE_COM: -10V < (VBP, VBM)< 15V 150 225 300 mV VData0 Data0 detection differential input voltage Pre-condition: activity already detected. Non-low-power modes; VRECEIVE_COM: -10V < (VBP, VBM)< 15V -300 -225 -150 mV VDataErr Mismatch between Data0 and Data1 differential input voltage 2 x (⎜⎜VData0⎜- ⎜VData1⎜⎜) / (⎜VData0⎜+⎜VData1⎜) (see footnote 2) 10 % VRECEIVE_COM Max. common mode voltage range when receiving Non-low-power modes +15 V tBUS_RxD10 Delay from BUS to RxD negative edge CRxD = 15 pF (see footnote 3) 36 80 ns tBUS_RxD01 Delay from BUS to RxD positive edge CRxD = 15 pF 36 80 ns tBIT Bit time CRxD = 15 pF (see footnote 3) tRxD_ASYM Delay time from BUS to RxD mismatch CRXD=15 pF; |tBUS_RxD10- tBUS_RxD01| (see footnote 3) (see footnote 4) 0 5 ns tRxD_FALL Fall time RxD voltage 80% - 20% of VRxD; CRxD=15 pF (see footnote 3) 2 5 ns Receiver www.austriamicrosystems.com/flexray/AS8221 -10 (see footnote 3) Revision 1.4 54 ns 9 - 41 AS8221 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 3. Electrical Characteristics Symbol Parameter Conditions tRxD_RISE Rise time RxD voltage 20% - 80% of VRxD; CRxD=15 pF Min Typ Max Units 2 5 ns (see footnote 3) tBUSIdleDetection Idle detection time VBUS: 400mV → 0V 50 173 200 ns tBUSActivityDetection Activity detection time VBUS: 0V → 400mV 100 173 250 ns tBUSIdleReaction Idle reaction time VBUS: 400mV → 0V 50 192 300 ns tBUSActivityReaction Activity reaction time VBUS: 0V → 400mV 100 200 350 ns tBWU_D0 Data0 detection time in remote wake-up pattern -10V < (VBP, VBM) < 15V 1 2 4 µs tBWU_Idle Idle or Data1 detection time in remote wake-up pattern -10V < (VBP, VBM) < 15V 1 2 4 µs tBWU_Detect Total remote wake-up detection time -10V < (VBP, VBM) < 15V 48 73 140 µs VBWUTH Bus wake-up detection threshold -10V < (VBP, VBM) < 15V -300 -250 -150 mV VLWUTH Local wake-up detection threshold 2 2.8 4 V ILWUL Low level input current on local WAKE pin VBAT = 12V; VLWAKE = 2V for t < tLWUFilter -20 -10 -5 µA ILWUH High level input current on local WAKE pin VBAT = 12V; VLWAKE = 4V for t < tLWUFilter 5 11 20 µA tLWUFilter Local wake filter time 1 20 40 µs VBATTHH VBAT undervoltage recovery threshold 3.5 4 4.5 V VBATTHL VBAT undervoltage detection threshold 2.5 3 3.5 V VCCTHH VCC under-voltage recovery threshold 3.5 4 4.5 V VCCTHL VCC undervoltage detection threshold 2.5 3 3.5 V VIOTHH VIO undervoltage recovery threshold 1.25 1.6 2.0 V VIOTHL VIO undervoltage detection threshold 0.75 1.1 1.5 V tUV_DETECT Detection time for undervoltage at VBAT, VCC, VIO 100 300 700 ms tUV_REC Detection time for undervoltage recovery at VBAT, VCC, VIO 0.7 2 5 ms Wake-Up Detector Supply Voltage Monitor Bus Error Detection ITHL Absolute bus current for low current detection NORMAL mode, Transmitter enabled 5 mA ITHH Absolute bus current for high current detection NORMAL mode, Transmitter enabled 40 mA www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 10 - 41 AS8221 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 3. Electrical Characteristics Symbol Parameter Conditions Min Typ Max Units VSHORT Differential voltage on BP and BM for detecting short circuit between bus lines NORMAL mode, Transmitter enabled 225 mV tBUS_ERROR Bus error detection time NORMAL mode, Transmitter enabled 20 µs Over Temperature OTTH Over temperature threshold 150 171 180 ºC OTTL Over temperature hysteresis 10 13 20 ºC 0 0.15 0.8 V 0 5 µA 0.48 * VIO 0.7 * VIO V Power Supply Interface ΔVOINH High level voltage drop on INH1, INH2 IINH = 0.2mA, VBAT = 5.5V ⏐IIL⏐ Leakage current SLEEP mode, VINH = 0V Communication Controller Interface VTxDIH Threshold for detecting TxD as on logical high VTxDIL Threshold for detecting TxD as on logical low 0.3 * VIO 0.48 * VIO ITxDIH TxD high level input current 30 52 100 µA ITxDIL TxD low level input current -5 0 5 µA VTxENIH Threshold for detecting TxEN as on logical high 0.48 * VIO 0.7 * VIO V VTXENIL Threshold for detecting TxEN as on logical low 0.3 * VIO 0.48 * VIO ITxENIH TxEN high level input current -5 0 5 µA ITxENIL TxEN low level input current -100 -50 -30 µA VRxDOH RxD high level output voltage IRxD = -4mA, VIO = 5V VRxDOL RxD low level output voltage IRxD = 4mA, VIO = 5V V V 0.8 * VIO 0.9 * VIO 1.0 * VIO V 0.1 * VIO 0.2 * VIO V 0 Host Interface VSTBNIH Threshold for detecting STBN as on logical high VSTBNIL Threshold for detecting STBN as on logical low 0.3 * VIO 0.48 * VIO ISTBNIH STBN high level input current 30 52 100 µA ISTBNIL STBN low level input current -5 0 5 µA tSTBN_DEB_LP STBN de-bouncing time lowpower modes 0.1 1 40 µs tSTBN_DEB_NLP STBN de-bouncing time non-lowpower modes 0.1 1 2 µs VENIH Threshold for detecting EN as on logical high 0.48 * VIO 0.7 * VIO V VENIL Threshold for detecting EN as on logical low 0.3 * VIO 0.48 * VIO IENIH EN high level input current 30 50 100 µA IENIL EN low level input current -5 0 5 µA www.austriamicrosystems.com/flexray/AS8221 0.48 * VIO Revision 1.4 0.7 * VIO V V V 11 - 41 AS8221 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 3. Electrical Characteristics Symbol Parameter tEN_DEB_LP Conditions Min Typ Max Units EN de-bouncing time low-power modes 0.1 1 40 µs tEN_DEB_NLP EN de-bouncing time non-lowpower modes 0.1 1 2 µs VERRNOH ERRN high level output voltage IERRN = -4mA, VIO = 5V VERRNOL ERRN low level output voltage IERRN = 4mA, VIO = 5V 0.8 * VIO 0.9 * VIO 1.0 * VIO V 0.1 * VIO 0.2 * VIO V 0 Bus Guardian Interface VBGEIH Threshold for detecting BGE as on logical high 0.48 * VIO VBGEIL Threshold for detecting BGE as on logical low 0.3 * VIO 0.48 * VIO IBGEIH BGE high level input current 30 51 100 µA IBGEIL BGE low level input current -5 0 5 µA VRxENOH RxEN high level output voltage IRxEN = -4mA, VIO = 5V VRxENOL RxEN low level output voltage IRxEN = 4mA, VIO = 5V 0.7 * VIO V 0.8 * VIO 0.9 * VIO 1.0 * VIO 0 V 0.1 * VIO 0.2 * VIO V V Read Out Interface tRO_EN_ERRN Propagation delay falling edge EN to ERRN tRO_EN_TIMEOUT error-read-out timeout 1. 2. 3. 4. 25 2 4.5 µs 50 100 µs EN, STBN, ERRN, TxD, RxD, TxEN, BGE, RxEN, LWAKE, INH1, INH2: open Test condition: (VBP + VBM) / 2 = 2,5V) ± 5% For test signal (see Figure 17) Guaranteed at specified bit time tBIT www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 12 - 41 AS8221 Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics Figure 3. Bus Differential Voltage Figure 4. Bus Absolute Voltage Figure 5. Bus Differential Voltage Figure 6. Bus Differential Input Resistance www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 13 - 41 AS8221 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description The AS8221 is a FlexRay Transceiver operating as an interface between the Communication Controller and the wired bus lines. The AS8221 is designed to extend the application range for high speed and safety critical time triggered bus systems in an automotive environment. The drivers are short circuit protected against the positive and negative supply voltage to increase the robustness and reliability of automotive systems. The AS8221 operates at baudrates up to 10 Mbps. 8.1 Block Description The AS8221 consists of 9 functional blocks (see Figure 1): Table 4. Functional Blocks Functional Block Short Description Host Controller Interface (HCI) Digital interface between the Transceiver and the host controller (HC) The host interface comprises the read-out handler, which delivers failure and status information via the ERRN pin to the host controller. Communication Controller Interface (CCI) Digital interface between the Transceiver and the FlexRay communication controller (CC) Bus Guarding Interface (BGI) Digital interface between the Transceiver and the FlexRay bus guardian (BG) or monitoring circuitry. Power Supply Interface (PSI) The power supply interface consists of the voltage monitor (VM) with two analog inhibit outputs switching external voltage supplies. Internal Logic (IL) The digital signals from the functional blocks of the device are fed into the internal logic where the forwarding of FlexRay messages from analog side to digital interfaces and vice versa is done. The state machine is embedded in the Internal Logic and the handling of error, wake, and power-on flags is executed herein. Bus Failure Detector (BFD) Temperature Protection (TP) The bus failure detector is directly connected to the bus pins, in order to detect several external failure conditions which may occur on the bus. The temperature protection turns off the output driver when reaching the specified internal temperature in order to protect the device. Transmitter The transmitter provides the differential signalling according the FlexRay standard on the bus pins. Receiver Wake-Up Detector (WUD) The Receiver captures FlexRay valid signals at the bus pins and provides the received data streams to the Internal Logic. The wake-up detector recognizes valid wake-up frames on the bus, recognizes a wake signal on the local WAKE pin and signals valid wake-up events to the Internal Logic. 8.2 Events Transitions in order to change between the operation modes are possible only if events are detected. The device supports three type of events, events on the host controller interface (STBN, EN), detection of undervoltage or supply voltage recovery and wake events. Mode changes are only performed upon detected events. 8.3 Operating Modes The AS8221 provides the following operating modes: NORMAL: non-low-power mode RECEIVE-ONLY: non-low-power mode STANDBY: low-power mode GO-TO-SLEEP: low-power mode SLEEP: low-power mode www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 14 - 41 AS8221 Datasheet - D e t a i l e d D e s c r i p t i o n 8.3.1 NORMAL Mode In this mode the Transceiver is able to send and receive data signals on the bus. TxEN and BGE enables and disables the transmission of data streams. INH1 and INH2 outputs are set high. RxD reflects bus data and bus state. The error-read-out-mechanism is enabled. In NORMAL mode, the transmitter state can be selected as shown in the Table 5. In case the over-temperature flag is set the Transmitter will be disabled. The bus wires are terminated to VCC/2 via Receiver input resistances. Table 5. Transmitter State BGE TxEN TxD Transmitter state Bus State H L H Enabled Data1 (BP is driven high, BM is driven low) H L L Enabled Data0 (BP is driven low, BM is driven High) X H X Disabled Idle (BP and BM are not driven) L X X Disabled Idle (BP and BM are not driven) If the differential bus voltage is higher than VBUSActiveHigh or lower than VBUSActiveLow for a time longer than tBUSActivityDetection, then activity is detected on the bus (Bus = active), RxEN is switched to logical “low” and RxD is released. If, after the activity detection, the differential bus voltage is higher than VData1, RxD is high. If, after the activity detection, the differential bus voltage is lover than VData0, RxD is low. If the absolute differential bus voltage is lower than VBUSActiveHigh and higher than VBUSActiveLow for a time longer than tBUSIdleDetection, then idle is detected on the bus (Bus = idle), RxEN and RxD are switched to logical “high” 8.3.2 RECEIVE-ONLY Mode In RECEIVE-ONLY mode the Transmitter is disabled but the Receiver is active. 8.3.3 STANDBY Mode In this mode the Transceiver is not able to send and receive data signals from the bus, but the wake-up detector is active. The power consumption is significantly reduced with respect to the non-low-power operation modes. RxD and RxEN, reflects the negation of the wake-up flag. INH1 is set to high. If wake-up flag is set then INH2 is high, otherwise it is floating. The error-read-out-mechanism is not enabled. The bus wires are terminated to GND (bus state: Idle_LP). 8.3.4 GO-TO-SLEEP Mode In this mode the Transceiver has the same behavior as in STANDBY mode but if this mode is selected for a time longer than tSLEEP and the wake flag is cleared the device enters into the SLEEP mode. 8.3.5 SLEEP Mode In SLEEP mode only the bus wake and local wake detection is enabled. IN1 and INH2 are floating. 8.4 Non Operating Mode The AS8221 provides the following non operating mode: 8.4.1 POWER-OFF In this mode the Transceiver is not able to operate. RxD, RxEN are set to high and ERRN is set to low. INH1 and INH2 are floating. The bus wires are not connected to GND (bus state: Idle_HZ). www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 15 - 41 AS8221 Datasheet - D e t a i l e d D e s c r i p t i o n 8.5 Undervoltage Events The device monitors the following three voltage supplies: VBAT: Battery supply voltage VIO: Supply voltage for I/O digital level adaptation VCC: Supply voltage (+5V) 8.5.1 Undervoltage/Voltage Recovery VBAT If VBAT voltage falls below VBATTHL for a time longer than tUV_DETECT then the undervoltage VBAT flag is set and it is reset if VBAT exceeds the voltage threshold VBATTHH for a time longer than tUV_REC or in case a wake-up event has been detected. The flag can be set or reset in all the modes. 8.5.2 Undervoltage/Voltage Recovery VIO If VIO voltage falls below VIOTHL for a time longer than tUV_DETECT then the undervoltage VIO flag is set and it is reset if VIO exceeds the voltage threshold VIOTHH for a time longer than tUV_REC or in case a wake-up event has been detected. The flag can be set or reset in all the operation modes. The flag is automatically reset at POWER-OFF. 8.5.3 Undervoltage/Voltage Recovery VCC If VCC voltage falls below VCCTHL for a time longer than tUV_DETECT then the undervoltage VCC flag is set and it is reset if VCC exceeds the voltage threshold VCCTHH for a time longer than tUV_REC or in case a wake-up event has been detected. The flag can be set or reset in all operation modes. The flag is automatically reset at POWER-OFF. 8.6 Power On/Off Events Starting from POWER-OFF mode a power on event occurs in case VBAT undervoltage flag is reset. Starting from every operation mode a POWER-OFF event occurs in case VBAT and VCC undervoltage flags are set. 8.7 Wake-Up Events A wake-up event can be detected only in low-power modes. The wake-up flag is set if the remote or local wake flag is set. The wake-up flag is reset if both the remote and local wake-up flags are reset. The remote wake-up flag is set if a remote wake-up event occurs. The local wake-up flag is set if a local wake-up event occurs. The remote and local wake-up flags are reset entering a low-power mode from a non-low-power mode, entering NORMAL mode, whenever an undervoltage event occurs and at POWER-OFF. 8.7.1 Remote Wake-Up Event A remote wake-up event, only possible in low-power mode, consists in the reception of at least two consecutive wake-up symbols via the bus within tBWU_Detect. The wake-up symbol is defined as Data0 longer than tBWU_D0 followed by idle or Data1 longer than tBWU_Idle as in Figure 7 unless an undervoltage or wake-up event is present. Figure 7. Signal for Wake-up Pattern Recognition VBUS tBWU_D0 tBWU_Idle tBWU_D0 tBWU_Idle tBWU_Detect www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 16 - 41 AS8221 Datasheet - D e t a i l e d D e s c r i p t i o n 8.7.2 Local Wake-Up Event In all low-power modes, if the voltage on the WAKE pin falls below VLWUTH for longer than tLWFilter, a local wake-up event is detected. At the same time the biasing of the pin is switched to pull-down. If the voltage on the WAKE pin rises above VLWUTH for longer than tLWFilter, a local wake-up event is detected. At the same time the biasing of the pin is switched to pull-up. The pull up and down mechanism is active in low-power and non-low-power modes. Figure 8. WAKE Input Pin Behavior PULL UP PULL DOWN PULL UP WAKE tLWFilter tLWFilter VBAT RxD / RxEN VIO INH VBAT www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 17 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9 Application Information System Description. Note that the state diagram does not include all the transitions described in Table 7. Figure 9. State Diagram EN=0 WHILE (STBN=1) Normal Receive Only Input: Output: EN = 1 INH1 = 1 STBN = 1 INH2 = 1 Input: Output: EN = 0 INH1 = 1 STBN = 1 INH2 = 1 C EN=0 WHILE (STBN=0) OR UV_VCC Standby (U V_ V CC ) EN=1 WHILE (STBN=0) OR WAKE WHILE (EN=1 AND STBN=0) OR VREC_VCC WHILE (EN=1 AND STBN=0) BN ST ) =0 LE ) =0 D BN ) ST AN =0 0 D N BN N= ( E R =0 A ST O E D N L ) (E AN HI CC W LE OR N=0 _V E HI (E R UV W ( AK E T W L O IL E BA HI H _V W W EC IO VR IO _V _V C EC RE R V V HI IO W Timer = tSLEEP STBN=0 WHILE (EN=0) OR UV_VCC WHILE ILE UV_VCC (EN (V =1 A RE N C_ WH V D ILE OR CC ) STBN =1 (E N )T =1 HE AN N DS TB N= 1) VC Input: Output: EN = 0 INH1 = 1 STBN = 0 INH2 = float WAKE WHILE (EN=0 AND STBN=0) OR UV_VCC WHILE (EN=0 AND STBN=0) OR VREC_VCC WHILE (EN=0 AND STBN=0) OR WHILE (UV_VCC) UV_VBAT WHILE (UV_VCC) WH VREC_VBAT OR VREC_VCC EC _ KE STBN=1 WHILE (EN=0) OR WAKE WHILE (EN=0 AND STBN=1) OR VREC_VCC WHILE (EN=0 AND STBN=1) VR UV _V WAKE WHILE (EN=1 AND STBN=0) WA Go to Sleep Input: Output: EN = 1 INH1 = 1 STBN = 0 INH2 = float WAKE WHILE (EN=1 AND STBN=0) OR VREC_VBAT WHILE (EN=1 AND STBN=0) OR VREC_VIO WHILE (EN=1 AND STBN=0) STBN = 1 WHILE (EN=1) OR WAKE WHILE (EN=1 AND STBN=1) OR VREC_VBAT WHILE (EN=1 AND STBN=1) OR VREC_VIO WHILE (EN=1 AND STBN=1) STBN=1 WHILE (EN=1) STBN=0 WHILE (EN=1) EN=1 WHILE (STBN=1) Power Off Sleep Input: Output: EN = x INH1 = float STBN = 0 INH2 = float UV_VBAT WHILE (UV_VCC) OR UV_Vcc WHILE (UV_VBAT) STBN=1 WHILE (EN=0) OR WAKE WHILE (EN=0 AND STBN=1) OR VREC_VBAT WHILE (EN=0 AND STBN=1) OR VREC_VIO WHILE (EN=0 AND STBN=1) UV_VBAT THEN (RESET_WAKE) OR UV_VIO THEN (RESET_WAKE) From any State (except Power Off) (EN=0 OR EN=1) OR (STBN=1 OR STBN=0) WHILE (UV_VBAT OR UV_VIO) OR UV_VBAT OR UV_VIO OR UV_VCC OR VREC_VCC UV_VBAT: Undervoltage event and/or flag for VBAT supply voltage VREC_VIO: Voltage recovery event and/or flag for VIO supply voltage UV_VIO: Undervoltage event and/or flag for VIO supply voltage VREC_VCC: Voltage recovery event and/or flag for VCC supply voltage UV_VCC: Undervoltage event and/or flag for VCC supply voltage VREC_VBAT: Voltage recovery event and/or flag for VBAT supply voltage WAKE: Wake event and/or flag Prefix of “WHILE” is an event and suffix in brackets checks the flags or in case of EN and STBN the input condition. For example: VREC_VBAT WHILE (EN=0 AND STBN=0). After the event VBAT supply voltage recovery is detected, the transition is performed if EN and STBN are “low”. www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 18 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.1 Fail Silent Behavior 9.1.1 RxEN / BGE timeout In case no edges on RxEN and BGE within tTxEN_timeout are detected, the transmitter will stop transmitting the signals on RxD to the bus pins. 9.1.2 State Transitions due to Under Voltage Detection In case of VBAT or VIO undervoltage is detected, SLEEP mode will be entered regardless the status of EN and STBN. In case VCC undervoltage is detected, STANDBY mode will be entered regardless the status of EN and STBN. VBAT and VIO undervoltage detection have higher priority than VCC undervoltage detection. In case undervoltage at VBAT and VCC is detected, POWER-OFF mode is entered (bus state: Idle_HZ). 9.1.3 State Transitions due to Voltage Recovery Detection If the voltage recovers the device will enter the mode selected by the EN and STBN pins, in case no undervoltage is present at the other supply pins. Starting from the POWER-OFF, the device enters the state selected by the host input pins (EN, STBN) only if VBAT or VCC recovers (VBAT ≥ VBATTHH or VCC ≥ VCCTHH) while VIO is available (undervoltage flag of VIO flag not set). If the VIO undervoltage flag is set, the STANDBY mode will be entered. In both cases the Power-On flag is set. If VBAT ≤ VBATTHL and VCC ≤ VCCTHL the device will be in POWER-OFF state, thus the bus wires are not terminated (bus state: Idle_HZ). 9.2 Mode Transitions In case of power-off event, the device enters POWER-OFF regardless VIO undervoltage flag, wake-up flags and regardless the selection at the host input pins. Starting from the POWER-OFF the device enters STANDBY only in case a power on event occurs. Starting from every operating mode the device enters SLEEP in case VBAT or VIO undervoltage flag is set regardless the VCC undervoltage flag, the wake-up flag and the state of the host input pins. Starting from every operating mode except SLEEP the device enters STANDBY in case VCC undervoltage flag is set and VBAT and VIO undervoltage flags are not set, regardless the wake-up flag indication and the host input pins state. Starting from a low-power mode the device enters the operation mode indicated by the host input pins if a wake-up event occurs. In case all the undervoltage flags are reset the operation mode is selected by the wake-up flag and the host pins according to Table 6. Table 6. Pin Signalling and Operating Modes Inputs STBN H EN H OutPut Operation Mode NORMAL RxD L Bus = Data_0 H Bus = Idle or Data_1 L Bus = Data_0 ERRN NOT [Error flag] L Bus = Active H Bus = Idle L Bus = Active INH1 INH2 H H H H H L RECEIVE-ONLY L H GO-TO-SLEEP NOT [Wake-up flag] NOT [Wake-up flag] NOT [Wake-up flag] H Floating L L STANDBY NOT [Wake-up flag] NOT [Wake-up flag] NOT [Wake-up flag] H Floating L X SLEEP NOT [Wake-up flag] NOT [Wake-up flag] NOT [Wake-up flag] Floating Floating X X POWER-OFF H L H Floating Floating H Bus = Idle or Data_1 NOT [Error flag] RxEN H Bus = Idle Where: H = Digital level high, L = Digital level low, X = Do not care!, Floating = The analog output is not driven. www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 19 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Notes: 1. If GO-TO-SLEEP is selected for more than tSLEEP then the device will enter SLEEP only if the wake-up flag is not set otherwise it will remain in GO-TO-SLEEP. 2. If wake-up flag is set INH2=H otherwise INH2=floating. 3. Starting from SLEEP, if the wake-up flag is set, the device enters STANDBY regardless the host pins state and UV flags. Starting from SLEEP, if the wake-up flag is not set, the only operating mode that can be entered through host pins are the non-low-power modes. 9.2.1 Operating Mode Transitions Table 7. Transition Table Transition Start Point NORMAL Destination Under Voltage Flag VIO VBAT VCC Wake Flag Host Input STBN EN Remarks RECEIVE-ONLY S L L L X H (1) H→L STANDBY U L L (1) L→H (2) X→L H H GO-TO-SLEEP S L L L (2) X→L (1) H→L H U (1) L→H L L (2) X→L H H U L (1) L→H (2) X→L H H S L L L X H (1) L→H S L L L (2) X→L (1) H→L L U L L (1) L→H (2) X→L H L U (1) L→H L L (2) X→L H L U L (1) L→H L (2) X→L H L U L L (1) H→L L H H W L L (2) H→L (1) L→H H H S L L L X (1) L→H L U L L (1) H→L L H L W L L (2) H→L (1) L→H H L S L L L L L (1) L→H sleep timer enabled S L L L H L (1) L→H sleep timer disabled U L L (1) H→L L L H sleep timer enabled W L L (2) H→L (1) L→H L H sleep timer disabled U (1) L→H L L (2) X→L L L U (1) L→H L H L X X U L (1) L→H L (2) X→L L L W L L (2) X→L (1) L→H L L U L L (1) L→H (2) X→L L L U L L (1) H→L L L L S L L H L (1) L↔H X S L L H L X (1) L↔H SLEEP NORMAL RECEIVEONLY Event STANDBY SLEEP NORMAL RECEIVE-ONLY GO-TO-SLEEP STANDBY SLEEP STANDBY www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 sleep timer enabled 20 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 7. Transition Table Transition Start Point Destination NORMAL STANDBY GO-TO-SLEEP SLEEP GO-TO-SLEEP NORMAL RECEIVE-ONLY STANDBY SLEEP GO-TO-SLEEP SLEEP Event Under Voltage Flag VIO VBAT VCC S L L L S L L U L S Wake Flag Host Input Remarks STBN EN X (1) L→H H L X L (1) H→L L (1) L→H (2) X→L L H L L L L L H U (1) L→H L L (2) X→L L H U L (1) L→H L (2) X→L L H W L L L (1) L→H L H S L L L L (1) L→H H W (2) X→L (2) X→L (2) X→L (1) L→H H H U L (1) H→L L L H H U (1) H→L L L L H H S L L L L (1) L→H L W (2) X→L (2) X→L (2) X→L (1) L→H H H U L (1) H→L L L H L U (1) H→L L L L H L W (2) X→L (2) X→L (2) X→L (1) L→H L L U L (1) H→L L L L L U (1) H→L L L L L L U (1) H→L L H L X X W (2) X→L (2) X→L (2) X→L (1) L→H L H sleep timer disabled U L (1) H→L L L L H sleep timer disabled U (1) H→L L L L L H sleep timer disabled S X X X L X (1) L↔H S H L X L (1) L↔H X S L H L L (1) L↔H X S H H L L (1) L↔H X U X (1) L→H L L X X U (1) L→H X X L X X U L L (1) L↔H L X X t≥tSLEEP sleep timer disabled Note: S = transition forced via EN, STBN; U = transition forced via undervoltage or voltage recovery; W = transition forced via WAKE (1) Indicates the action, that initiates the transition (2) Indicates the consequence after performed transition (3) In case the wake flag is set, it is not possible to enter SLEEP mode through a Sleep command, requested by the host. (4) In case an undervoltage on VBAT and VCC is detected, the device enters the POWER-OFF state. www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 21 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.2.2 ERRN Signalling The ERRN signalling is shown in Table 8. Table 8. ERRN Signalling Supply Voltage Flag Event VIO RWAKE Flag LWAKE Flag L X L Host Command ERRN STBN EN X H H NOT [error flag] H X H L If rising edge at EN, then NOT [error flag] else L L L X H L If rising edge at EN, then NOT [error flag] else H L L L L X H L L L→H L X H→L L L→H L L X H→L L H L→H L X L L L→H H L X L H X X X X L 9.3 Loss of Ground Whenever a loss of ground is detected, the bus lines are switched Idle_HZ with the precondition that the host pins are open. Either error or no error can be indicated on the ERRN pin. 9.4 Error Flags 9.4.1 Undervoltage UVVBAT_DET: The VBAT undervoltage flag is set if the VBAT voltage falls below VBATTHL for longer than tUV_DETECT and is reset if the VBAT voltage reaches a voltage level higher than VBATTHH for longer than tUV_DETECT. UVVIO_DET: The VIO undervoltage flag is set if the VCC voltage falls below VCCTHL for longer than tUV_DETECT and is reset if the VCC voltage reaches a voltage level for longer than VCCTHH after tUV_DETECT. UVVCC_DET: The VCC undervoltage flag is set if the VIO voltage falls below VIOTHL for longer than tUV_DETECT and is reset if the VIO voltage reaches a voltage level higher than VIOTHH for longer than tUV_DETECT. 9.4.2 Bus Error (BUSERR) The bus error flag is set if 2 consecutive rising edges on the TxD pin without any rising edge on the RxD pin are detected or if 2 consecutive falling edges on the TxD pin without any falling edge on the RxD pin are detected. This flag is reset if a rising edge on the TxD pin is followed by a rising edge on RxD pin before the next TxD rising edge or if a falling edge on the TxD pin is followed by a falling edge on RxD pin before the next TxD falling edge. This flag can be set or reset only in NORMAL mode when the transmitter is enabled. The flag is reset at POWER-OFF. 9.4.3 Short Circuit between BP and BM (BP_BM) The BP_BM can only be set or reset in NORMAL mode while the driver is active (edge at TxEN) for a time longer than tBUS_ERROR. The flag is set if the absolute value of the differential voltage is lower than VSHORT for a time tBUS_ERROR. The flag is reset in POWER-OFF mode and if the set condition is not fulfilled. 9.4.4 Over Temperature (OT) This flag can only be set or reset in the non-low-power modes. The flag is set if the junction temperature exceeds OTTH and it is reset if the junction temperature falls below OTTL. 9.4.5 TxEN_BGE Timeout (TxEN_TO) This flag can only be set in NORMAL mode if the driver is enabled (TxEN is low and BGE is high) for a time longer than tTxEN_max. It is reset during transition on TxEN or BGE or if the device exits NORMAL mode. If the flag is set the driver is disabled. www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 22 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.4.6 Error Flag (ERROR) The ERROR is signalled on the ERRN pin according to Table 6 and Table 8. The flag is set if at least one of the error flags in chapters 9.4.2 to 9.4.5 is set. The flag will be reset if none of the flags in chapters 9.4.2 to 9.4.5 is set. 9.5 Status Flags 9.5.1 Local Wake Flag (LWAKE) See chapter 8.7 Wake-Up Events on page 16 9.5.2 Remote Wake Flag (RWAKE) see chapter 8.7 Wake-Up Events on page 16 9.5.3 Power on Flag (PWON) The PWON is set leaving the POWER-OFF state and it is reset entering a low-power mode after a non-low-power mode. 9.6 Error Flags and Status Flags Read-Out The readout mechanism consists of two information groups: 1. Error read-out 2. Status information read-out The read-out mechanism as serial transmission on Pin EN and ERRN: Table 9. Read-out Mechanism and Transceiver States State Enabled / Disabled NORMAL mode Enabled RECEIVE-ONLY mode Enabled STANDBY mode Disabled GO-TO-SLEEP mode Disabled SLEEP mode Disabled The error flags and the status flags can be read-out by applying a clock signal to pin EN in a non-low-power mode. A falling edge on pin EN starts the read-out loading the content of the error/status flag into the shift register and signaling the error flag on the ERRN pin. On the second falling edge the first flag (Bit 0) will be shifted out. The ERRN data is valid after tRO_EN_ERRN. If EN pin keeps on toggling after the last flag (Bit 15) the next flag again is Bit 0. The complete list of bits is shown in Table 10. If no transition is detected on pin EN for longer than tRO_EN_TIMEOUT the device enters the operation mode selected by the host pins. Figure 10. Timing of the Read-out Mechanism EN 50% VIO ERRN 50% VIO ERRN Bit 0 ERROR FLAG t < tRO_EN_TIMEOUT www.austriamicrosystems.com/flexray/AS8221 tRO_EN_ERRN Bit 1 Bit 2 ERRN t > tRO_EN__TIMEOUT Revision 1.4 23 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.6.1 Error and Status Flag Bit Order Table 10. Bit Order for the Read-out Sequence Bit Description Symbol Bit 0 Undervoltage VBAT detected UVVBAT_DET Bit 1 Undervoltage VIO detected UVVIO_DET Bit 2 Undervoltage VCC detected UVVCC_DET Bit 3 Bus error BUSERR Reserved Reserved Bit 10 Short circuit between BP and BM BP_BM Bit 11 Over temperature OT Bit 12 TxEN_BGE timeout TxEN_TO Bit 13 Local wake flag LWAKE Bit 14 Remote wake flag RWAKE Bit 15 Power on flag PWON Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 Bit 9 When the read-out mechanism is started, the first data information is the Bit 0 until Bit 15 is transmitted. Any re-initiation or repetitions is started with the first data Bit 0. 9.7 Bus Driver 9.7.1 Bus States Activity: The bus wires reflects the differential signal specified in chapter 9.9 Transmitter on page 26. Idle: The bus wires are terminated to VCC/2 via. receiver input resistances. Idle_LP: The bus wires are terminated to GND via receiver input resistances. Idle_HZ: The bus wires are not terminated to VCC/2 via. 1MΩ www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 24 - 41 Figure 11. Timing Diagram tTxD_BUS01 tTxD_BUS10 TxD 0.5 * VIO BGE 0.5 * VIO TxEN 0.5 * VIO tTxEN_BUS_Idle_Active tBGE_BUS_Idle_Active tTxEN_BUS_Active_Idle tBGE_BUS_Active_Idle Revision 1.4 300 mV 80 % tBUS_Idle_Active VBUS 30 mV 30 mV -300 mV -300 mV 20 % -300 mV tBUS_Active_Idle RxD 0.5 * VIO RxEN 0.5 * VIO tBUS_RxD01 tBUS_RxD10 tBUSIdleReaction tBUSActivityReaction tBUS01 tBUS10 AS8221 Transceiver Timing Datasheet - A p p l i c a t i o n I n f o r m a t i o n www.austriamicrosystems.com/flexray/AS8221 9.8 25 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.9 Transmitter The transmitter generates out of a digital input signal on TxD the FlexRay differential bus voltage. The transmitter is only active in NORMAL mode if BGE is on logical high and TxEN is on logical low. Figure 12. Transmitter Characteristics (TxD → BUS) VTxD 70% * VIO 30% * VIO Data1: x * tBIT Data0: x * tBIT tBUS01 tBUS01 VBUS tTxD_BUS01 tTxD_BUS10 VBUS_DIFF_D1 80% * VBUS_DIFF + VBUS_DIFF_Idle - VBUS_DIFF_Idle 20% * VBUS_DIFF VBUS_DIFF_D0 Data1: x * tBIT Data0: x * tBIT Figure 13. Transmitter Characteristics (TxEN → BUS) VTxEN 70% * VIO 30% * VIO < tTxEN_timeout < tTxEN_timeout VBUS tTxEN_BUS_Active_Idle tTxEN_BUS_Idle_Active tBUS_Active_Idle tBUS_Idle_Active VBUS_DIFF_D1 300 mV + VBUS_DIFF_Idle - VBUS_DIFF_Idle - 300 mV VBUS_DIFF_D0 www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 26 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 14. Timing Characteristics (BGE → BUS) VTxEN 70% * VIO 30% * VIO < tTxEN_timeout < tTxEN_timeout VBUS tTxEN_BUS_Active_Idle tTxEN_BUS_Idle_Active tBUS_Active_Idle tBUS_Idle_Active VBUS_DIFF_D1 300 mV - 300 mV + VBUS_DIFF_Idle - VBUS_DIFF_Idle VBUS_DIFF_D0 In NORMAL and RECEIVE-ONLY mode the transmitter drives on the bus Idle in case no data are transmitted. In STANDBY, GO-TO-SLEEP and SLEEP mode the transmitter drives Idle_LP on the bus pins. In POWER-OFF mode the bus pins shows Idle_HZ. 9.10 Receiver The Receiver generates from the FlexRay differential bus voltage a digital signal on the RxD and RxEN pins. RxD shows the data (Data0 and Data1) and RxEN shows the bus idle and activity status received on the bus pins. The Receiver is only active in NORMAL and RECEIVE-ONLY mode. Figure 15. Timing Characteristics of the Bus Signals to RxD and RxEN VBUS VBUS_ActiveHigh VData1 + VBUS_DIFF_Idle - VBUS_DIFF_Idle VBUS_ActiveLow VData0 Data0: x * tBIT Data1: x * tBIT VRxEN tBUSActivityReaction tBUSIdleReaction 70% * VIO 30% * VIO VRxD tBUS_RxD10 tBUS_RxD01 tRxD_RISE tRxD_FALL 70% * VIO 30% * VIO www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 27 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.10.1 Bus Activity and Idle Detection (only in NORMAL and RECEIVE-ONLY mode) If the absolute differential bus voltage is higher than VBUSActiveLow and less than VBUSActiveHigh for a time longer than tBUSIdleDetection, bus Idle is detected, RxEN and RxD are switched to logical high after a time tBUSIdleReaction. If the absolute differential bus voltage is higher than VBUSActiveHigh or lower than VBUSActiveLow for a time loner than tBUSActivitiyDetection, bus Activity is detected, RxEN is switched to logical low and RxD shows the detected bus data according to Table 11 after the time tBUSActivityReaction. Table 11. Logic Table for Receiver Bus Signal Detection Receiver Operation Mode Normal power modes (NORMAL and RECEIVE-ONLY mode) Bus Signals RxEN RxD Idle H H Data0 L L Data1 L H 9.10.2 Bus Data Detection (only in NORMAL and RECEIVE-ONLY mode) If, after activity detection the differential bus voltage is higher than VData1, RxD will be high after a time tBUS_RxD01. If, after activity detection the differential bus voltage is lower than VData0, RxD will be low after a time tBUS_RxD10. Figure 16. Receiver Characteristics (BUS → RxD, RxEN) VRxD VBUS VBUS VRxEN VBUS VBUS VBUS_ActiveLow VData0 Data0 Activity www.austriamicrosystems.com/flexray/AS8221 VBUS_ActiveHigh VData1 Idle Revision 1.4 Data1 Activity 28 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.10.3 Receiver Test Signal Figure 17. Receiver Test Signal VBUS 22 ns 22 ns 400mV 300mV -300mV -400mV tBIT RxD tBUS_RxD01 tBUS_RxD10 VBUS 22 ns 22 ns 400mV 300mV -300mV -400mV tBIT tBUS_RxD10 tBUS_RxD01 RxD www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 29 - 41 AS8221 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.11 Test Circuits Figure 18. Test Circuit for Automotive Transients ISO 7637 PULSE GENERATOR 12V or 42V 10uF +5V Transients in accordance with ISO7637: test pulses 1, 2, 3a, 3b, 4, 5 Test conditions: Normal mode bus idle, Normal mode bus active (TXD=5 MHz, TXEN=1kHz) 100nF 14 19 VBAT 4 VCC VIO 7 RxD 15pF AS8221 BP BM 1nF 18 CL RL 17 ISO 7637 PULSE GENERATOR 1nF Figure 19. Test Circuit for Dynamic Characteristics +12V 10uF +5V 100nF 14 19 VBAT VCC 4 VIO RxD AS8221 15pF BP BM www.austriamicrosystems.com/flexray/AS8221 7 Revision 1.4 18 17 RL CL 30 - 41 AS8221 Datasheet - A p p e n d i x 10 Appendix 10.1 FlexRay Functional Classes The AS8221 FlexRay Standard Transceiver has the following Bus Driver functional classes according the FlexRay Electrical Physical Layer Specification V2.1 Rev. B implemented: Functional Class: Chapter 8.13.1 “Bus Driver voltage regulator control” Functional Class: Chapter 8.13.2 “Bus Driver - Bus Guardian interface” Functional Class: Chapter 8.13.4 “Bus Driver logic level adaptation” 10.2 FlexRay Parameter Comparison The following table shows the comparison of conventions used in AS8221 datasheet and FlexRay Electrical Physical Layer Specification V2.1 Rev. B. Table 12. Comparison Table FlexRay Electrical Physical Layer Specification V2.1 Rev. B AS8221 Datasheet Symbol Parameter Name Description - Battery Supply Voltage (VBAT) - - - Supply Voltage (VCC) - - - Supply Voltage (VIO) - - - DC Voltage at EN, STBN, ERRN, TxD, RxD, TxEN, BGE, RxEN - - - DC Voltage on pin WAKE, INH1, INH2 - - - DC Voltage at BP and BM - - - Input current (latchup immunity) - - - Electrostatic discharge at bus lines BP, BM, VBAT, WAKE uESDExt ESD protection on pins that lead to ECU external terminals - Electrostatic discharge uESDint ESD on all other pins - Transient voltage on BP, BM - - - Transient voltage on VBAT - - - Total power dissipation (all supplies and outputs) - - - Storage temperature - - - Junction temperature - - - Package body temperature - - - Humidity non-condensing - - TAMB Ambient temperature T Ambient temperature VCC - VIO Difference of supplies - - IBAT VBAT current consumption - - ICC VCC current consumption - - Absolute Maximum Ratings Supply Voltage www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 31 - 41 AS8221 Datasheet - A p p e n d i x Table 12. Comparison Table FlexRay Electrical Physical Layer Specification V2.1 Rev. B AS8221 Datasheet Symbol Parameter Name Description IIO VIO current consumption - - tSTBN_RxD Delay STBN high to RxD high with wake flag set - - tSTBN_RxEN Delay STBN high to RxEN high with wake flag set - - tSLEEP_INH1 Delay STBN high to INH1 high - - tSTANDBY_INH2 Delay STBN high to INH2 high - - tSLEEP GO-TO-SLEEP hold time - - VBUS_DIFF_D0 Differential bus voltage low in NORMAL mode (Data0) uBDTxactive Absolute value of uBus while sending VBUS_DIFF_D1 Differential bus voltage high in NORMAL mode (Data1) uBDTxactive Absolute value of uBus while sending VBUS_DIFF Matching between Data0 and Data1 differential bus voltage in NORMAL mode - - VBUS_COM_D0 Common mode bus voltage in case of Data0 in non-low-power modes - - VBUS_COM_D1 Common mode bus voltage in case of Data1 in non-low-power modes - - ΔVBUS_COM Matching between Data0 and Data1 common mode voltage - - VBUS_DIFF_Idle Absolute differential bus voltage in idle mode uBDTxidle Absolute value of uBus, while Idle IBPBMShortMax IBMBPShortMax Absolute maximum current when BP is shorted to BM IBPBMShortMax IBMBPShortMax Absolute maximum output current when BP shorted to BM IBPGNDShortMax Absolute maximum current when BP is shorted to GND IBPGNDShortMax Absolute maximum output current when shorted to GND IBMGNDShortMax Absolute maximum current when BM is shorted to GND IBMGNDShortMax Absolute maximum output current when shorted to GND IBP-5VShortMax Absolute maximum current when BP is shorted to -5V IBP-5VShortMax Absolute maximum output current when shorted to -5V IBM-5VShortMax Absolute maximum current when BM is shorted to -5V IBM-5VShortMax Absolute maximum output current when shorted to -5V IBP27VShortMax Absolute maximum current when BP is shorted to 27V IBPBAT27VShortMax Absolute maximum output current when shorted to 27V IBM27VShortMax Absolute maximum current when BM is shorted to 27V IBMBAT27VShortMax Absolute maximum output current when shorted to 27V State Transitions Transmitter www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 32 - 41 AS8221 Datasheet - A p p e n d i x Table 12. Comparison Table FlexRay Electrical Physical Layer Specification V2.1 Rev. B AS8221 Datasheet Symbol Parameter Name Description IBP48VShortMax Absolute maximum current when BP is shorted to 48V IBPBAT48VShortMax Absolute maximum output current when shorted to 48V IBM48VShortMax Absolute maximum current when BM is shorted to 48V IBMBAT48VShortMax Absolute maximum output current when shorted to 48V tTxD_BUS01 Delay time from TxD to BUS positive edge dBDTx10 Transmitter delay, negative edge tTxD_BUS10 Delay time from TxD to BUS negative edge dBDTx01 Transmitter delay, positive edge tTxD_MISMATCH Delay time from TxD to BUS mismatch dTxAsym Transmitter delay mismatch | dBDTx10 - dBDTx01 | tBUS10 Fall time differential bus voltage dBusTx10 Fall time differential bus voltage (80% ® 20%) tBUS01 Rise time differential bus voltage dBusTx01 Rise time differential bus voltage (20% ® 80%) tTxEN_BUS_Idle_Active Delay time from TxEN to bus active dBDTxia Propagation delay idle ®active tTxEN_BUS_Active_Idle Delay time from TxEN to bus idle dBDTxai Propagation delay active ® idle tTxEN_MISMATCH Delay time from TxEN to bus mismatch dBDTxDM | dBDTxia - dBDTxai | tBGE_BUS_Idle_Active Delay time from BGE to bus active dBDTxia Propagation delay idle ® active tBGE_BUS_Active_Idle Delay time from BGE to bus idle dBDTXai Propagation delay active ® idle tBUS_Idle_Active Differential bus voltage transition time: idle to active dBusTxia Transition time idle ® active tBUS_Active_Idle Differential bus voltage transition time: active to idle dBusTxai Transition time active → idle tTxEN_timeout TxEN timeout - - RBP, RBM BP, BM input resistance RCM1, RCM2 Receiver common mode input resistance RDIFF BP, BM differential input resistance - - VBPidle, VBMidle Idle voltage in non-low-power modes on pin BP,BM uBias Bus bias voltage during BD_Normal mode VBPidle_low, VBMidle_low Idle voltage in low-power modes on pin BP, BM uBias Bus bias voltage during low-power modes IBPidle Absolute idle output current on pin BP - - IBMidle Absolute idle output current on pin BM - - IBPleak, IBMleak Absolute leakage current, when not powered iBPLeak, iBMLeak Absolute leakage current, when not powered Receiver www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 33 - 41 AS8221 Datasheet - A p p e n d i x Table 12. Comparison Table FlexRay Electrical Physical Layer Specification V2.1 Rev. B AS8221 Datasheet Symbol Parameter Name Description VBUSActiveHigh Activity detection differential input voltage high uBusActiveHigh Upper Receiver threshold for detecting activity VBUSActiveLow Activity detection differential input voltage low uBusActiveLow Lower Receiver threshold for detecting activity VData1 Data1 detection differential input voltage uData1 Receiver threshold for detecting Data_1 VData0 Data0 detection differential input voltage uData0 Receiver threshold for detecting Data_0 VDataErr Mismatch between Data0 and Data1 differential input voltage uData Mismatch of Receiver thresholds VRECEIVE_COM Maximum common mode voltage range when receiving uCM Common mode voltage range (with respect to GND) that does not disturb the receive function tBUS_RxD10 Delay from bus to RxD negative edge dBDRx10 Receiver delay, negative edge tBUS_RxD01 Delay from bus to RxD positive edge dBDRx01 Receiver delay, positive edge tBIT Bit time - - tRxD_ASYM Delay time from bus to RxD mismatch dRxAsym Receiver delay mismatch | dBDRx10 – dBDRx01 | tRxD_FALL Fall time RxD voltage dRxSlope Fall and rise time 20%-80% tRxD_RISE Rise time RxD voltage dRxSlope Fall and rise time 20%-80% tBUSIdleDetection Idle detection time dIdleDetection Filter-time for idle detection tBUSActivityDetection Activity detection time dActivityDetection Filter-time for activity detection tBUSIdleReaction Idle reaction time dBDRxai Idle reaction time tBUSActivityReaction Activity reaction time dBDRxia Activity reaction time tBWU_D0 Data0 detection time in remote wake-up pattern dWU0Detect Acceptance timeout for detection of a Data_0 phase in wake-up pattern tBWU_Idle Idle or Data1 detection time in remote wakeup pattern dWUIdleDetect Acceptance timeout for detection of a Idle phase in wake-up pattern tBWU_Detect Total remote wake-up detection time dWUTimeout Acceptance timeout for wake-up pattern recognition VBWUTH Bus wake-up detection threshold - - VLWUTH Local wake-up detection threshold - - Wake-Up Detector www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 34 - 41 AS8221 Datasheet - A p p e n d i x Table 12. Comparison Table FlexRay Electrical Physical Layer Specification V2.1 Rev. B AS8221 Datasheet Symbol Parameter Name Description ILWUL Low level input current on local WAKE pin - - ILWUH High level input current on local WAKE pin - - tLWUFilter Local wake filter time dWakePulseFilter Wake pulse filter time (spike rejection) - VBAT operating range VBAT = +6.5 to + 50V VBAT for WU detector Battery voltage required for wake-up detector operation Supply Voltage Monitor VBATTHH VBAT undervoltage recovery threshold - - VBATTHL VBAT undervoltage detection threshold uUVBAT Undervoltage detection threshold VCCTHH VCC undervoltage recovery threshold - - VCCTHL VCC undervoltage detection threshold uUVCC Undervoltage detection threshold VIOTHH VIO undervoltage recovery threshold - - VIOTHL VIO undervoltage detection threshold uUVIO Undervoltage detection threshold tUV_DETECT Detection time for undervoltage at VBAT, VCC, VIO dUVBAT, dUVCC, dUVIO Undervoltage reaction time tUV_REC Detection time for undervoltage recovery at VBAT, VCC, VIO - - ITHL Absolute bus current for low current detection - - ITHH Absolute bus current for high current detection - - VSHORT Differential voltage on BP and BM for detecting short circuit between bus lines - - tBUS_ERROR Bus error detection time - Detection only required while actively transmitting a data frame, error indication to host latest when transmission stops. OTTH Over temperature threshold - - OTTL Over temperature hysteresis - - Bus Error Detection Over Temperature www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 35 - 41 AS8221 Datasheet - A p p e n d i x Table 12. Comparison Table FlexRay Electrical Physical Layer Specification V2.1 Rev. B AS8221 Datasheet Symbol Parameter Name Description ΔVOINH High level voltage drop on INH1, INH2 - - | IIL | Leakage current - - VTxDIH Threshold for detecting TxD as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high VTxDIL Threshold for detecting TxD as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low ITxDIH TxD high level input current - - ITxDIL TxD low level input current - - VTxENIH Threshold for detecting TxEN as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high VTXENIL Threshold for detecting TxEN as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low ITxENIH TxEN high level input current - - ITxENIL TxEN low level input current - - VRxDOH RxD high level output voltage uVIO-OUT-HIGH Output voltage on a digital output, when in logical high state VRxDOL RxD low level output voltage uVIO-OUT-LOW Output voltage on a digital output, when in logical low state VSTBNIH Threshold for detecting STBN as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high VSTBNIL Threshold for detecting STBN as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low ISTBNIH STBN high level input current - - ISTBNIL STBN low level input current - - tSTBN_DEB_LP STBN de-bouncing time low-power modes - - tSTBN_DEB_NLP STBN de-bouncing time non-low-power modes - - VENIH Threshold for detecting EN as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high Power Supply Interface Communication Controller Interface Host Interface www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 36 - 41 AS8221 Datasheet - A p p e n d i x Table 12. Comparison Table FlexRay Electrical Physical Layer Specification V2.1 Rev. B AS8221 Datasheet Symbol Parameter Name Description VENIL Threshold for detecting EN as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low IENIH EN high level input current - - IENIL EN low level input current - - tEN_DEB_LP EN de-bouncing time low-power modes - - tEN_DEB_NLP EN de-bouncing time non-low-power modes - - VERRNOH ERRN high level output voltage uVIO-OUT-HIGH Output voltage on a digital output, when in logical high state VERRNOL ERRN low level output voltage uVIO-OUT-LOW Output voltage on a digital output, when in logical low state VBGEIH Threshold for detecting BGE as on logical high uVIO-IN-HIGH Threshold for detecting a digital input as on logical high VBGEIL Threshold for detecting BGE as on logical low uVIO-IN-LOW Threshold for detecting a digital input as on logical low IBGEIH BGE high level input current - - IBGEIL BGE low level input current - - VRXENOH RxEN high level output voltage uVIO-OUT-HIGH Output voltage on a digital output, when in logical high state VRXENOL RxEN low level output voltage uVIO-OUT-LOW Output voltage on a digital output, when in logical low state tRO_EN_ERRN Propagation delay falling edge EN to ERRN - - tRO_EN_TIMEOUT Error-read-out timeout - - Bus Guardian Interface Read Out Interface www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 37 - 41 AS8221 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 11 Package Drawings and Markings The device is available in a SSOP20 Package. Figure 20. Package Drawings and Dimensions AS8221 YYWWIXX Symbol A A1 A2 b c D E E1 e L L1 L2 R Θ N Min 0.05 1.65 0.22 0.09 6.90 7.40 5.00 0.55 0.09 0º Nom 1.75 7.20 7.80 5.30 0.65 BSC 0.75 1.25 REF 0.25 BSC 4º 20 Max 2.00 1.85 0.38 0.25 7.50 8.20 5.60 0.95 8º Notes: 1. Dimensions and tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters. Angles are in degrees. Marking: YYWWIXX. YY WW I XX Last two digits of the current year Manufacturing Week Assembly plant identifier Assembly traceability code www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 38 - 41 AS8221 Datasheet - R e v i s i o n H i s t o r y Revision History Revision Date Owner Description 1.0 Sep 01, 2009 First version 1.1 Sep 14, 2009 Made sentence corrections and converted the ‘Typ’ values of Table 3 in to standard format. No Technical Changes to the datasheet. Updated the ERRN Signalling Table 8. (no functional change) 1.2 Updated Ordering Information Table 13. May 13, 2010 Package Package Drawings and Markings 11 is added 1.3 July 16, 2010 hgl Updated Ordering Information Table 13. Oct 30, 2010 Updated the following: VBAT minimum voltage requirement in Electrical Characteristics, Error Flags, Error and Status Flag Bit Order. Nov 18, 2010 Updated Absolute Maximum Ratings on page 6, Package Drawings and Markings on page 38. Dec 15, 2010 Updated package body temperature under Absolute Maximum Ratings. 1.4 www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 39 - 41 AS8221 Datasheet - O r d e r i n g I n f o r m a t i o n 12 Ordering Information The devices are available as the standard products shown in Table 13. Table 13. Ordering Information Ordering Code Marking Description Delivery Form Package AS8221-ASSP AS8221 AS8221 FlexRay Standard Transceiver Tape & Reel in DryPack SSOP20 Note: All products are RoHS compliant and Pb-free. Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect Technical Support is available at http://www.austriamicrosystems.com/Technical-Support For further information and requests, please contact us mailto: [email protected] or find your local distributor at http://www.austriamicrosystems.com/distributor www.austriamicrosystems.com/flexray/AS8221 Revision 1.4 40 - 41 AS8221 Datasheet - C o p y r i g h t s Copyrights Copyright © 1997-2010, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. 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