INTEGRATED CIRCUITS AU5783 J1850/VPW transceiver with supply control function Objective specification 1999 May 11 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function FEATURES AU5783 DESCRIPTION • Supports SAE/J1850 VPW standard for in-vehicle class B The AU5783 is a line transceiver being primarily intended for in-vehicle multiplex applications. It provides interfacing between a J1850 link controller and the physical bus wire. The device supports the SAE/J1850 VPWM standard with a nominal bus speed of 10.4 kbit/s. For data upload and download purposes the 4X transmission mode is supported with a nominal bus speed of 41.6 kbit/s. The AU5783 provides protection against loss of ground conditions, thus ensuring the network will be operational in case of an electronic control unit loosing connection to ground potential. Low power operation is supported through provision of a sleep mode with very low power consumption. In addition an external voltage regulator can be turned off via the AU5783 transceiver to further reduce the overall power consumption. The voltage regulator will be activated again upon detection of bus activity or upon a local wake-up event. multiplexing • Bus speed 10.4 kbit/s nominal • Drive capability 32 bus nodes • Low RFI due to output waveshape function • Direct battery operation with protection against +40V load dump and 8 kV ESD • Bus terminals proof against automotive transients up to +100V/–150V and 8kV ESD • Power supply enable function • Very low sleep mode power consumption • 4X transmission mode (41.6 kbit/s) • Diagnostic loop-back mode • Thermal overload protection • 14-pin SOIC ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION TEMPERATURE RANGE VERSION AU5783D SO14 plastic small outline package; 14 leads; body width 3.9 mm; packed in tubes SOT108-1 –40 to +125 °C AU5783D-T SO14 plastic small outline package; 14 leads; body width 3.9 mm; shipped on tape and reel SOT108-1 –40 to +125 °C QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. VBAT.op Operating supply voltage 7 Tamb Operating ambient temperature range –40 VBAT.ld Battery voltage load dump, 1s VBOH Bus output voltage 250Ω < RL < 1.6 kΩ VBI Bus input threshold IBAT.lp Sleep mode supply current tP Propagation delay tr Bus output rise time 1999 May 11 TYP. 12 UNIT V +125 °C +40 V 6.5 8.0 V 3.55 4.2 V 90 µA 25 µs Tx to Rx 14 2 MAX. 16 µs Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function AU5783 BLOCK DIAGRAM BATTERY (+12V) BAT VOLTAGE TEMP. REFERENCE PROTECTION R/F Rs TX TX– OUTPUT BUFFER BUFFER BUS NSTB MODE Rld 4X/LOOP CONTROL Vcc (+5V) Rd 1.6V LOAD RX VOLTAGE Vbat LOAD SWITCH REFERENCE INH WAKE-UP LWAKE CONTROL AU5783 GND SL01224 Figure 1. Block diagram 1999 May 11 3 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function AU5783 PINNING Pin configuration FUNCTIONAL DESCRIPTION R/F 1 14 GND GND 2 13 N.C. 4X/LOOP 3 12 BUS NSTB 4 11 LOAD TX 5 10 INH RX 6 9 LWAKE N.C. 7 8 BAT AU5783 The AU5783 is an integrated line transceiver IC that interfaces an SAE/J1850 protocol controller IC to the vehicle’s multiplex bus line. It is primarily intended for automotive “Class B” multiplexing applications in passenger cars using VPW (Variable Pulse Width) modulated signals with a nominal transmission speed of 10.4 kbit/s. The device provides transmit and receive capability as well as protection to a J1850 electronic module. A J1850 link controller feeds the transmit data stream to the transceiver’s TX input. The AU5783 transceiver waveshapes the TX data input signal so as to minimize electromagnetic emission. The bus output signal features controlled rise & fall characteristic including rounded shape. A resistance being connected to the R/F control input sets the bus output slew rate. The LOAD output is connected to the physical bus line via an external load resistor Rld. The load resistor pulls the bus line to ground potential being the default state e.g. when no transmitter outputs an active state. This output ensures the J1850 network will not be affected by a potential loss of ground condition at an individual electronic control unit. SO14 SL01225 Figure 2. Pin configuration The AU5783 includes a bus receiver with filter function to minimize susceptibility against interference. The logic state of the J1850 bus signal is indicated at the RX output being connected to the J1850 link controller. Pin description SYMBOL PIN DESCRIPTION R/F 1 Rise/fall time control input; connect to ground potential via a resistor GND 2 Ground 4X/LOOP 3 Tx mode control input; low: normal mode; high: 4X mode; float: loopback NSTB 4 Network STandBy power control input; low: transmit function disabled (low power modes); high: transmit function enabled TX 5 Transmit data input; low: transmitter passive; high: transmitter active RX 6 Receive data output; low: active bus condition detected; high: otherwise N.C. 7 Not connected BAT 8 Battery supply input, 12V nominal LWAKE 9 Local wake-up input, edge sensitive INH 10 Activity indication flag (inhibit) output high side driver; e.g., to control a voltage regulator. Active high enables the regulator LOAD 11 Bus load in/output BUS 12 Bus line transmit/receive input/output, active high side driver N.C. 13 Not connected GND 14 Ground The AU5783 also provides advanced low-power modes to help minimize ignition-off power consumption of an electronic control unit. The bus receiver function is kept alive in the low-power modes. If an active state is being detected on the bus line this will be indicated via the RX output. By default the AU5783 enters the low-power standby mode when the mode control inputs NSTB and 4X/LOOP are not driven. Ignition-off current draw can be reduced further by turning off the voltage regulator being typically provided in an electronic control unit. This is supported by the activity indication function of the AU5783. In this application the activity indication flag INH will control external devices such as a voltage regulator. To turn-off the INH flag and thus the voltage regulator, the go to sleep command needs to be applied to the Network Standby power control input, e.g., NSTB = 0. The INH output is turned off after the sleep time-out period thereby, reducing the power consumption of an electronic control unit to an extremely low level. The activity indication flag INH will be turned on again upon detection of a remote wake-up condition (i.e. bus activity) or upon detection of a local wake-up condition or a respective command from the microcontroller. A local wake-up condition is detected when an edge occurs at the wake-up input LWAKE. The INH flag will also be turned on upon detection of a high input level at the mode control input NSTB. Activation of the INH output enables external devices e.g., a voltage regulator. This condition will power-up logic devices e.g., a microcontroller in order to perform appropriate action, e.g., activation of the AU5783 and the J1850 network. The AU5783 provides a high-speed data transmission mode where the bus output waveshape function is disabled. In this mode transmit signals are output as fast as possible thus allowing higher data rates, e.g. the so-called 4X mode with 41.6 kbit/s nominal speed. The AU5783 also provides a loop-back mode for diagnostic purpose, e.g. self-test of an electronic control unit. In loop-back mode the bus transmit and receive functions are disabled thus 1999 May 11 4 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function AU5783 voltage as well as typical automotive transients and electrostatic discharge. In addition, an over-temperature shutdown function with hysteresis is incorporated which protects the device under network fault conditions. In case of the die temperature reaching the trip point, the AU5783 will latch-off the transceiver function. The device is reset on the first rising edge on the TX input after a decrease in the junction temperature. essentially disconnecting an electronic control unit from the J1850 bus line. The TX signal is internally looped back to the RX output. The AU5783 features special robustness at its BAT and BUS pins hence the device is well protected for applications in the automotive environment. Specifically the BAT input is protected against 40V load dump and jump start condition. The BUS output is protected against wiring fault conditions e.g. short circuit to ground and battery Table 1. Control input summary Z = Input connected to high impedance permitting it to float. Typically accomplished by turning off the output of a microcontroller. X = Don’t care; The input may be at either logic level. NSTB 4X/LOOP TX Mode Bus transmitter BUS RX (out) INH 1 0 1 normal operation active high low high 1 0 0 normal operation passive float bus state, Note 2 high 1 1 1 4X transmit active high low high 1 1 0 4X transmit passive float bus state, Note 2 high 1 Z 1 loop-back passive float low high 1 Z 0 loop-back passive float high high 0 or Z X X standby (default state after power on), Note 1 off float bus state, Note 5 high 1 –> 0 X X go to sleep command, Note 4 off float bus state, Note 5 float, Note 3 0 or Z X X sleep, Note 4 off float bus state, Note 5 float NOTES: 1. After power-on, the AU5783 enters standby mode since the input pins NSTB and 4X/LOOP are assumed to be floating. In standby mode the voltage regulator is enabled via the INH output, and therefore power is supplied to the microcontroller. When the microcontroller begins operation it will normally set the control inputs NSTB high and 4X/LOOP to low state in order to start normal operation of the AU5783. 2. RX outputs the bus state. If the bus level is below the receiver threshold (i.e., all transmitters passive), then RX will be high. Otherwise, if the bus level is above the receiver threshold (i.e., at least one transmitter is active), then RX will be low. 3. INH is turned off after a time-out period. 4. For entering the sleep mode (e.g., to deactivate INH), the “Go To Sleep” command needs to be applied. The “Go To Sleep” command is a high-to-low transition on the NSTB input. When the “Go To Sleep” command is present, the INH flag is deactivated. This signal can be used to turn-off the voltage regulator of an electronic module. After the voltage regulator is turned off the microcontroller is no longer supplied and the NSTB input will be floating. The INH output will be set again upon detection of bus activity or occurrence of a local wake-up event. 5. In standby and sleep mode, the detection of a wake-up condition (e.g., high level on BUS) will be signalled on the output RX. 1999 May 11 5 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function AU5783 ABSOLUTE MAXIMUM RATINGS According to the IEC 134 Absolute Maximum System. Operation is not guaranteed under these conditions; all voltages are referenced to pin GND; positive currents flow into the IC; unless otherwise specified. SYMBOL PARAMETER CONDITIONS VBAT Voltage on pin BAT VBAT.ld Short-term supply voltage load dump, t < 1s VBAT.tr Transient voltage on pin BAT and pin LWAKE SAE J1113 test pulses 3A and 3B, Rwake > 9 kΩ VB0 Bus voltage VB1 VB.tr VWKE Voltage on pin LWAKE VWKR Voltage on pin LWAKE VINH MIN. MAX. UNIT +34 V +40 V –150 +100 V VBAT < 2V, Rld > 1.4 kΩ –16 +18 V Bus voltage VBAT > 2V, Rld > 1.4 kΩ –10 +18 V Transient bus voltage SAE J1113, test pulses 3A and 3B, coupled via C = 1 nF; Rld > 1.4 kΩ –150 +100 V –0.3 +14 V –16 +34 V DC voltage on pin INH –0.3 +14 V VI DC voltage on pins TX, RX, NSTB, 4X/LOOP, R/F –0.3 7.0 V ESDHBM1 ESD capability of pins BAT, BUS, LOAD and LWAKE Human body model, direct contact discharge, R = 1.5 kΩ, C = 100 pF, Rld > 1.4 kΩ; Rwake > 9 kΩ –8 +8 kV ESDHBM2 ESD capability of all pins Human body model, direct contact discharge, R = 1.5 kΩ, C = 100 pF –2 +2 kV Ptot Maximum power dissipation @ Tamb = +125 °C 205 mW ΘJA Thermal impedance with standard test PCB 120 °C/W Tamb Operating ambient temperature –40 +125 °C Tvj Operating junction temperature –40 +150 °C Tstg Storage temperature –40 +150 °C 1999 May 11 –0.3 via series resistor of Rwake > 9 kΩ 6 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function AU5783 DC ELECTRICAL CHARACTERISTICS 7V < VBAT < 16V; –40 °C < Tamb < +125 °C; 250W < RL < 1.6 kΩ; 1.4 kΩ < Rld < 12 kΩ; –2V < Vbus < +9V; NSTB = 5V; 4X/LOOP = 5V; Rs = 56 kΩ; RX connected to +5V via Rd = 3.9 kΩ; INH loaded with 100 kΩ to GND; LWAKE connected to BAT via 10 kΩ resistor; all voltages are referenced to pin 14 (GND); positive currents flow into the IC; typical values reflect the approximate average value at VBAT = 13V and Tamb = 25 °C; unless otherwise specified. PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT Pin BAT & thermal shutdown IBAT.sl Sleep mode supply current Note 6 90 µA IBAT.sb Standby mode supply current Note 6 210 µA IBAT.p Supply current; passive state TX = 0V; LWAKE = 0V 3 mA IBAT.wl Supply current; weak load TX = 5V, RL = 1.38 kΩ, Note 7 16 mA IBAT.fl Supply current; full load TX = 5V, RL = 250Ω 45 mA Tsd Thermal shutdown temperature Note 7 155 190 °C Thys Thermal shutdown hysteresis Note 7 5 15 °C Pins TX, NSTB Vih High level input voltage Vil Low level input voltage 2.7 Iihtx TX high level input current VTX = 5V Iihnstb NSTB high level input current VNSTB = 5V Iil Low level input current Vih V 0.9 V 50 200 µA 10 50 µA Vi = 0V –2 +2 µA High level input voltage (High Speed Mode) NSTB = 5V 2.7 Iih High level input current V4X = 5V, NSTB = 5V 50 200 µA Vilb Mid level input voltage (Loop back operation) NSTB = 5V 1.3 1.9 V Iilb Loopback mode input current NSTB = 5V –10 +10 µA Vil Low level input voltage (Normal Mode) NSTB = 5V +0.7 V –Iil Low level input current V4X = 0V, NSTB = 5V 50 200 µA –Iils Low level input current in standby and sleep mode V4X = 0V, NSTB = 0V –5 +5 µA Vi_wh Local wake-up high NSTB = 0V 3.9 Vi_Wl Local wake-up low NSTB = 0V 2.5 V –II_w Low level input current VLWAKE = 0V 5 25 µA –Ioh_inh INH high level output current VINH = VBAT – 1V; 4.9V < VBAT < 16V 120 500 µA –Iol_inh INH off-state output leakage VINH = 0V; NSTB = 0V –5 +5 µA Vbat_POR Power-on reset release voltage; Battery voltage threshold for setting INH output NSTB = 1V, BUS = 0V, VBAT = 3.5V, verify INH = 0; VBAT = 4.4V, verify INH = 1 3.5 4.4 V Vol_rx Low level output voltage IRX = 1.6 mA, BUS = 7V, all modes 0 0.45 V Iol_rx Low level output current VRX = 5V, BUS = 7V 2 20 mA Ioh_rx High level output leakage VRX = 5V, BUS = 0V, all modes –10 +10 µA Pin 4X/LOOP V Pin LWAKE V Pin INH Pin RX 1999 May 11 7 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function SYMBOL PARAMETER CONDITIONS MIN. AU5783 TYP. MAX. UNIT Pin BUS VBOh BUS voltage; active TX = 5V; Note 8 8.3V<VBAT < 16V; 250Ω < RL < 1.6kΩ 6.5 8.0 V VBOhl BUS voltage; low battery TX = 5V; Note 8 5.5V<VBAT < 8.3V; 250Ω < RL < 1.6kΩ VBAT –1.8 8.0 V –IBO.LIM BUS short circuit current TX = 5V; VBUS = –2V 35 100 mA –IBO.LK1 BUS leakage current; passive state TX = 0V; 0V < VBAT < 16V; –2V < VBUS < +9V –50 +50 µA –IBO.LK0, –IBO.LK5 BUS current with loss of battery VBAT < 2V; –2V < VBUS < +9V –50 +50 µA –IBO.LKLB0, –IBO.LKLB5 BUS leakage current; loop back mode TX = 0V or 5V; 0V<VBAT<16V; –2V < VBUS < +9V –50 +50 µA –ILOG BUS leakage current at loss of ground 0V < VBAT < 16V; see test circuit –20 +100 µA VBih Bus input high voltage 4X/LOOP = 5V and 4X/LOOP = 0V 4.2 VBil Bus input low voltage 4X/LOOP = 5V and 4X/LOOP = 0V VBhy Bus input hysteresis 4X/LOOP = 5V and 4X/LOOP = 0V 0.1 VBih_l Bus input high voltage at low battery 5.7V < VBAT < 7V, 4X/LOOP = 5V and 4X/LOOP = 0V 4.2 VBiL_L Bus input low voltage at low battery 5.7V < VBAT < 7V, 4X/LOOP = 5V and 4X/LOOP = 0V VBih_s Bus input high voltage in standby and sleep mode NSTB = 0V, 4X/LOOP = 5V and 4X/LOOP = 0V, 6V < VBAT < 16V VBil_s Bus input low voltage in standby and sleep mode NSTB = 0V, 4X/LOOP = 5V and 4X/LOOP = 0V, 6V < VBAT < 16V VBih_sl Bus input high voltage in standby and sleep mode at low battery NSTB = 0V, 4X/LOOP = 5V and 4X/LOOP = 0V , 4.5V < VBAT < 6V VBil_sl Bus input low voltage in standby and sleep mode at low battery NSTB = 0V, 4X/LOOP = 5V and 4X/LOOP = 0V , 4.5V < VBAT < 6V 1/ (V 2 BAT Vld Load output voltage Ild = 2mA 0.2 V Vldoff Load output voltage unpowered Ild = 6mA, VBAT = 0V 1 V V 3.55 V 0.5 V V VBAT – 3.5V 4.2 V 2.2 1/ 2 V V (VBAT + 2.4) V – 1.6) V Pin LOAD NOTES: 6. TX = 0V; NSTB = 0V; 7V < VBAT < 13V; Tj < 125°C; –1V < VBUS < 1V; LWAKE connected to BAT via 10kΩ; INH not connected. 7. This parameter is characterized but not subject to production test. 8. For VBAT < 8.3V the bus output voltage is limited by the supply voltage. For 16V < VBAT < 27V the load is limited by the package power dissipation ratings. The duration of the latter condition is recommended to be less than 2 minutes. 1999 May 11 8 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function AU5783 DYNAMIC CHARACTERISTICS 7V < VBAT < 16V; –40°C < Tamb < +125°C; –2V < Vbus < +9V; 1.4 kΩ < Rld < 12 kΩ BUS: 250 Ω < RL < 1.6 kΩ; 3nF < CL < 17nF; 1.7 µs < (RL * CL) < 5.2 µs Bus load A: RL = 1.38 kΩ, CL = 3.3 nF; Bus load B: RL = 300Ω, CL = 16.5 nF R/F pin: Rs = 56 kΩ; INH loaded with 100 kΩ and 30pF to GND RX pin: Rd = 3.9 kΩ to 5V; CL = 30pF to GND; NSTB = 5V; 4X/LOOP = 0V Typical values reflect the approximate average value at VBAT = 13V and Tamb = 25°C; unless otherwise specified. NSTB and 4X/LOOP rise and fall times < 10 ns. SYMBOL CTX PARAMETER TX input capacitance CONDITIONS MIN. Note 9 TYP. MAX. UNIT 15 pF INH output function tinhoff INH turn–off delay BUS = 0V, LWAKE = VBAT or 0V, goto sleep command, measured from NSTB = 0.9V to INH = 3.5V 20 200 µs tinhonl LWAKE to INH turn–on delay NSTB = 0V, BUS = 0V, measured from LWAKE = 3V to INH = 3.5V 8 100 µs tinhonr BUS to INH turn–on delay sleep mode, LWAKE = VBAT, measured from BUS = 3.875V to INH = 3.5V 8 40 µs BUS output function tBOon; tBOoff Delay TX to BUS rising and falling edge from TX = 2.5V to BUS = 3.875V; bus load A and bus load B 13 22 µs tBrA Bus voltage rise time bus load A, 9V < VBAT < 16V, measured at 1.5V and 6.25V 11 18 µs tBrB Bus voltage rise time bus load B, 9V < VBAT < 16V, measured at 1.5V and 6.25V 11 18 µs tBfA Bus output voltage fall time bus load A, 9V < VBAT < 16V, measured at 1.5V and 6.25V 11 18 µs tBfB Bus output voltage fall time bus load B, 9V < VBAT < 16V, measured at 1.5V and 6.25V 11 18 µs tir Bus output current rise time bus load B connected to –2V, 9V < VBAT < 16V, measured at 20% and 80% of load capacitor current 4 µs tif Bus output current fall time bus load B connected to –2V, 9V < VBAT < 16V, measured at 20% and 80% of load capacitor current 4 µs twBh BUS high pulse width TX = high for 64 µs, bus load condition A, measured at BUS = 3.875V, 9V < VBAT < 16V 61.3 BHRM Bus output voltage harmonic content; normal mode f = 530kHz to 1670kHz, bus load B connected to –2V, TX = 7.81kHz, 50% duty cycle, 9V < VBAT < 16V, Note 9 tBO4Xon; tBO4Xoff TX to BUS delay in 4X mode 4X/LOOP = 1V, bus load B, 9V < VBAT < 16V, from TX = 1.8V to BUS = 3.875V tpon; tpoff Delay TX to RX rising and falling edge in normal mode tplbon; tplboff Delay TX to RX rising and falling edge in loop-back mode 1999 May 11 66.7 µs 70 dBµV 0.5 4 µs measured from 1.8V on TX to 2.5V on RX 13 25 µs NSTB = 5V, 4X = floating, measured from 1.8V on TX to 2.5V on RX 13 25 µs 9 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function SYMBOL PARAMETER AU5783 CONDITIONS MIN. TYP. MAX. UNIT BUS input function 2 µs NSTB = 5V, measured at 10% and 90% of waveform 1 µs RX output transition time in standby and sleep mode, rising and falling edge NSTB = 0V, measured at 10% and 90% of waveform 5 µs BUS to RX delay in sleep and standby modes NSTB = 0, LWAKE = VBAT, measured from BUS = 3.875V to RX = 2.5V 40 µs tDRXon; tDRXoff BUS input delay time, rising and falling edge measured from VBUS = 3.875V to VRX = 2.5V ttRX RX output transition time, rising and falling edge ttRXsl tDRXsl 0.2 8 NOTES: 9. This parameter is characterized but not subject to production test. TEST CIRCUITS 5.1V INH 100k R/F 56k TX GND NSTB AU5783 S1 4X/LOOP BUS RX 1uF 1.5k LOAD 10.7k S2 BAT S3 + LWAKE 3.9k I_LOG V_bat 10k SL01226 NOTE: 10. Check I_LOG with the following switch positions: 1. S1 = open = S2 2. S1 = open, S2 = closed 3. S1 = closed, S2 = open 4. S1 = closed = S2 Figure 3. Test circuit for loss of ground condition 1999 May 11 10 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function AU5783 APPLICATION INFORMATION µC with J1850 Link Controller +5V VCC VPWO VPWI port port 3.9 k 5V Reg. Rb 1k TX NSTB RX Ra 10 k 100 nF 4X/LOOP +12V BAT AU5783 Transceiver LWAKE INH GND LOAD BUS R/F 10.7 k 56 k 1% 1% Rs Rld 47 uH 470 pF SAE/J1850/VPW BUS LINE SL01227 NOTES: 11. Value of Rld depends, e.g., on type of bus node. Example: secondary node Rld =10.7k, primary node Rld =1.5k. 12. For connection of the NSTB and 4X/LOOP pins there are different options, e.g., connect to a port pin or to VCC or to active low reset. Figure 4. Application of the AU5783 transceiver 1999 May 11 11 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function SO14: plastic small outline package; 14 leads; body width 3.9 mm 1999 May 11 12 AU5783 SOT108-1 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function NOTES 1999 May 11 13 AU5783 Philips Semiconductors Objective specification J1850/VPW transceiver with supply control function AU5783 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 05-99 Document order number: 1999 May 11 14 9397 750 06021