Features • General – – – – – – – – Serial ATA Rev.1.0a Compliant Gen1 Physical Layer 150 MHz Frequency Synthesizer for ASIC Clock Generation Built-in Transmission PLL Circuits Parallel 10b interface Optional 20-bit Transmit Data (Two 10-bit 8b/10b Encoded Characters) Bi-directional TBC (Transmit Byte Clock) 25 MHz Crystal Oscillator Read/Write Serial Port Interface to Program Transmission and Receive Characteristics – Power Monitor for Glitch-free Power Off/On Cycles – Power Management Modes: PARTIAL, SLUMBER, STOP – Loop-back Test Modes – Device Status to Link Layer – Low-power Consumption, about 100 mW (Core, Typical) – Operates at 1.8V Supply Voltage • Transmitter – Transmission Speed of 1.5 Gb/s Differential NRZ Serial Stream – Provides a 100Ω Matched Differential Termination at the Transmitter – Serialize 10-bit or 20-bit Parallel Input from Link Layer – Spread-spectrum Modulation for TX PLL Clock with +0/-0.5% Slow Frequency Variation Over a 33.33 µs Up/Down Triangular Wave Period – DC or AC Coupled to SATA Cable – Pre-emphasis Control Via Serport • Receiver – 1.5 Gb/s Differential NRZ Serial Stream – 100Ω Matched Differential Termination at Receiver – Passive Equalization in Receive Input Buffer – Extract Data and Clock from Serial Stream – De-serialize Serial Stream into 10-bit or 20-bit Parallel Data – Detection of K28.5 Comma Character to Provide Word Aligned 10-bit or 20-bit Parallel Output – Squelch Detector – OOB Signal Detection for COMWAKE, COMINIT/COMRESET – DC or AC Coupled to SATA Cable – Built-in Clock Recovery PLL for De-serializer and Decoder Circuits – Accommodates Spread Spectrum Clocked Data in CDR (Clock & Data Recovery) Serial ATA Physical Layer AT78C5081 Summary Overview The AT78C5081 is a stand-alone Serial ATA physical layer that is designed based on SATA Standard revision 1.0a. The parallel interface to the link layer is based on a 10bit interface in both rising and falling edges of the clock. The device also accepts two 10-bit 8b/10b encoded transmit characters in parallel and latches them on the rising edge of TBC. The serialized data is transmitted onto the TXP/TXN differential outputs at a baud rate twenty times that of the TBC frequency. The device also samples serial data received on the RXP/RXN differential inputs, recovers the clock and data, deserializes it into one or two 10-bit receive characters in parallel. The recovered clock is sent out at one twentieth of the incoming data rate. The receiver includes the squelch detector, out of band (OOB) signal detector, and is capable of detecting “Comma” characters. This transceiver contains on-chip PLLs circuitry for synthesis of the transmitting clock and extraction of the clock from the received serial stream. The transmit PLL is also responsible for link layer reference clock generation (ASIC_CK). The circuit requires only one external component, the reference resistor. An additional onchip serial port interface is employed to adjust the performance of certain blocks or to 3527AS–NETST–10/04 Note: This is a summary document. A complete document is available under NDA. For more information, please contact your local Atmel sales office. configure the circuit in certain test modes. The PHY is transparent to SATA traffic and as a result does not perform scrambling/descrambling, encoding/decoding, or run time disparity check. It does not respond to SATA primitives. Block Diagram TOE TX_ENABLE XIN XOUT COMMA_DETECT REALIGN 2 Serial Port Interface MODE REG TESTCTL ASIC_CK Generator Bandgap Reference AMUX OOB Control STATUS Serial to Parallel COMMA Detect POR CDR_CK[1:0] CDR_DATA[1:0] Clock & Data Recovery RREF TEST_CK Squelch RX_MUX RBCN RBC RX_DATA[19:0] VREF IREF Oscillator CDR_REF_CK RX_LOCKED RX_ERROR TXP TXN PLL DTEST_OUT PARTIAL SLUMBER STOP RESET RX_TEST TX_TEST Linedriver SSC Modulator ASIC_CK[1:0] SDEN SCLK SDATA TX_MUX TX_CK PLL_LOCK TBC TX_DATA[1:0] Parallel to Serial READY SYNC TX_DATA[19:0] Equalizer ATEST COMWAKE COMRI SLV RXP RXN RX_DATA[1:0] AT78C5081 3527AS–NETST–10/04 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80 Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. 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