FDG361N N-Channel 100V Specified PowerTrenchMOSFET General Description Features These N-Channel 100V specified MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain low gate charge for superior switching performance. • 0.6 A, 100 V. RDS(ON)= 500 mΩ @ VGS = 10 V RDS(ON)= 550 mΩ @ VGS = 6.0 V • Low gate charge (3.7nC typical) • Fast switching speed These devices have been designed to offer exceptional power dissipation in a very small footprint for applications where the bigger more expensive SO-8 and TSSOP-8 packages are impractical. • High performance trench technology for extremely low RDS(ON) Applications • Load switch • Battery protection • Power management S D D 1 6 2 5 3 4 G D Pin 1 D SC70-6 Absolute Maximum Ratings Symbol TA=25oC unless otherwise noted Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage ID Drain Current PD Power Dissipation for Single Operation – Continuous Units 100 V ±20 V (Note 1a) 0.6 A (Note 1a) 0.42 (Note 1b) 0.38 – Pulsed TJ, TSTG Ratings 2.0 Operating and Storage Junction Temperature Range W −55 to +150 °C Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 300 °C/W RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) 333 °C/W Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity .61 FDG361N 7’’ 8mm 3000 units 2001 Fairchild Semiconductor Corporation FDG361N Rev C(W) FDG361N August 2001 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = 250 µA,Referenced to 25°C VDS = 80 V, VGS = 0 V 10 µA IGSSF Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –20 V, VDS = 0 V –100 nA 4 V On Characteristics 100 V 105 mV/°C (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = 250 µA,Referenced to 25°C ID(on) On–State Drain Current VGS = 10 V, ID = 0.6 A ID = 0.6 A VGS = 6 V, VGS = 10 V, ID = 0.6 A, TJ = 125°C VGS = 10 V, VDS = 10 V gFS Forward Transconductance VDS = 5V, ID = 0.6 A 3.6 VDS = 50 V, f = 1.0 MHz V GS = 0 V, 153 pF 5 pF 1 pF 2 2.6 –5 370 396 685 mV/°C 500 550 976 mΩ 2 A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) tf Qg Total Gate Charge Qgs Gate–Source Charge Qgd Gate–Drain Charge (Note 2) 8 16 ns 4 8 ns Turn–Off Delay Time 11 20 ns Turn–Off Fall Time 6 12 ns 3.7 5 nC VDD = 50 V, VGS = 10 V, VDS = 50 V, VGS = 10 V ID = 1 A, RGEN = 6 Ω ID = 0.6 A, 0.8 nC 1 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 0.4 A 0.8 (Note 2) 0.4 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 300°C/W when 2 mounted on a 1in pad of 2 oz copper. b) 333°C/W when mounted on a minimum pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDG361N Rev C(W) FDG361N Electrical Characteristics FDG361N Typical Characteristics 1.6 4 VGS = 10V ID, DRAIN CURRENT (A) 6.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 5.0V 4.5V 3 4.0V 2 1 VGS = 4.0V 1.4 4.5V 1.2 5.0V 6.0V 10V 1 0.8 0 0 2 4 6 0 8 1 Figure 1. On-Region Characteristics. 3 4 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.25 2.6 ID = 0.6A VGS =10V 2.2 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) 1.8 1.4 1 0.6 0.2 -50 -25 0 25 50 75 100 125 ID = 0.3A 1 TA = 125oC 0.75 0.5 TA = 25oC 0.25 150 2 4 6 8 10 o TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 IS, REVERSE DRAIN CURRENT (A) 6 ID, DRAIN CURRENT (A) VDS = 5V 4.5 3 o TA = 125 C 25oC 1.5 -55oC VGS = 0V 1 TA = 125oC 0.1 25oC -55oC 0.01 0.001 0.0001 0 1.5 2.5 3.5 4.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5.5 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDG361N Rev C(W) FDG361N Typical Characteristics 200 ID = 0.6A VDS = 30V 8 70V 6 4 150 100 50 2 COSS CRSS 0 0 0 1 2 3 4 0 10 Qg, GATE CHARGE (nC) P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT 100µs 1ms 10ms 100m 1s 0.1 DC VGS = 10V SINGLE PULSE RθJA = 333oC/W 0.01 o TA = 25 C 0.001 0.1 1 10 40 50 100 1000 10 SINGLE PULSE RθJA = 333°C/W TA = 25°C 8 6 4 2 0 0.0000 0.0001 1 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 30 Figure 8. Capacitance Characteristics. 10 1 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. ID, DRAIN CURRENT (A) f = 1MHz VGS = 0 V CISS 50V CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA RθJA = 333°C/W 0.2 0.1 0.1 0.05 0.02 0.01 P(pk) t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDG361N Rev C(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H3