PANJIT PJ4812_09

PJ4812
30V N-Channel Enhancement Mode MOSFET
SOIC-08
FEATURES
• RDS(ON), VGS@10V,IDS@8A=17mΩ
• RDS(ON), [email protected],IDS@6A=34mΩ
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Specially Designed for DC/DC Converters
• Fully Characterized Avalanche Voltage and Current
• Pb free product : 99% Sn above can meet RoHS environment
substance directive request
MECHANICALDATA
• Case: SOIC-08 Package
• Terminals : Solderable per MIL-STD-750D,Method 1036.3
• Marking : 4812
PIN Assignment
8
7
6
5
1
2
3
4
1. Source 1
2. Gate 1
3. Source 2
4. Gate 2
5. Drain 2
6. Drain 2
7. Drain 1
8. Drain 1
ABSOLUTE MAXIMUM RATINGS (TC=25oC unless otherwise noted )
PARAMETER
SYMBOL
VALUE
UNIT
Drain-Source Voltage
VDS
30
V
Gate-Source Voltage
VGS
+20
V
ID
8
A
Pulsed Drain Current (1)
I DM
32
A
Avalanche Energy
L=0.1mH,I D=8A,VDD=25V
EAS
3.2
mJ
Continous Drain Current
Power Dissipation
TC=25oC
TC=25oC
o
TC=75 C
Operating Junction and Stroage Temperature Range
Junction-to-Ambient Thermal Resistance (PCB Mounted)2
PD
2.4
W
1.2
TJ,TSTG
-55 to +175
RΘJA
62.5
o
o
C
C/W
Note : 1. Maximum DC current limited by the package
2. Surface mounted on FR4 board, t < 10 sec
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
December 01.2009-REV.00
PAGE . 1
PJ4812
E L E C T R IC A L C H A R A C T E R IS TIC S ( T C = 2 5 o C , U n l e s s O t h e r w i s e N o t e d )
PA RA M E TE R
S YM B O L
T E S T C O N D IT IO N S
M IN .
T YP.
MAX.
U N IT
30
-
-
V
1
-
3
V
-
15
17
mΩ
-
26
34
mΩ
V D S = 0 V , V GS = + 2 0 V
-
-
+10 0
nA
V DS= 2 4 V, V GS= 0 V
-
-
1
µA
V D S = 2 4 V , V GS = 0 V , T J = 1 2 5 oC
-
-
25
µA
V DS= 1 0 V,V GS= 1 0 V
8
-
-
A
10
-
-
S
-
7.0
-
nC
-
1 4.2
-
nC
-
1 .22
-
nC
S TA T IC
V (BR)D S S
V GS = 0 V, I
G a t e Thr e s ho ld Vo lt a g e
V GS (TH)
V D S = V GS , I
D r a i n - S o ur c e O n- s t a t e
R e s i s t a nc e
R D S ( ON)
D r a i n- S o ur c e B r e a k d o wn Vo lta g e
D=25 0µA
D=250µA
V GS= 1 0 V, I
V GS= 5 V,I
Gate-B ody Leakage
I
GS S
Ze ro Ga te Vo lta g e D ra i n
C ur r e n t
I
DSS
O n- S t a t e D r a i n C u r r e nt
I
F o r w a r d Tr a n s c o n d u c t a n c e
D (ON)
V DS= 5 V,I
g fs
D=8A
D=6 A
D=8 A
D YN A M IC
V D S = 1 5 V , V GS = 5 V , I
To t a l G a t e C h a r g e
D=8A
QG
V D S = 1 5 V , V GS = 1 0 V
I D=8A
G a t e -S o ur c e C ha rg e
Q GS
G a t e -D r a i n C ha rg e
QGD
-
3.44
-
nC
Tu r n - O n D e l a y Ti m e
td (o n)
-
7.8
-
nS
-
11 . 6
-
nS
-
28 .8
-
nS
tf
-
5.6
-
nS
Inp u t C a p a c i t a nc e
C IS S
-
520
-
pF
O ut p u t C a p a c i t a n c e
C OS S
-
11 2
-
pF
R e v e r s e Tr a n s f e r C a p a c i t a n c e
C RSS
-
98
-
pF
-
2.0
-
Ω
-
-
2.3
A
-
-
1.2
V
R i s e Ti m e
tr
Tu r n - O f f D e l a y Ti m e
td (off)
F a l l Ti m e
G a t e R e s i s ta nc e
Rg
V D S = 1 5 V , I D = 1 A , V GS = 1 0 V
R GS = 6 Ω
V GS = 0 V , V D S = 1 5 V
f=1 MHz
V GS = 1 5 m V , V D S = 0 V , f = 1 M H z
S O U R C E - D R A IN D IO D E R A T IN G S A N D C H A R A C T E R IS T IC S
C o n t i n u o us C u r r e n t
I
F o rwa rd Vo lta g e
S
I
V SD
F = 2 . 3 A , V GS = 0 V
NOTE : Plus Test: Pluse Width < 300us, Duty Cycle < 2%.
V DD
Switching
Test Circuit
V IN
V DD
Gate Charge
Test Circuit
RL
V GS
RL
V OUT
RG
1mA
RG
December 01.2009-REV.00
PAGE . 2
PJ4812
40
40
VGS= 10V, 6V
ID - Drain Source Current (A)
ID - Drain-to-Source Current (A)
Typical Characteristics Curves ( Ta=25℃
℃, unless otherwise noted)
5.0V
30
4.5V
20
4.0V
10
3.5V
3.0V
0
VDS =10V
30
20
TJ = 125oC
10
25oC
0
0
1
2
3
4
5
1.5
2
2.5
3
3.5
4
VGS - Gate-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
RDS(ON) - On-Resistance (mΩ
Ω)
RDS(ON) - On-Resistance (mΩ
Ω)
60
50
40
VGS = 5.0V
30
VGS=10.0V
20
10
0
0
10
20
4.5
Fig.2 Transfer Characteristric
Fig.1 Output Characteristric
30
90
ID =8A
80
70
60
125oC
50
40
30
20
TJ =25oC
10
0
40
2
4
6
8
VGS - Gate-to-Source Voltage (V)
ID - Drain Current (A)
Fig.3 On Resistance vs Drain Current
1.8
10
Fig.4 On Resistance vs Gate to Source Voltage
1000
VGS =10 V
ID =8.0A
1.6
C - Capacitance (pF)
RDS(ON) - On-Resistance(Normalized)
-55oC
1.4
1.2
1
0.8
0.6
-50
-25
0
25
50
75
100
125 150
TJ - Junction Temperature (oC)
Fig.5 On Resistance vs Junction Temperature
December 01.2009-REV.00
f = 1MHz
VGS = 0V
800
Ciss
600
400
Coss
200
Crss
0
0
5
10
15
20
25
VDS - Drain-to-Source Voltage (V)
Fig.6 Capacitance
PAGE. 3
PJ4812
Typical Characteristics Curves ( Ta=25℃
℃, unless otherwise noted)
100
VDS =15 V
ID =8.0A
8
VGS = 0V
IS - Source Current (A)
VGS - Gate-to-Source Voltage (V)
10
6
4
2
10
25oC
0.1
0.01
0
0
4
8
12
0.2
16
Fig. 7 Gate Charge Waveform
Vth - G-S Threshold Voltage (Normalized)
34
33
32
31
30
29
-50 -25 0 25 50 75 100 125 150
TJ - Junction Temperature (oC)
Fig.9 Breakdown Voltage vs Junction Temperature
December 01.2009-REV.00
0.6
0.8
1
1.2
1.4
Fig.8 Source-Drain Diode Forward Voltage
36
35
0.4
VSD - Source-to-Drain Voltage (V)
Qg - Gate Charge (nC)
BVDSS - Breakdown Voltage (V)
-55oC
TJ = 125oC
1
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
-50
-25
0
25
50
75
100 125 150
TJ - Junction Temperature (oC)
Fig.10 Threshold Voltage vs Junction Temperature
PAGE. 4
PJ4812
MOUNTING PAD LAYOUT
ORDER INFORMATION
• Packing information
T/R - 3K per 13" plastic Reel
LEGAL STATEMENT
Copyright PanJit International, Inc 2010
The information presented in this document is believed to be accurate and reliable. The specifications and information herein
are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its
products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit
does not convey any license under its patent rights or rights of others.
December 01.2009-REV.00
PAGE . 5