SHENZHENFREESCALE AON7934

AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
General Description
• Latest Trench Power AlphaMOS ( MOS LV) technologyα
• Very Low RDS(on) at 4.5VGS
• Low Gate Charge
• High Current Capability
• RoHS and Halogen-Free Compliant
Features
Q1
Q2
VDS
30V
30V
ID (at VGS=10V)
16A
18A
RDS(ON) (at VGS=10V)
<10.2mΩ
<7.7mΩ
RDS(ON) (at VGS = 4.5V)
<15.8mΩ
<11.6mΩ
Top View
100% UIS Tested
Bottom View
100% Rg Tested
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Max Q1
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current G
Units
V
±20
±20
V
16
18
12
14
64
72
13
15
7.8
9
ID
TC=100°C
Pulsed Drain Current C
IDM
TA=25°C
Continuous Drain
Current
Max Q2
IDSM
TA=70°C
30
A
A
Avalanche Current C
IAS
19
25
A
Avalanche Energy L=0.05mH C
EAS
3.0
4.1
mJ
VDS Spike
100ns
VSPIKE
36
36
V
Power Dissipation B
TC=100°C
TC=25°C
TA=25°C
Power Dissipation
A
PDSM
TA=70°C
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
1 / 10
23
25
9
10
2.5
2.5
0.9
0.9
PD
TJ, TSTG
Symbol
t ≤ 10s
Steady-State
Steady-State
RθJA
RθJC
-55 to 150
Typ Q1
40
70
4.5
Max Q1
50
90
5.4
Typ Q2 Max Q2
40
50
70
90
4.2
5
W
W
°C
Units
°C/W
°C/W
°C/W
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AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
Q1 Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
Drain-Source Breakdown Voltage
BVDSS
Conditions
Min
ID=250µA, VGS=0V
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VDS=0V, VGS= ±20V
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=250µA
RDS(ON)
Static Drain-Source On-Resistance
5
1.2
VGS=10V, ID=13A
TJ=125°C
VGS=4.5V, ID=10A
gFS
Forward Transconductance
VSD
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous CurrentG
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
VGS=0V, VDS=15V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge
Qgs
Gate Source Charge
Qgd
tD(on)
VGS=10V, VDS=15V, ID=13A
1.8
µA
100
nA
2.2
V
8.3
10.2
11.2
13.7
12.4
15.8
mΩ
1
V
16
A
50
0.7
mΩ
S
485
pF
235
pF
32
pF
1.8
2.7
Ω
8
11
nC
3.9
5.3
nC
1.1
nC
Gate Drain Charge
2.1
nC
Turn-On DelayTime
3.5
ns
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
IF=13A, dI/dt=500A/µs
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge IF=13A, dI/dt=500A/µs
Qrr
0.9
Units
V
1
TJ=55°C
VDS=5V, ID=13A
Max
30
VDS=30V, VGS=0V
IDSS
Coss
Typ
VGS=10V, VDS=15V, RL=1.2Ω,
RGEN=3Ω
2.8
ns
16.3
ns
3
ns
9.9
ns
nC
12.9
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on RθJA t≤ 10s value and the maximum allowed junction temperature of 150°C. The value in any given
application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is limited by package.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
2 / 10
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AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
Q1-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
80
60
10V
6V
VDS=5V
8V
50
4.5V
60
40
ID(A)
ID (A)
4V
40
3.5V
125°C
30
25°C
20
20
VGS=3V
10
0
0
0
1
2
3
4
5
0
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
2
3
4
5
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
1.6
Normalized On-Resistance
20
VGS=4.5V
15
RDS(ON) (mΩ
Ω)
1
10
VGS=10V
5
0
VGS=10V
ID=13A
1.4
1.2
VGS=4.5V
ID=10A
1
0.8
0
2
4
6
8
10
12
14
0
25
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
25
1.0E+02
ID=13A
1.0E+01
20
40
10
25°C
5
1.0E-01
25°C
1.0E-02
1.0E-03
1.0E-04
1.0E-05
0
2
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
3 / 10
125°C
125°C
15
IS (A)
RDS(ON) (mΩ
Ω)
1.0E+00
4
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
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AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
Q1-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
700
VDS=15V
ID=13A
600
Capacitance (pF)
VGS (Volts)
8
6
4
Ciss
500
400
300
Coss
200
2
Crss
100
0
0
0
2
4
6
8
Qg (nC)
Figure 7: Gate-Charge Characteristics
10
0
30
200
1000.0
160
100.0
RDS(ON)
limited
10.0
TJ(Max)=150°C
TC=25°C
10µs
100us
1ms
1.0
DC
Power (W)
ID (Amps)
5
10
15
20
25
VDS (Volts)
Figure 8: Capacitance Characteristics
120
TJ(Max)=150°C
TC=25°C
0.1
80
40
0.0
0
0.01
0.1
1
VDS (Volts)
10
100
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJC=5.4°C/W
1
PD
0.1
Ton
T
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
4 / 10
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AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
Q1-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
40
25
Current rating ID(A)
Power Dissipation (W)
30
20
15
10
30
20
10
5
0
0
0
25
50
75
100
125
TCASE (°
°C)
Figure 12: Power De-rating (Note F)
0
150
25
50
75
100
125
150
TCASE (°C)
Figure 13: Current De-rating (Note F)
10000
TA=25°C
Power (W)
1000
100
10
1
0.00001
0.001
0.1
10
1000
Pulse Width (s)
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)
Zθ JA Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJA=90°C/W
0.1
PD
0.01
Ton
Single Pulse
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)
5 / 10
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AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
Q2 Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
Drain-Source Breakdown Voltage
BVDSS
Conditions
Min
ID=250µA, VGS=0V
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VDS=0V, VGS= ±20V
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=250µA
RDS(ON)
Static Drain-Source On-Resistance
TJ=55°C
5
1.2
VGS=4.5V, ID=10A
9.1
11.6
100
0.7
Forward Transconductance
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous CurrentG
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Rg
Gate resistance
VGS=0V, VDS=15V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge
Qgs
Gate Source Charge
Qgd
tD(on)
V
7.7
gFS
Reverse Transfer Capacitance
nA
2.2
10.3
VSD
VGS=10V, VDS=15V, ID=15A
0.6
µA
100
6.3
VDS=5V, ID=15A
Crss
1.8
8.4
TJ=125°C
Units
V
1
VGS=10V, ID=15A
Output Capacitance
Max
30
VDS=30V, VGS=0V
IDSS
Coss
Typ
mΩ
mΩ
S
1
V
18
A
807
pF
314
pF
40
pF
1.3
2
Ω
12.9
17.5
nC
6
8.5
nC
2.1
nC
Gate Drain Charge
3
nC
Turn-On DelayTime
4.8
ns
3.3
ns
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
Qrr
Body Diode Reverse Recovery Charge IF=15A, dI/dt=500A/µs
VGS=10V, VDS=15V, RL=1Ω,
RGEN=3Ω
IF=15A, dI/dt=500A/µs
18.8
ns
3.3
ns
11.3
ns
nC
15
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA t≤ 10s value and the maximum allowed junction temperature of 150°C. The value in any given
application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
6 / 10
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AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
Q2-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
10V
60
8V
VDS=5V
5V
80
4.5V
60
4V
50
ID(A)
ID (A)
40
125°C
30
25°C
40
20
Vgs=3V
20
10
0
0
0
1
2
3
4
0
5
2
3
4
5
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
10
Normalized On-Resistance
1.6
9
VGS=4.5V
RDS(ON) (mΩ
Ω)
1
8
7
6
VGS=10V
5
VGS=10V
ID=15A
1.4
17
5
2
VGS=4.5V
ID=10A
10
1.2
1
0.8
4
0
3
0
6
9
12
15
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
25
50
75
100
125
150
175
0
Temperature (°C)
Figure 4: On-Resistance vs. Junction
18Temperature
(Note E)
20
1.00E+02
ID=15A
1.00E+01
40
125°C
10
5
125°C
1.00E+00
IS (A)
RDS(ON) (mΩ
Ω)
15
25°C
1.00E-01
1.00E-02
25°C
1.00E-03
0
2
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
7 / 10
4
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
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AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
Q2-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
1200
VDS=15V
ID=15A
1000
Capacitance (pF)
VGS (Volts)
8
6
4
2
Ciss
800
600
Coss
400
200
0
Crss
0
0
3
6
9
12
15
0
5
15
20
25
VDS (Volts)
Figure 8: Capacitance Characteristics
Qg (nC)
Figure 7: Gate-Charge Characteristics
30
200
1000.0
100.0
TJ(Max)=150°C
TC=25°C
160
10µs
RDS(ON)
limited
10.0
100µs
1ms
DC
1.0
Power (W)
ID (Amps)
10
120
TJ(Max)=150°C
TC=25°C
0.1
80
40
0.0
0
0.01
0.1
1
VDS (Volts)
10
100
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJC=5°C/W
40
1
PD
0.1
Single Pulse
Ton
T
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
8 / 10
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AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
Q2-CHANNEL: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
50
25
Current rating ID(A)
Power Dissipation (W)
30
20
15
10
40
30
20
10
5
0
0
0
25
50
75
100
125
150
0
25
50
75
100
125
TCASE (°
°C)
Figure 13: Current De-rating (Note F)
TCASE (°
°C)
Figure 12: Power De-rating (Note F)
150
10000
Power (W)
TA=25°C
1000
100
10
1
0.00001
0.001
0.1
10
Pulse Width (s)
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note G)
1000
Zθ JA Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=90°C/W
40
0.1
PD
0.01
Single Pulse
Ton
T
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 15: Normalized Maximum Transient Thermal Impedance (Note G)
9 / 10
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AON7934
30V Dual Asymmetric
N-Channel AlphaMOS
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
+ Vdd
DUT
Vgs
VDC
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
E AR = 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds Isd
Vgs
Ig
10 / 10
Vgs
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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