PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer Features Description ÎÎ3.3V supply voltage ± 5% The PI6LC4840 is an LC VCO based low phase noise design intended for the most demanding Ethernet applications. Common Ethernet frequencies of 25MHz and 125MHz are supported, with the 125Mhz having both LVDS and LVCMOS outputs for maximum flexibility. One 25Mhz LVCMOS non-PLL output is also available. ÎÎThree banks of outputs: àà Bank A: 3 25/50MHz pin selectable LVCMOS outputs àà Bank B: 3 125MHz LVCMOS outputs àà Bank C: 3 125MHz LVDS outputs ÎÎ1 25MHz LVCMOS reference clock output (no PLL) ÎÎ25MHz crystal input (SaRonix-eCera P/N FL2500029) ÎÎLow 1ps max 12k-20MHz integrated phase noise design (for 125MHz CMOS and LVDS outputs) ÎÎIndustrial temperature -40°C to 85°C ÎÎPackage (Pb-free & Green) àà 32-contact 5x5mm TQFN (ZH) Block Diagram Mode_1 = Pull-up Mode_0,2 = Pull-down 3 Mode [2:0] Control Logic LVCMOS - 25MHz or 50MHz ÷20 or ÷10 SaRonix-eCera FL2500029 QA1 25MHz X1 OSC X2 Phase Detector VDDO_QA QA0 QA2 VCO CMOS - 125MHz ÷4 VDDO_QB QB0 QB1 \M QB2 LVDS 125MHz QC1+ QC1- ÷4 MR QC2+ QC2- Pull-down LVCMOS - 25MHz 10-0249 VDDO_QC QC0+ QC0- 1 REF_Out www.pericom.com PS9076 01/03/11 PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer GND X2 X1 Mode_2 Mode_1 Mode_0 VDDA GND 32 31 30 29 28 27 26 25 Pin Configuration (32-contact TQFN) QC1- QA0 5 20 QC1+ QA1 6 19 QC0- QA2 7 18 QC0+ VDDO_QA 8 17 VDDO_QC VDDO_QB 16 21 GND 4 15 GND VDD QC2+ 14 22 MR 3 13 GND GND QC2- 12 23 QB2 2 11 REF_Out QB1 VDDO_QC 10 24 QB0 1 9 VDDO_REF Pinout Table Pin Number Pin Name I/O Type Description 1 VDDO_REF Power Reference Clock Output Buffer VDD 2 REF_Out Output 25MHz LVCMOS output from fundamental oscillator core 3 GND Power Ground 4 GND Power Ground 5 QA0 Output 25 or 50MHz selectable LVCMOS output (see table 1) 6 QA1 Output 25 or 50MHz selectable LVCMOS output (see table 1) 7 QA2 Output 25 or 50MHz selectable LVCMOS output (see table 1) 8 VDDO_QA Power VDD Buffer Power for Bank A 9 VDDO_QB Power VDD Buffer Power for Bank B 10 QB0 Output 125MHz LVCMOS output 11 QB1 Output 125MHz LVCMOS output 12 QB2 Output 125MHz LVCMOS output 13 GND Power Ground (Continued) 10-0249 2 www.pericom.com PS9076 01/03/11 PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer Pin Number Pin Name I/O Type Description 14 MR Input Master Reset Pin. During Reset, LVCMOS outputs are pulled low, QCx+ outputs are pulled low, QCx- outputs are pulled high. 15 VDD Power VDD for core 16 GND Power Ground 17 VDDO_QC Power VDD Buffer Power for Bank C 18 QC0+ Output 125MHz LVDS Output 19 QC0- Output 125MHz LVDS Output 20 QC1+ Output 125MHz LVDS Output 21 QC1- Output 125MHz LVDS Output 22 QC2+ Output 125MHz LVDS Output 23 QC2- Output 125MHz LVDS Output 24 VDDO_QC Power VDD Buffer Power for Bank C 25 GND Power GND 26 VDDA Power VDD for analog core 27 Mode_0 Input Combination of output enable and frequency select functionality, see Table 1. Internal pull-down. 28 Mode_1 Input Combination of output enable and frequency select functionality, see Table 1. Internal pull-up. 29 Mode_2 Input Combination of output enable and frequency select functionality, see Table 1. Internal pull-down. 30 X1 Input Crystal Input 31 X2 Output Crystal Output 32 GND Power GND 10-0249 3 www.pericom.com PS9076 01/03/11 PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer Function Table (Mode Pin) Output Frequency (MHz) Inputs Bank A Bank B Bank C Mode_2 Mode_1 Mode_0 QA0 QA1 QA2 QB0 QB1 QB2 QC0 QC1 QC2 0 0 0 25 - - - - - 125 - - 0 0 1 25 - - 125 - - 125 - - 0* 1* 0* 25 25 - - - - 125 125 - 0 1 1 25 25 25 125 125 125 125 125 125 1 0 0 50 - - - - - 125 - - 1 0 1 25 25 - 125 125 - 125 125 - 1 1 0 50 50 - - - - 125 125 - 1 1 1 - - - - - - - - - Notes: - Outputs left in high impedance mode * Default state 10-0249 4 www.pericom.com PS9076 01/03/11 PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested) Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Storage temperature............................................... -65ºC to +155ºC 3.3V Analog Supply Voltage...................................... -0.5 to +4.6V ESD Protection (HBM).......................................................... 2000V Operating Conditions (VDD = VDDO_QA = VDDO_QB = VDDO_QC = VDDO_REF = 3.3V ±5%, TA = -40°C to 85°C) Symbol Parameters VDD VDDA Conditions Min. Max. 3.3V Core Supply Voltage 3.135 3.465 3.3V for Analog VDD - 0.5 VDD 3.135 3.465 –40 85 VDDO_REF, VDDO_QA, Output Supply Voltage VDDO_QC, VDDO_QB TA Ambient Temperature IDD TOTAL Sum of all IDD currents flowing into IC 100 IDD Power Supply Current for VDD pin 15 15 IDDA Analog Supply Current 50 IDDO_QA Bank A LVCMOS Output Supply Current IDDO_QB Bank B LVCMOS Output Supply Current IDDO_QC LVDS Output Supply Current 25 IDDO_REF Reference Supply Current 1 PDISS Power Dissipation 0.35 10-0249 5 Outputs are unloaded 5 Units V °C mA 10 www.pericom.com PS9076 W 01/03/11 PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer LVCMOS DC Electrical Characteristics (VDD = VDDO_QA = VDDO_QB = VDDO_QC = VDDO_REF = 3.3V ±5%, TA = -40°C to 85°C) Symbol Parameters VIH Input High Voltage 2 VDD + 0.3 VIL Input Low Voltage -0.3 0.8 VOH Output High Voltage IOH = -12mA VOL Output Low Voltage IOL = 12mA 0.5 Mode_1, VIN = VDD = 3.465V(1) 10 Input High Current IIH Conditions Min. Typ. MR, Mode_2, Mode_0, MR, Mode_2, Mode_0, Input Low Current VDD = 3.465V Mode_1, VDD = 3.465V(1) Units V 2.6 150 VIN = VDD = 3.465V IIL Max. µA -5 -150 µA IOZ Tri-State output current Rpu Internal pull up resistance 55 kΩ Rdn Internal pull down resistance 55 kΩ ZO Output Impedance 38 Ω CIN Input Capacitance COUT Output Capacitance 1. With condition in Fig 2. 10 X1 5.5 X2 1.5 µA pF LVCMOS AC Characteristics (VDD = VDDO_QA = VDDO_QB = VDDO_QC = VDDO_REF = 3.3V ±5%, TA = -40°C to 85°C) Symbol Parameter Tr/Tf Output Rise/Fall time TDC Output Duty Cycle Jphase Integrated Phase Jitter tSK(0) Output-output skew tj Output period jitter 10-0249 Conditions Min. Typ. Max. 20% to 80%, CL = 15pF 2 50W load 1.15 tDC = tH/tCY, tH = High Pulse Width, tCY = Output Cycle Time, @ VDD/2 48 Units ns 52 % 12kHz - 20MHz @125MHz 0.35 1 ps 12kHz - 1MHz @25MHz 0.30 1 ps 637kHz - 62.5MHz @125MHz 0.50 1 ps Within a bank at the same supply and with equal load 45 ps Output Freq = 25MHz AND 50MHz 30 Output Freq = 125MHz 70 6 www.pericom.com PS9076 ps 01/03/11 PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer LVDS Output Characteristics (VDD = VDDO_QA = VDDO_QB = VDDO_QC = VDDO_REF = 3.3V ±5%, TA = -40°C to 85°C) Symbol Parameters Condition Min. Trise / Tfall Rise and Fall Time 20% to 80%, single-ended TDC Duty Cycle Differential Jphase Integrated phase jitter Tsk(o) Output to Output skew IOZ Typ. Max. Units 145 360 ps 48 52 % 12KHz-20MHz @ 125MHz 637kHz - 62.5MHz @125MHz (2) 0.45 1 0.45 1 Within a bank at the same supply and with equal load ps 35 ps Tri-state Output Current 10 µA TDIS Output Disable Time 50 TEN Output Enable Time 50 VOD Differential Output Voltage 300 575 mV VOS Offset Voltage 1.325 1.575 V PSRR Power Supply Rejection Ratio Modulation Power = -30dBm from 10k to 15M modulation freq. ns -50 dBc 2. Does not include 25MHz reference spur. 25MHz Crystal Characteristics (VDD = VDDO_QA = VDDO_QB = VDDO_QC = VDDO_REF = 3.3V ±5%, TA = -40°C to 85°C) Parameters Description FREQ Frequency ESR Equivalent Series Resistance Cload Load Capacitance Cshunt Shunt Capacitance 7 DRIVE Drive Level 0.65 10-0249 Min Typ Max. 25 MHz 50 18 7 Units www.pericom.com Ω pF mW PS9076 01/03/11 PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer 3.3V ±5% 3.3V ±5% Power Supply + Float GND - Z = 50Ω VDD VDDO_QC VDDA 3.3V ±5% Qx SCOPE VDD 50Ω LVDS nQx VDDO_QA VDDO_QC 50Ω 10Ω VDDA LVCMOS 15pF GND Figure 1. LVDS Output Load AC Test Circuit Figure 2. LVCMOS Output Load AC Test Circuit VDD VDD out DC Input LVDS 100Ω out VOD/∆ VOD DC Input 50Ω LVDS 50Ω out out Figure 3. Differential Output Voltage Setup (VOD) VOS/∆ VOS Figure 4. OffsetVoltage Setup (VOS) LVDS Buffer Z o = 50-Ohm 0.1µF Z o = 50-Ohm 0.1µF Agilent E5052A/ Wavecrest DTS-2079 Agilent 4402B 50Ω Figure 5. LVDS Test Circuit for Phase Noise, Period Jitter, and PSRR 10-0249 8 www.pericom.com PS9076 01/03/11 PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer Application Notes Crystal circuit connection The following diagram shows PI6LC4840 crystal circuit connection with a parallel crystal. For the CL=18pF crystal, it is suggested to use C1=27pF, C2=27pF. C1 and C2 can be adjusted to fine tune to the target ppm of crystal oscillator according to different board layouts. Crystal Oscillator Circuit XTAL_IN C1 27pF SaRonix-eCera GC250076B Crystal�(CL�=�18pF) XTAL_OUT C2 27pF 10-0249 9 www.pericom.com PS9076 01/03/11 PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer Packaging Mechanical: 32-Contact TQFN (ZH) 1 DATE: 03/19/09 DESCRIPTION: 32-contact, Thin Fine Pitch Quad Flat No-lead (TQFN) PACKAGE CODE: ZH (ZH32) REVISION: A DOCUMENT CONTROL #: PD-2070 09-0170 For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php Ordering Information Ordering Code Package Code Package Type PI6LC4840ZHE ZH Pb-free & Green, (TQFN) 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. E = Pb-free and Green 3. Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 10-0249 10 www.pericom.com PS9076 01/03/11