AT91SAM9260-EK Evaluation Board User Guide

AT91SAM9260-EK Evaluation Board
..............................................................................................
User Guide
AT91SAM9260-EK Evaluation Board User Guide
6234C–ATARM–22-Mar-07
Table of Contents
Section 1
Overview ............................................................................................... 1-1
1.1
1.2
1.3
Scope ........................................................................................................1-1
Deliverables ..............................................................................................1-1
AT91SAM9260-EK Evaluation Board .......................................................1-1
Section 2
Setting Up the AT91SAM9260-EK Board ............................................. 2-1
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Electrostatic Warning ................................................................................2-1
Requirements............................................................................................2-1
Layout .......................................................................................................2-2
Powering Up the Board .............................................................................2-3
Backup Power Supply ...............................................................................2-3
Getting Started ..........................................................................................2-3
AT91SAM9260-EK Block Diagram ...........................................................2-4
Section 3
Board Description ................................................................................. 3-1
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
AT91SAM9260 Microcontroller .................................................................3-1
AT91SAM9260 Block Diagram .................................................................3-4
Microcontroller...........................................................................................3-5
Memory .....................................................................................................3-5
Clock Circuitry ...........................................................................................3-5
Reset Circuitry...........................................................................................3-5
Shutdown Controller..................................................................................3-5
Power Supply Circuitry..............................................................................3-5
Remote Communication............................................................................3-5
Audio Stereo Interface ..............................................................................3-6
User Interface ...........................................................................................3-6
Debug Interface ........................................................................................3-6
Expansion Slot ..........................................................................................3-6
PIO Usage ................................................................................................3-7
Section 4
Configuration ........................................................................................ 4-1
4.1
4.2
4.3
4.4
4.5
4.6
AT91SAM9260-EK Evaluation Board User Guide
Jumpers ....................................................................................................4-1
JTAG/ICE ..................................................................................................4-2
Microcontroller Clock.................................................................................4-2
Memory .....................................................................................................4-2
Ethernet ....................................................................................................4-3
Miscellaneous ...........................................................................................4-3
i
6234C–ATARM–22-Mar-07
Table of Contents
Section 5
Schematics ........................................................................................... 5-1
5.1
Schematics ...............................................................................................5-1
Section 6
Errata .................................................................................................... 6-1
6.1
6.2
6.3
VDD Backup Jumper Selector (J10) .........................................................6-1
JTAGSEL S2 Footprint Selector ...............................................................6-1
TWI line pullups are too weak for Fast Mode operation............................6-1
Section 7
Revision History.................................................................................... 7-1
7.1
ii
6234C–ATARM–22-Mar-07
Revision History ........................................................................................7-1
AT91SAM9260-EK Evaluation Board User Guide
Section 1
Overview
1.1
Scope
The AT91SAM9260-EK evaluation kit enables the evaluation of and code development
for applications running on an AT91SAM9260 device.
This guide focuses on the AT91SAM9260-EK board as an evaluation platform.
The board supports the AT91SAM9260 in an LFBGA217 package as well as in a
PQFP208 package.
1.2
Deliverables
The AT91SAM9260-EK package contains the following items:
! an AT91SAM9260-EK board
! universal input AC/DC power supply with US and Europe plug adapter
! one A/B-type USB cable
! one serial RS232 cable
! one RJ45 crossed Ethernet cable
! one CD-ROM that allows the user to begin evaluating the AT91 ARM® Thumb® 32-bit
microcontroller quickly.
1.3
AT91SAM9260EK Evaluation
Board
The board is equipped with an AT91SAM9260 (217-ball LFBGA package) together with
the following:
! 64 Mbytes of SDRAM memory
! 256 Mbytes of NANDFlash memory
! one Atmel serial DataFlash®
! one Atmel TWI serial EEPROM
! one USB device port interface
! two USB Host port interfaces
! one DBGU serial communication port
! one complete MODEM serial communication port
AT91SAM9260-EK Evaluation Board User Guide
1-1
6234C–ATARM–22-Mar-07
Overview
! one additional serial communication port with RTS/CTS handshake control
! JTAG/ICE debug interface
! one PHY Ethernet 100-base TX with three status LEDs
! one Atmel AT73C213 Audio DAC
! one Power LED and one general-purpose LED
! two user input push buttons
! one Wakeup input push button
! one reset push button
! one DataFlash, SD/MMC card slot
! four expansion connectors (PIOA, PIOB, PIOC, IMAGE SENSOR)
! one BGA-like EBI expansion footprint connector
! one Lithium Coin Cell Battery Retainer for 12 mm cell size
1-2
6234C–ATARM–22-Mar-07
AT91SAM9260-EK Evaluation Board User Guide
Section 2
Setting Up the AT91SAM9260-EK
Board
2.1
Electrostatic
Warning
The AT91SAM9260-EK evaluation board is shipped in protective anti-static packaging.
The board must not be subjected to high electrostatic potentials. A grounding strap or
similar protective device should be worn when handling the board. Avoid touching the
component pins or any other metallic element.
2.2
Requirements
In order to set up the AT91SAM9260-EK evaluation board, the following items are
needed:
! the AT91SAM9260-EK evaluation board itself.
! AC/DC power adapter (5V at 2A), 2.1 mm by 5.5 mm
AT91SAM9260-EK Evaluation Board User Guide
2-1
6234C–ATARM–22-Mar-07
Setting Up the AT91SAM9260-EK Board
2.3
Layout
Figure 2-1. AT91SAM9260-EK Layout - Top View
2-2
6234C–ATARM–22-Mar-07
AT91SAM9260-EK Evaluation Board User Guide
Setting Up the AT91SAM9260-EK Board
Figure 2-2. AT91SAM9260-EK Layout - Bottom View
2.4
Powering Up the
Board
The AT91SAM9260-EK requires 5V DC (±5%). DC power is supplied to the board via
the 2.1 mm by 5.5 mm socket J1. Coaxial plug center positive standard.
2.5
Backup Power
Supply
The user has the possibility to plug a battery (3V Lithium Battery CR1225 or equivalent)
in order to permanently power the backup part of the device. In this case, J10 configuration must be set in position 1, 2.
Refer to Section 4.1.
2.6
Getting Started
The AT91SAM9260-EK evaluation board is delivered with a CD-ROM containing all necessary information and step-by-step procedures for working with the most common
development toolchains. Please refer to this CD-ROM, or to the AT91 web site,
http://www.atmel.com/products/AT91/, for the most up-to-date information on getting
started with the AT91SAM9260-EK.
AT91SAM9260-EK Evaluation Board User Guide
2-3
6234C–ATARM–22-Mar-07
5VDC
AT73C213
TXD1
RXD1
RTS1
CTS1
COM0
COM1
PA[0..31]
PB[0..31]
NRST
RMII_MII ETHERNET
05 - COMMUNICATION
03 - RMII_MII ETHERNET
NRST
MDC
MDIO
MDINTR
COL
CRS
TX_ER
RX_ER
RX_CLK
RX_DV
RXD3
RXD2
RXD1
RXD0
TXD3
TXD2
TXD1
TXD0
TX_EN
TX_CLK
ETX3
ETX2
ETX1
ETX0
ETXEN
ERX3
ERX2
ERX1
ERX0
ERXCK
ERXDV
ETXER
ERXER
ECOL
ECRS
EMDC
EMDIO
PIO
PA11
PA10
PA13
PA12
PA16
PA26
PA25
PA15
PA14
PA27
PA17
PA22
PA18
PA29
PA28
PA20
PA21
PA7
NRST
ETXCK/REFCLK
PA19
02 - AT91SAM9260
HDMB
HDPB
HDMB
HDPB
HOST B
DDM
DDP
HDMA
HDPA
PA[0..31]
PIO
PC[0..15]
DBGU_TXD
DBGU_RXD
SHDN
AT91SAM9260
HDMA
HDPA
PC5
PB6
PB7
PB28
PB29
PB4
PB5
PB26
PB27
PB24
PB22
PB23
PB25
PB15
PB14
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
SPI1_NPCS0
PB0
PB1
PB2
PB3
PB[0..31]
PCK0
TD0
TF0
TK0
PC[0..15]
PIO
PC1
PB18
PB17
PB16
PA9
HOST A
USBCNX
DDM
DDP
TXD0
RXD0
RTS0
CTS0
DTR0
DSR0
DCD0
RI0
DBGU
DEVICE
DTXD
DRXD
SERIAL INTERFACES
NRST
DOUT
DIN
CLK
CS
MCLK
SDIN
LRFS
BCLK
SHDN
POWERLED
01 - POWER SUPPLY
DAC
RS232
6234C–ATARM–22-Mar-07
USB
2-4
10/100 Mbps FAST ETHERNET
VREFP
AVDD
AGND
PC[0..15]
PB[0..31]
PA[0..31]
NRST
NCS0
CFOE_NRD
CFWE_NWE_NWR0
NANDOE
NANDWE
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
SDCK
SDCKE
RAS
CAS
SDA10
SDWE
SDCS_NCS1
D[0..31]
A[0..22]
PC[0..15]
PB[0..31]
PA[0..31]
NRST
D[0..31]
A[0..22]
TWCK
TWD
SPI0_SPCK
SPI0_NPCS1
SPI0_MISO MCDB0
MCDB1
MCDB2
SPI0_NPCS0 MCDB3
MCCK
SPI0_MOSI MCCDB
PIO
PIO
NANDOE
NANDWE
NBS1
NBS3
SDCK
SDCKE
RAS
CAS
SDA10
SDWE
SDCS_NCS1
PA24
PA23
NRST
PA2
PC11
PA0
PA5
PA4
PA3
PA8
PA1
D[0..15]
A22
A21
NANDOE
NANDWE
PC14
PC13
A16
A17
NBS1
NBS3
SDCK
SDCKE
RAS
CAS
SDA10
SDWE
SDCS_NCS1
A[0..14]
CARD
READER
SDRAM
06 - EXPANSION CONNECTORS
VREFP
AVDD
AGND
PC[0..15]
PB[0..31]
PA[0..31]
NRST
NCS0
NANDOE
NANDWE
CFWE_NWE_NWR0
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
CFOE_NRD
SDCK
SDCKE
RAS
CAS
SDA10
SDWE
SDCS_NCS1
A[0..22]
D[0..31]
EXPANSION & User's Interfaces
03 - MEMORY
SCL
SDA
NRST
SCK
CS
DAT0
DAT1
DAT2
DAT3
CLK
CMD
D[0..15]
CLE
ALE
NANDOE
NANDWE
NANDCS
RDYBSY
BA0
BA1
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
SDCK
SDCKE
RAS
CAS
SDA10
SDWE
SDCS_NCS1
A[0..14]
D[0..31]
MEMORY
2.7
SERIAL
SERIAL
MCI
EEPROM DATAFLASH DATAFLASH NANFLASH
POWER SUPPLY
Setting Up the AT91SAM9260-EK Board
AT91SAM9260EK Block
Diagram
Figure 2-3. AT91SAM9260-EK Block Diagram
AT91SAM9260-EK Evaluation Board User Guide
Section 3
Board Description
3.1
AT91SAM9260
Microcontroller
• Incorporates the ARM926EJ-S™ ARM® Thumb® Processor
– DSP Instruction Extensions, ARM Jazelle® Technology for Java® Acceleration
– 8-KByte Data Cache, 8-KByte Instruction Cache, Write Buffer
– 200 MIPS at 180 MHz
– Memory Management Unit
– EmbeddedICE™, Debug Communication Channel Support
• Additional Embedded Memories
– One 32-KByte Internal ROM, Single-cycle Access At Maximum Matrix Speed
– Two 4-KByte Internal SRAM, Single-cycle Access At Maximum Matrix Speed
• External Bus Interface (EBI)
– Supports SDRAM, Static Memory, ECC-enabled NANDFlash and CompactFlash®
• USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM
• USB 2.0 Full Speed (12 Mbits per second) Host Single Port in the 208-lead PQFP
Package and Double Port in 217-ball LFBGA Package
– Single or Dual On-chip Transceivers
– Integrated FIFOs and Dedicated DMA Channels
• Ethernet MAC 10/100 Base T
– Media Independant Interface or Reduced Media Independant Interface
– 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
• Image Sensor Interface
– ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate
– 12-bit Data Interface for Support of High Sensibility Sensors
– SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format
• Bus Matrix
– Six 32-bit-layer Matrix
– Boot Mode Select Option, Remap Command
• Fully-featured System Controller, including
– Reset Controller, Shutdown Controller
– Four 32-bit Battery Backup Registers for a Total of 16 Bytes
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timer
• Reset Controller (RSTC)
– Based on a Power-on Reset Cell, Reset Source Identification and Reset Output
AT91SAM9260-EK Evaluation Board User Guide
3-1
6234C–ATARM–22-Mar-07
Board Description
Control
• Clock Generator (CKGR)
– Selectable 32768Hz Low-power Oscillator or Internal Low Power RC Oscillator on
Battery Backup Power Supply, Providing a Permanent Slow Clock
– 3 to 20 MHz On-chip Oscillator, One up to 240 MHz PLL and One up to 130 MHz
PLL
• Power Management Controller (PMC)
– Very Slow Clock Operating Mode, Software Programmable Power Optimization
Capabilities
– Two Programmable External Clock Signals
• Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Three External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
• Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel, Programmable
ICE Access Prevention
• Periodic Interval Timer (PIT)
– 20-bit Interval Timer plus 12-bit Interval Counter
• Watchdog Timer (WDT)
– Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at
Slow Clock
• Real-time Timer (RTT)
– 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler
• One 4-channel 10-bit Analog-to-Digital Converter
• Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC)
– 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
– High-current Drive I/O Lines, Up to 16 mA Each
• Peripheral DMA Controller Channels (PDC)
• One Two-slot MultiMedia Card Interface (MCI)
– SDCard/SDIO and MultiMediaCard™ Compliant
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC
• One Synchronous Serial Controller (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation,
Manchester Encoding/Decoding
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Full Modem Signal Control on USART0
• Two 2-wire UARTs
• Two Master/Slave Serial Peripheral Interfaces (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– Synchronous Communications
• Two Three-channel 16-bit Timer/Counters (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
3-2
6234C–ATARM–22-Mar-07
AT91SAM9260-EK Evaluation Board User Guide
Board Description
– High-Drive Capability on Ouputs TIOA0, TIOA1, TIOA2
• One Two-wire Interface (TWI)
– Master, Multi-master and Slave Mode Operation
– General Call Supported in Slave Mode
– Connection to PDC Channel To Optimize Data Transfers in Master Mode Only
• IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
• Required Power Supplies:
– 1.65V to 1.95V for VDDBU, VDDCORE, VDDOSC and VDDPLL
– 3.0V to 3.6V for VDDIOP0, VDDIOP1 (Peripheral I/Os) and VDDANA (Analog to
Digital Converter)
– Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM (Memory I/Os)
• Available in a 208-lead PQFP and 217-ball LFBGA Package
AT91SAM9260-EK Evaluation Board User Guide
3-3
6234C–ATARM–22-Mar-07
AIC
DRXD
DTXD
PCK0-PCK1
DBGU
In-Circuit Emulator
I_
M
IS CK
I_
IS PC
I_ K
IS DO
I_ -I
V
IS SY SI_
I_ N D7
HS C
YN
C
HD
HD PA
M
A
HD
PB
HD
M
B
IS
10/100 Ethernet
MAC
ARM926EJ-S Processor
ICache
8 Kbytes
DCache
8 Kbytes
MMU
FIFO
I
Image
Sensor
Interface
USB
OHCI
DMA
DMA
D
PLLB
OSC
WDT
6-layer Matrix
6 x 100M x 32-bit words
PIT
4GPREG
RC
OSCSEL
XIN32
XOUT32
OSC
RTT
PIOA
SHDN
WKUP
VDDBU
POR
VDDCORE
POR
SHDC
ROM
32 Kbytes
PIOB
Fast SRAM
4 Kbytes
Fast SRAM
4 Kbytes
Peripheral
Bridge
PIOC
EBI
Peripheral
DMA
24-channel
CompactFlash
NAND Flash
RSTC
NRST
APB
MCI
PDC
TWI
PDC
USART0
USART1
USART2
USART3
USART4
USART5
PDC
SPI0
SPI1
PDC
TC0
TC1
TC2
TC3
TC4
TC5
SSC
PDC
DPRAM
4-channel
10-bit ADC
USB
Device
SPI0_, SPI1_
DD
DDM
P
NP
NPCS
NPCS3
NPCS2
C 1
SP S0
M CK
O
TC
M SI
IS
L
O
TI K0
O -T
TI A0- CL
O T K2
TC B0 IOA
L -T 2
TI K3 IOB
O TI A3 TC 2
O -T LK
B3 IO 5
-T A
IO 5
B5
TK
TF
TD
RD
RF
RK
AD
0A
AD D3
TR
IG
AD
VR
EF
VD
DA
NA
G
ND
AN
A
T
CT TWWD
RTS0- CK
C
SC S0- TS
R 3
RX K0- TS
S 3
TXD0- CK
D0 RX 2
-T D5
X
DSD5
DCR0
D
R0
DT I0
R0
-M
CD
CD MC B3
A0 CD
-M B
C
M DA
CC 3
D
M A
CC
K
B0
M
Static
Memory
Controller
ECC
Controller
Transceiver
CD
AT91SAM9260-EK Evaluation Board User Guide
SDRAM
Controller
PDC
M
Transc.
FIFO
DMA
Bus Interface
PLLA
Filter
S
Transc.
PDC
XIN
XOUT
BM
JTAG Selection and Boundary Scan
PMC
PLLRCA
ET
ETXC
K
ECXE -E
N R
ERRS -E XC
T
ERXE -EC XE K
R O
ET X0 -E L R
R
M X0 ER XD
D - X
M C ETX 3 V
DI
3
F1 O
00
SE
L
FIQ
IRQ0-IRQ2
JT
AG
NT
R
TD ST
TDI
TMO
TC S
RTK
CK
System
Controller
D0-D15
A0/NBS0
A1/NBS2/NWR2
A2-A15, A18-A20
A16/BA0
A17/BA1
NCS0
NCS1/SDCS
NRD
NWR0/NWE
NWR1/NBS1
NWR3/NBS3
SDCK, SDCKE
RAS, CAS
SDWE, SDA10
NANDOE, NANDWE
A21/NANDALE
A22/NANDCLE
D16-D31
NWAIT
A23-A24
NCS4/CFCS0
NCS5/CFCS1
A25/CFRNW
CFCE1-CFCE2
NCS2, NCS6, NCS7
NCS3/NANDCS
Figure 3-1. AT91SAM9260 Block Diagram
TST
AT91SAM9260
Block Diagram
SLAVE
Board Description
3.2
3-4
6234C–ATARM–22-Mar-07
MASTER
Board Description
3.3
Microcontroller
! One LFBGA 217-ball fitted on board
! One LQFP 208-lead footprint
To try the microcontroller in the LQFP package, the user has to unsolder MN4 and solder the PQFP208 microcontroller on the MN6 footprint.
3.4
Memory
! 32 Kbytes of Internal ROM
! Two 4-KByte Internal SRAM
! Atmel serial DataFlash
! 64 Mbytes of SDRAM memory (32-bit bus width)
! 256 Mbytes of NANDFlash memory (8-bit bus width)
! TWI serial EEPROM
3.5
Clock Circuitry
! 18.432 MHz standard crystal for the embedded oscillator
! Selectable 32768Hz Low-power external standard crystal Oscillator or Internal Low
Power RC Oscillator
3.6
Reset Circuitry
! Internal reset controller with bi-directional reset pin
! External reset pushbutton
3.7
3.8
Shutdown
Controller
! Programmable shutdown and Wake-Up
Power Supply
Circuitry
! On-board 1.8V High Efficiency step-down charge pump regulator with shutdown
control
! Wake-up push button
! On-board 3.3V linear regulator with shutdown control
3.9
Remote
Communication
! One serial interface (DBGU COM Port) via RS-232 DB9 male socket
! One complete modem serial interface (COM Port 0) via RS-232 DB9 male socket
! One additional serial interface (COM Port 1) with RTS/CTS handshake control via
RS-232 DB9 male socket
! USB V2.0 full-speed compliant, 12 Mbits per second (UDP)
! Two(1) USB Host ports V2.0 full-speed compliant, 12 Mbits per second (UHP)
! One Ethernet 100-base TX with three status LEDs
AT91SAM9260-EK Evaluation Board User Guide
3-5
6234C–ATARM–22-Mar-07
Board Description
3.10
3.11
Audio Stereo
Interface
! One Atmel stereo audio DAC (AT73C213)
User Interface
! Two user input pushbuttons(2)
! One 32 Ohm/20 mW Stereo Headset output (J4) with master volume and mute
controls
! One user green LED
! One yellow power LED (can be also software controlled)
3.12
Debug Interface
! 20-pin JTAG/ICE interface connector
! DBGU COM port
3.13
Expansion Slot
! One DataFlash, SD/MMC card slot
! All I/Os of the AT91SAM9260 are routed to peripheral extension connectors
! All I/Os of the AT91SAM9260 Image Sensor Interface are routed to peripheral
extension connectors
! All EBI Signals of the AT91SAM9260 are routed to extension footprint connectors
(J25)
This allows the developer to check the integrity of the components and to extend the
features of the board by adding external hardware components or boards.
Notes:
3-6
6234C–ATARM–22-Mar-07
1. Only one available with the 208-lead PQFP package.
2. Not available with the 208-lead PQFP package.
AT91SAM9260-EK Evaluation Board User Guide
Board Description
3.14
PIO Usage
Table 3-1. PIO Controller A
I/O Line
Peripheral A
Peripheral B
Comments
Function
PA0
SPI0_MISO
MCDB0
SPI DATAFLASH, SPI/MCI SD/MMC/DATAFLASH Slot
PA1
SPI0_MOSI
MCCDB
(PA0..PA5)
PA2
SPI0_SPCK
PA3
SPI0_NPCS0
MCDB3
PA4
RTS2
MCDB2
PA5
CTS2
MCDB1
PA6
MCDA0
User LED
PA7
MCCDA
ETHERNET DM9161A MII/RMII (IRQ)
PA8
MCCK
MCI SD/MMC/DATAFLASH Slot
PA9
MCDA1
Power LED
PA10
MCDA2
ETX2
PA11
MCDA3
ETX3
PA12
ETX0
PA13
ETX1
PA14
ERX0
PA15
ERX1
PA16
ETXEN
PA17
ERXDV
PA18
ERXER
PA19
ETXCK
PA20
EMDC
PA21
EMDIO
PA22
ADTRG
ETXER
ETHERNET DM9161A MII Interface
PA23
TWD
ETX2
SERIAL EEPROM (SDA)
PA24
TWCK
ETX3
SERIAL EEPROM (SCL)
PA25
TCLK0
ERX2
ETHERNET DM9161A MII Interface (PA25..PA29)
PA26
TIOA0
ERX3
High-Drive
PA27
TIOA1
ERXCK
High-Drive
PA28
TIOA2
ECRS
High-Drive
PA29
SCK1
ECOL
PA30
SCK2
RXD4
(BP3) User's interface Push Button
PA31
SCK0
TXD4
(BP4) User's interface Push Button
ETHERNET DM9161A MII Interface (PA10..PA11)
ETHERNET DM9161A RMII Interface (PA12..PA19)
ETHERNET DM9161A MII/RMII Interface (PA20..PA21)
AT91SAM9260-EK Evaluation Board User Guide
3-7
6234C–ATARM–22-Mar-07
Board Description
Table 3-2. PIO B Controller
I/O Line
Peripheral A
Peripheral B
PB0
SPI1_MISO
TIOA3
Audio DAC AT73C213 (MISO)
PB1
SPI1_MOSI
TIOB3
Audio DAC AT73C213 (MOSI)
PB2
SPI1_SPCK
TIOA4
Audio DAC AT73C213 (SPCK)
PB3
SPI1_NPCS0
TIOA5
Audio DAC AT73C213 (Chip Select)
PB4
TXD0
COM PORT 0 (TXD)
PB5
RXD0
COM PORT 0 (RXD)
PB6
TXD1
TCLK1
COM PORT 1 (TXD)
PB7
RXD1
TCLK2
COM PORT 1 (RXD)
PB8
TXD2
PB9
RXD2
PB10
TXD3
ISI_D8
(J28) IMAGE SENSOR CONNECTOR (PB10..PB13)
PB11
RXD3
ISI_D9
PB12
TXD5
ISI_D10
PB13
RXD5
ISI_D11
PB14
DRXD
SERIAL DEBUG PORT(RXD)
PB15
DTXD
SERIAL DEBUG PORT(TXD)
PB16
TK0
TCLK3
Audio DAC AT73C213 (BCLK)
PB17
TF0
TCLk4
Audio DAC AT73C213 (LRFS)
PB18
TD0
TIOB4
Audio DAC AT73C213 (SDIN)
PB19
RD0
TIOB5
(J28) IMAGE SENSOR CONNECTOR (CTRL2)
PB20
RK0
ISI_D0
(J28) IMAGE SENSOR CONNECTOR (PB20..PB31)
PB21
RF0
ISI_D1
PB22
DSR0
ISI_D2
PB23
DCD0
ISI_D3
PB24
DTR0
ISI_D4
PB25
RI0
ISI_D5
PB26
RTS0
ISI_D6
PB27
CTS0
ISI_D7
PB28
RTS1
ISI_PCK
PB29
CTS1
ISI_VSYNC
PB30
PCK0
ISI_HSYNC
PB31
PCK1
ISI_MCK
3-8
6234C–ATARM–22-Mar-07
Comments
Function
Warning: Shared with COM PORT 0 (PB22..PB27)
Warning: Shared with COM PORT 1 (PB28..PB29)
AT91SAM9260-EK Evaluation Board User Guide
Board Description
Table 3-3. PIO C Controller
I/O Line
Peripheral A
Peripheral B
PC0
AD0
SCK3
PC1
AD1
PCK0
PC2
AD2
PCK1
PC3
AD3
SPI1_NPCS3
PC4
A23
SPI1_NPCS2
(J28) IMAGE SENSOR CONNECTOR (CTRL1)
PC5
A24
SPI1_NPCS1
USB_CNX (VBUS DETECT)
PC6
TIOB2
CFCE1
PC7
TIOB1
CFCE2
PC8
NCS4/CFCS0
RTS3
PC9
NCS5/CFCS1
TIOB0
PC10
A25/CFRNW
CTS3
PC11
NCS2
SPI0_NPCS1
PC12
IRQ0
NCS7
PC13
FIQ
NCS6
NandFlash (RDYBSY)
PC14
NCS3/NANDCS
IRQ2
NandFlash (NANDCS)
PC15
NWAIT
IRQ1
PC16
D16
SPI0_NPCS2
PC17
D17
SPI0_NPCS3
PC18
D18
SPI1_NPCS1
PC19
D19
SPI1_NPCS2
PC20
D20
SPI1_NPCS3
PC21
D21
EF100
PC22
D22
TCLK5
PC23
D23
PC24
D24
PC25
D25
PC26
D26
PC27
D27
PC28
D28
PC29
D29
PC30
D30
PC31
D31
AT91SAM9260-EK Evaluation Board User Guide
Comments
Function
Audio DAC AT73C213 (MCLK)
SPI DATAFLASH memory (Chip Select)
EBI Data Bus (PC16..PC31)
3-9
6234C–ATARM–22-Mar-07
Board Description
3-10
6234C–ATARM–22-Mar-07
AT91SAM9260-EK Evaluation Board User Guide
Section 4
Configuration
4.1
Jumpers
Table 4-1. Jumpers Configuration
Designation
Note:
Default
Setting
Feature
(1)
JP2
Closed
3.3V Jumper
JP3
Closed
Forces power on.
To use the software shutdown control, J3 must be
opened. 3V battery backup must be present and J10
jumper set in position 1-2
JP6
Closed
VDDPLL Jumper(1)
JP7
Opened
Enables boot on the internal ROM
Closed
Enables boot on the NCS0
JP9
2-3
Slow Clock OSCSEL
1-2: Internal RC Oscillator
2-3: External Crystal Oscillator
JP10
2-3
VDDBU Jumper select (1)
1-2: Lithium 3V Battery
2-3: 1.8V from VDDCORE
JP12
Closed
VDDCORE Jumper(1)
JP15
Closed
Enables Ethernet Auto MDIX control
1. These jumpers are provided for power consumption measurement use. By default,
they are closed. To use this feature, the user has to open the strap and insert an
anmeter.
AT91SAM9260-EK Evaluation Board User Guide
4-1
6234C–ATARM–22-Mar-07
Configuration
4.2
JTAG/ICE
Table 4-2. JTAG/ICE Configuration
4.3
Microcontroller
Clock
Designation
Default
Setting
Feature
S1
Opened
Disables the ICE NTRST input
S2
Opened
Selects ICE mode or JTAG mode (See Errata)
S3
Opened
Disables TCK <-> RTCK local loop. If S3 is closed, R13
must be unsoldered.
R13
Soldered
Enables the ICE RTCK return. S3 must be opened
R14
Soldered
Enables the ICE NRST input
Table 4-3. Microcontroller Clock Configuration
Designation
Default
Setting
R18/R20
Soldered
S4
Opened
Enables the use of 18.432MHz crystal. If external clock
used, R18/R20 must be unsoldered and S4 closed.
Slow Clock Setting. See Table 4-1.
J9
4.4
Feature
Memory
Table 4-4. Memory Configuration
Designation
Default
Setting
Feature
Soldered
Soldered
Enables MN7 Chip select access
Enables MN8 Chip select access
Soldered
Soldered
Opened
Enables the use of NANDFlash (MN6x)
Enables the use of Ready Busy signalDisables write
protect
SDRAM
R31
R32
NANDFlash (MN6x)
R36
R34
S6
SERIAL DATAFLASH (MN9)
R40
S5
Soldered
Opened
Enable the use of the Serial DataFlash (MN9)
Disables the write protect.
TWI SERIAL EEPROM (MN10)
R46
R47
4-2
6234C–ATARM–22-Mar-07
Soldered
Soldered
Enables SCL access
Enables SDA access
AT91SAM9260-EK Evaluation Board User Guide
Configuration
4.5
Ethernet
RMII is the factory default mode.
To evaluate the MII mode, the user has to unsolder R49, R50, R127 and close S7 and
S8.
When the RMII mode is used, the user can use the specific MII signals as PIO, but the
following resistors must be unsoldered (R119 to R126).
4.6
Miscellaneous
Refer to the TOP level schematic for the PIO usage.
Table 4-5.
Designation
Default
Setting
Feature
R82
Soldered
USB DEVICE: Enables the use of the USBCNX signal
R72
R73
Soldered
Soldered
DBGU COM Port: Enables the use of DTXD output
signalEnables the use of DRXD input
RS232 COM Port 0: Enable the use of outputs signal
R94
R95
R96
Soldered
RTS0
TXD0
DTR0
RS232 COM Port 0: Enable the use of inputs signal
R98
R101
R103
R104
R105
R106
Soldered
DCD0
DSR0
RXD0
CTS0
RI0
Enables all MAX3241E outputs buffer
RS232 COM Port 1: Enable the use of outputs signal
R83
R85
Soldered
TXD1
RTS1
RS232 COM Port 1: Enable the use of inputs signal
R86
R88
Soldered
RXD1
CTS1
TP1
N.A
GND Test point
TP2
N.A
GND Test point.
TP3
N.A
GND Test point.
TP4
N.A
GND Test point.
TP5
N.A
Reserved: do not use
TP6
N.A
Reserved: do not use
AT91SAM9260-EK Evaluation Board User Guide
4-3
6234C–ATARM–22-Mar-07
Configuration
4-4
6234C–ATARM–22-Mar-07
AT91SAM9260-EK Evaluation Board User Guide
Section 5
Schematics
5.1
Schematics
This section contains the following schematics:
! Board Layout - Top View
! Power supply and audio
! 217-ball BGA AT91SAM9260 Microcontroller
! 208-pin LQFP AT91SAM9260 Microcontroller
! Memory
! Ethernet
! Serial Interface
! Expansion and User Interface
AT91SAM9260-EK Evaluation Board User Guide
5-1
6234C–ATARM–22-Mar-07
6
PA[0..31]
POWER SUPPLY
5VDC
POWERLED
DAC
D
PA9
5
DOUT
DIN
CLK
CS
NRST
2
PIO
D[0..31]
A[0..22]
D[0..31]
A[0..14]
SHDN
PC1
PB18
PB17
PB16
PCK0
TD0
TF0
TK0
PB0
PB1
PB2
PB3
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
SPI1_NPCS0
NRST
RAS
CAS
SDA10
SDWE
SDCS_NCS1
RAS
CAS
SDA10
SDWE
SDCS_NCS1
SDCK
SDCKE
SDCK
SDCKE
NBS1
NBS3
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
A16
A17
PB[0..31]
01 - POWER SUPPLY
PB[0..31]
SERIAL INTERFACES
DTXD
DRXD
RS232
DBGU
COM0
TXD0
RXD0
RTS0
CTS0
DTR0
DSR0
DCD0
RI0
COM1
TXD1
RXD1
RTS1
CTS1
C
PB15
PB14
NANDOE
NANDWE
DBGU_TXD
DBGU_RXD
PIO
PIO
PB4
PB5
PB26
PB27
PB24
PB22
PB23
PB25
PB6
PB7
PB28
PB29
SPI0_SPCK
SPI0_NPCS1
USB
PC[0..15]
PC5
A22
A21
NANDOE
NANDWE
PC14
PC13
D[0..15]
SPI0_MISO MCDB0
MCDB1
MCDB2
SPI0_NPCS0 MCDB3
MCCK
SPI0_MOSI MCCDB
PA0
PA5
PA4
PA3
PA8
PA1
PA2
PC11
NRST
PIO
DEVICE
USBCNX
DDM
DDP
HOST A
HDMA
HDPA
HDMA
HDPA
HOST B
HDMB
HDPB
HDMB
HDPB
TWCK
TWD
DDM
DDP
PA24
PA23
D
RAS
CAS
SDA10
SDWE
SDCS_NCS1
SDCK
SDCKE
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
BA0
BA1
CLE
ALE
NANDOE
NANDWE
NANDCS
RDYBSY
D[0..15]
DAT0
DAT1
DAT2
DAT3
CLK
CMD
CARD
READER
SCK
CS
NRST
SCL
SDA
C
EXPANSION & User's Interfaces
D[0..31]
A[0..22]
PA[0..31]
RAS
CAS
SDA10
SDWE
SDCS_NCS1
RMII_MII ETHERNET
TX_CLK
TXD3
TXD2
TXD1
TXD0
TX_EN
10/100 Mbps FAST ETHERNET
A[0..14]
03 - MEMORY
05 - COMMUNICATION
B
1
MEMORY
D[0..31]
A[0..22]
PC[0..15]
AT73C213
3
AT91SAM9260
SHDN
MCLK
SDIN
LRFS
BCLK
4
SDRAM
7
MCI
SERIAL
SERIAL
EEPROM DATAFLASH DATAFLASH NANFLASH
8
PA19
ETXCK/REFCLK
PA11
PA10
PA13
PA12
PA16
ETX3
ETX2
ETX1
ETX0
ETXEN
SDCK
SDCKE
CFWE_NWE_NWR0
RXD3
RXD2
RXD1
RXD0
RX_CLK
RX_DV
TX_ER
RX_ER
COL
CRS
MDC
MDIO
MDINTR
NRST
PA26
PA25
PA15
PA14
ERX3
ERX2
ERX1
ERX0
PA27
PA17
ERXCK
ERXDV
PA22
PA18
ETXER
ERXER
PA29
PA28
ECOL
ECRS
PA20
PA21
PA7
EMDC
EMDIO
PIO
NBS1
NBS3
CFOE_NRD
NANDOE
NANDWE
NCS0
NRST
PA[0..31]
PB[0..31]
PC[0..15]
B
CFWE_NWE_NWR0
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
CFOE_NRD
NANDOE
NANDWE
NRST
PA[0..31]
PA[0..31]
PB[0..31]
PB[0..31]
PC[0..15]
PC[0..15]
VREFP
AVDD
AGND
02 - AT91SAM9260
03 - RMII_MII ETHERNET
SDCK
SDCKE
NCS0
NRST
VREFP
AVDD
AGND
NRST
RAS
CAS
SDA10
SDWE
SDCS_NCS1
06 - EXPANSION CONNECTORS
A
A
B
A INIT EDIT
REV
AT91SAM9260-EK
MODIF.
SCALE
JPG
JPG
28/08/06
17/10/05
DES.
DATE
1/1
DIAGRAM
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
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7
6
5
4
3
2
1
VER.
DATE
REV.
SHEET
B
1
8
8
7
6
5
4
3
2
1
D
D
3V3
10 SQUARE CM COPPER AREA FOR HEAT SINKING
WITH NO SOLDER MASK
R1
120R
MN1
LT1963AEQ-3.3
REGULATED
5V ONLY
J1
5V
C2
10µF
10V
2
R3
100K
1
2
+
3
CR1
5V
J2
GND
SD
C1
330µF
VOUT
GND
3
1
3V3
3V3 CURRENT MEASURE
6
VIN
AUDIO DAC INTERFACE
POWER LED
3V3
R2
100K
4
DS1
YELLOW
FB
C3
10µF
5
C4
10µF
MN2
R4
470K
3
R5
Q1
IRLML2402
C5
1µF
0R
1
POWERLED
2
C6
1µF
C
Q2
6
Si1563EDH
4
8
5V
C1M
5
J3
6
3
4
1
11
10
HPN
LPHN
16
PAINP
30
MONOP
29
MONON
C1P C2M
VIN
C11 R7
22µF 150K
C2P
VOUT
2
6
7
R9
10K
J4
TPS60500
3
C15
4.7µF
R10
10K
FB
1
EN
GND
PG
3.5 PHONEJACK STEREO
3
1
4
2
10
2
R11
120K
C17
9
100µF
6V3
C16
+
MN3
31
AUXP
32
AUXN
4
HSR
11.1
11.1
Z5
Z6
11.1
11.1
TP2
TP3
VDIG
24
3V3
AVDD
2
VCC_DAC
AVDDHS
5
VCM
9
VREF
1
DOUT
DIN
CLK
CS
R6
0R
NRST
C
3
HSL
C7
10µF
C10
100NF
C13 10µF
20
17
19
18
R8
47R
C8
C9
100NF 100NF
GND_DAC
MCLK
SDIN
LRFS
BCLK
GNDB
GNDD
33
23
GND_DAC
GND TEST POINT
TP1
22
21
MCLK
SDIN
LRFS
BCLK
8
Z4
SMODE
RSTB
LINEL
INGND
Z3
25
26
27
28
100µF
6V3
SHDN
ADHESIVE FEET
DOUT
DIN
CLK
CS
LINER
+
C14
15PF
PAINN
VBAT
CBP
HPP
1V8
C12
10PF
FORCE
POWER
ON
15
12
14
13
7
5
AT73C213
VCC_DAC
TP4
L1
4.7µH
3V3
B
B
C18
10µF
10V
R12 0R
GND_DAC
A
A
B
A INIT EDIT
REV
AT91SAM9260-EK
MODIF.
SCALE
JPG
JPG
28/08/06
17/10/05
DES.
DATE
1/1
POWER SUPPLY & AUDIO
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
2
1
VER.
DATE
REV.
SHEET
B
2
8
8
7
6
5
4
3
2
1
PC[0..15]
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
R10
P11
T9
P12
R11
R12
T10
P13
T11
P14
R13
T12
U9
U10
U11
U12
U15
U14
U16
U13
T14
R14
T16
R15
R16
P16
P15
T17
L14
R17
N15
N14
PA0/SPI0_MISO/MCDB0
PA1/SPI0_MOSI/MCCDB
PA2/SPI0_SPCK
PA3/SPI0_NPCS0/MCDB3
PA4/RTS2/MCDB2
PA5/CTS2/MCDB1
PA6/MCDA0
PA7/MCCDA
PA8/MCCK
PA9/MCDA1
PA10/MCDA2/ETX2
PA11/MCDA3/ETX3
PA12/ETX0
PA13/ETX1
PA14/ERX0
PA15/ERX1
PA16/ETXEN
PA17/ERXDV
PA18/ERXER
PA19/ETXCK
PA20/EMDC
PA21/EMDIO
PA22/ADTRG/ETXER
PA23/TWD/ETX2
PA24/TWCK/ETX3
PA25/TCLK0/ERX2
PA26/TIOA0/ERX3
PA27/TIOA1/ERXCK
PA28/TIOA2/ECRS
PA29/SCK1/ECOL
PA30/SCK2/RXD4
PA31/SCK0/TXD4
DDP
DDM
C13
D13
DDP
DDM
HDPA
HDMA
E14
E15
HDPA
HDMA
HDPB
HDMB
D14
C14
HDPB
HDMB
TDI
TMS
TCK
RTCK
TDO
JTAGSEL
J16
G17
H15
G16
J14
F16
TDI
TMS
TCK
RTCK
TDO
JTAGSEL
NTRST
H16
NTRST
PLLRCA
VDDPLL
XOUT
XIN
XOUT32
XIN32
OSCSEL
VDDBU
WKUP
TST
BMS
VREFP
AVDD
AGND
VDDCORE
VDDIOM
VDDHISI
RR1
100K
ICE INTERFACE
ICE_NTRST
ICE_RTCK
0R
R13 0R
NRST
3V3
S2
S3
R1
R15
C19
10NF
C20
1NF
B
T1
PLLRCA
J6
VDDPLL
+
1K
OUT
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
T3
T4
U3
U4
A17
A15
A16
B11
B16
C11
B12
B14
C12
B13
B15
G1
J4
J2
H1
J1
K2
K4
M4
N3
K1
L3
L2
N4
P4
R3
P3
M2
SDCS/NCS1
NCS0
B3
A14
SDCS_NCS1
NCS0
CFOE/NRD
A13
CFOE_NRD
CFWE/NWE/NWR0
CFIOR/NBS1/NWR1
CFIOW/NBS3/NWR3
A12
B2
A1
CFWE_NWE_NWR0
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
NANDOE
NANDWE
C10
B10
NANDOE
NANDWE
NRST
G15
BMS
F15
TST
F17
VDDIOP1
GNDANA
R2
1K
TST R19
R26
100K
R27
0R
WAKE UP
C32
100NF
BP2
SHDN
C33
C35
100NF 100NF
C34
C36
100NF 100NF
J12
1V8
3V3
BOOT MODE SELECT
OPENED : EMBEDDED ROM
CLOSED : EBI_NCS0
VREFP
AVDD
0R
C28
100NF
C27
100NF
AVDD
3V3
L2
4.7µH
C29
10µF
10V
C30
100NF
C31
10µF
10V
0R R22
AGND
AGND
VDDHISI
C38
10µF
R28
0R
WKUP
C47
100NF
RESET
A
VDDIOM
C37
10µF
B
BP1
VREFP
3V3
VDDCORE
R16
1K
3V3
BMS J7
R21
R4
3V3
NRST
100K
U2
VDDANA
P8
VDDIOP0
VDDIOP0
VDDIOP0
U17
L4
C16
VDDIOM
VDDIOM
VDDIOM
J3
G4
VDDCORE
VDDCORE
VDDCORE
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
D11
3
2
1
T13
R23 10K
R24
NOT POPULATED
VDDBU
M1
OSCSEL
D8
G14
L1
T7
T15
D6
D10
D12
F4
M3
H8
H9
H10
J8
J9
J10
K8
K9
K10
K16
R7
3
2
1
XIN32
3V
CR1225
R25
GND
3
J11
J9
SDWE
SDA10
SDCKE
SDCK
ADVREF
1V8
J10
1
Z11
2
VDD
A
D17
OSCSELF14
VDDBU
MN5
R1100D181C
F2
B4
G3
B1
XOUT32
VDDCORE
4
C26
10PF
Y2
32.768 kHz
XIN32
C
XIN
H14
1
XOUT32E17
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
SDWE
SDA10
SDCKE
SDCK
XOUT
D9
S4
C25
10PF
NOT POPULATED
N1
A2
A3
C4
B5
C5
D5
A4
B6
A5
C6
D7
A6
B7
A7
C7
B8
A8
C8
A9
C9
B9
A10
A11
R17
GNDBU
Y1
18.432MHz
R20 0R
XIN
C24
10PF
SMB MALE
1
2
3
4
5 J8
XOUT
P1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
PLLRCA
E16
R18 0R
D4
C2
D2
E3
E4
E2
F3
G2
C1
D1
E1
H4
H3
F1
H2
K3
D
RAS
CAS
P2 VDDPLL
C22
100NF
U1 GNDPLL
C23
10PF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
TP5
TP6
D3
C3
N.C
N2 VDDPLL
C21
100NF
T2 GNDPLL
1V8
D15
C15
RAS
CAS
1K
VDDBU
R14
S1
D16
1
3
5
7
9
11
13
15 ICE_NRST
17
19
SHDN
2
4
6
8
10
12
14
16
18
20
N.C
N.C
NBS0/A0
NWR2/NBS2/A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0/A16
BA1/A17
A18
A19
A20
A21
A22
AT91SAM9260
WKUP
4
3
2
1
J5
B17
5
6
7
8
3V3
C17
C
A[0..22]
SCK3/AD0/PC0
PCK0/AD1/PC1
PCK1/AD2/PC2
SPI1_NPCS3/AD3/PC3
SPI1_NPCS2/A23/PC4
SPI1_NPCS1/A24/PC5
CFCE1/TIOB2/PC6
CFCE2/TIOB1/PC7
RTS3/NCS4_CFCS0/PC8
TIOB0/NCS5_CFCS1/PC9
CTS3/A25_CFRNW/PC10
SPI0_NPCS1/NCS2/PC11
NCS7/IRQ0/PC12
NCS6/FIQ/PC13
IRQ2/NCS3_NANDCS/PC14
IRQ1/NWAIT/PC15
SPI0_NPCS2/D16/PC16
SPI0_NPCS3/D17/PC17
SPI1_NPCS1/D18/PC18
SPI1_NPCS2/D19/PC19
SPI1_NPCS3/D20/PC20
EF100/D21/PC21
TCLK5/D22/PC22
D23/PC23
D24/PC24
D25/PC25
D26/PC26
D27/PC27
D28/PC28
D29/PC29
D30/PC30
D31/PC31
TDI
TMS
TCK
RTCK
TDO
NTRST
JTAGSEL
D
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
MN4
PA[0..31]
TIOA3/SPI1_MISO/PB0
TIOB3/SPI1_MOSI/PB1
TIOA4/SPI1_SPCK/PB2
TIOA5/SPI1_NPCS0/PB3
TXD0/PB4
RXD0//PB5
TCLK1/TXD1/PB6
TCLK2/RXD1/PB7
TXD2/PB8
RXD2/PB9
ISI_D8/TXD3/PB10
ISI_D9/RXD3/PB11
ISI_D10/TXD5/PB12
ISI_D11/RXD5/PB13
DRXD/PB14
DTXD/PB15
TCLK3/TK0/PB16
TCLK4/TF0/PB17
TIOB4/TD0/PB18
TIOB5/RD0/PB19
ISI_D0/RK0/PB20
ISI_D1/RF0/PB21
ISI_D2/DSR0/PB22
ISI_D3/DCD0/PB23
ISI_D4/DTR0/PB24
ISI_D5/RI0/PB25
ISI_D6/RTS0/PB26
ISI_D7/CTS0/PB27
ISI_PCK/RTS1/PB28
ISI_VSYNC/CTS1/PB29
ISI_HSYNC/PCK0/PB30
ISI_MCK/PCK1/PB31
TO PQFP208 FOOTPRINT
D[0..31]
N16
M14
M15
M16
K14
P17
N17
M17
L16
L15
T5
P5
R5
P6
L17
K17
J17
K15
H17
J15
U5
U6
T6
R6
P7
U7
R8
U8
R9
T8
P9
P10
PB[0..31]
C39
C41
C44
100NF 100NF
100NF
C40
C42 C43
C45
100NF 10µF100NF 100NF
10V
B
A INIT EDIT
C46
100NF
REV
AT91SAM9260-EK
3V3
MODIF.
SCALE
JPG
JPG
28/08/06
17/10/05
DES.
DATE
1/1
AT91SAM9260-BGA217
VDDCORE CURRENT MEASURE
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
2
1
VER.
DATE
REV.
SHEET
B
3
8
8
7
6
5
4
3
2
1
PC[0..15]
DDP
DDM
55
54
DDP
DDM
HDPA
HDMA
51
50
HDPA
HDMA
TDI
TMS
TCK
RTCK
TDO
JTAGSEL
30
31
34
37
29
43
TDI
TMS
TCK
RTCK
TDO
JTAGSEL
NTRST
35
NTRST
154
VDDPLL
148
VDDPLL
151
GNDPLL
155
VDDPLL
153
GNDPLL
XOUT
150
XOUT
XIN
149
XIN
XOUT32
45
XOUT32
XIN32
46
XIN32
OSCSEL
41
OSCSEL
PC0
PC1
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC13
PC14
PC15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
158
159
62
67
63
64
61
60
58
57
56
59
127
128
129
130
131
134
135
136
137
138
139
140
141
142
143
144
145
NCS6/FIQ/PC13
IRQ2/NCS3_NANDCS/PC14
IRQ1/NWAIT/PC15
SPI0_NPCS2/D16/PC16
SPI0_NPCS3/D17/PC17
SPI1_NPCS1/D18/PC18
SPI1_NPCS2/D19/PC19
SPI1_NPCS3/D20/PC20
EF100/D21/PC21
TCLK5/D22/PC22
D23/PC23
D24/PC24
D25/PC25
D26/PC26
D27/PC27
D28/PC28
D29/PC29
D30/PC30
D31/PC31
SCK3/AD0/PC0
PCK0/AD1/PC1
SPI1_NPCS2/A23/PC4
SPI1_NPCS1/A24/PC5
CFCE1/TIOB2/PC6
CFCE2/TIOB1/PC7
RTS3/NCS4_CFCS0/PC8
TIOB0/NCS5_CFCS1/PC9
CTS3/A25_CFRNW/PC10
SPI0_NPCS1/NCS2/PC11
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
21
22
23
26
27
28
163
164
165
166
167
168
171
172
175
176
177
178
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
99
98
97
96
95
94
93
92
89
88
87
86
85
84
83
82
81
80
79
76
75
74
73
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
C
RAS
CAS
SDWE
SDA10
SDCKE
SDCK
116
100
117
115
SDWE
SDA10
SDCKE
SDCK
SDCS/NCS1
NCS0
103
68
SDCS_NCS1
NCS0
CFOE/NRD
69
CFOE_NRD
70
102
101
CFWE_NWE_NWR0
CFIOR_NBS1_NWR1
CFIOW_NBS3_NWR3
NANDOE
NANDWE
71
72
NANDOE
NANDWE
NRST
36
NRST
BMS
40
BMS
TST
42
TST
ADVREF
157
VREFP
VDDANA
160
VDDIOP1
GNDANA
156
C49
100NF
169
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
199
187
52
32
24
13
VDDIOP0
5
VDDIOM
VDDIOM
132
114
VDDIOM
VDDIOM
90
65
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
6
14
25
33
39
53
66
78
91
113
133
146
170
173
188
200
204
VDDCORE
VDDCORE
VDDCORE
VDDCORE
VDDCORE
203
174
147
77
38
GNDBU
44
VDDBU
106
107
108
109
110
111
112
118
119
120
121
122
123
124
125
126
105
104
CFWE/NWE/NWR0
CFIOR/NBS1/NWR1
CFIOW/NBS3/NWR3
WKUP
A
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
PLLRCA
48
B
D
RAS
CAS
N.C
PLLRCA
A[0..22]
NBS0/A0
NWR2/NBS2/A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0/A16
BA1/A17
A18
A19
A20
A21
A22
AT91SAM9260
47
152
DRXD/PB14
DTXD/PB15
TCLK3/TK0/PB16
TCLK4/TF0/PB17
TIOB4/TD0/PB18
TIOB5/RD0/PB19
ISI_D0/RK0/PB20
ISI_D1/RF0/PB21
ISI_D2/DSR0/PB22
ISI_D3/DCD0/PB23
ISI_D4/DTR0/PB24
ISI_D5/RI0/PB25
ISI_D6/RTS0/PB26
ISI_D7/CTS0/PB27
ISI_PCK/RTS1/PB28
ISI_VSYNC/CTS1/PB29
ISI_HSYNC/PCK0/PB30
ISI_MCK/PCK1/PB31
PA0/SPI0_MISO/MCDB0
PA1/SPI0_MOSI/MCCDB
PA2/SPI0_SPCK
PA3/SPI0_NPCS0/MCDB3
PA4/RTS2/MCDB2
PA5/CTS2/MCDB1
PA6/MCDA0
PA7/MCCDA
PA8/MCCK
PA9/MCDA1
PA10/MCDA2/ETX2
PA11/MCDA3/ETX3
PA12/ETX0
PA13/ETX1
PA14/ERX0
PA15/ERX1
PA16/ETXEN
PA17/ERXDV
PA18/ERXER
PA19/ETXCK
PA20/EMDC
PA21/EMDIO
PA22/ADTRG/ETXER
PA23/TWD/ETX2
PA24/TWCK/ETX3
PA25/TCLK0/ERX2
PA26/TIOA0/ERX3
PA27/TIOA1/ERXCK
PA28/TIOA2/ECRS
PA29/SCK1/ECOL
SHDN
C
179
180
181
182
183
184
185
186
189
190
191
192
193
194
195
196
197
198
201
202
205
206
207
208
1
2
3
4
7
8
WKUP
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
49
D
TIOA3/SPI1_MISO/PB0
TIOB3/SPI1_MOSI/PB1
TIOA4/SPI1_SPCK/PB2
TIOA5/SPI1_NPCS0/PB3
TXD0/PB4
RXD0//PB5
TCLK1/TXD1/PB6
TCLK2/RXD1/PB7
TXD2/PB8
RXD2/PB9
ISI_D8/TXD3/PB10
ISI_D9/RXD3/PB11
MN6
PA[0..31]
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
D[0..31]
9
10
11
12
15
16
17
18
19
20
161
162
PB[0..31]
B
AVDD
C48
100NF
AGND
A
3V3
SHDN
VDDIOM
VDDCORE
VDDHISI
VDDBU
B
A INIT EDIT
C50
100NF
C51 C53
C55
100NF 100NF 100NF
C52
C54
100NF 100NF
C56
C58
C60
C62
C64
C66
100NF 100NF
100NF 100NF 100NF 100NF
C57
C59
C61
C63
C65
100NF 100NF
100NF 100NF 100NF
REV
C67
100NF
AT91SAM9260-EK
MODIF.
SCALE
JPG
JPG
28/08/06
17/10/05
DES.
DATE
1/1
AT91SAM9260-LQFP208
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
2
1
VER.
DATE
REV.
SHEET
B
4
8
8
7
6
5
4
3
2
1
SDRAM
A[0..14]
D[0..31]
MN7
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
D
A13
SDA10
SDA10
BA0
BA1
BA0
BA1
20
21
A14
36
40
SDCKE
SDCKE
SDCK
A0
38
NBS0
15
39
17
18
SDWE
SDWE
R29
470K
R31
CAS
RAS
CAS
RAS
3V3
37
SDCK
CFIOR_NBS1_NWR1
C
23
24
25
26
29
30
31
32
33
34
22
35
16
19
MN8
A0 MT48LC16M16A2 DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
A10
DQ10
A11
DQ11
DQ12
BA0
DQ13
BA1
DQ14
DQ15
A12
N.C
VDD
VDD
CKE
VDD
VDDQ
CLK
VDDQ
VDDQ
DQML
VDDQ
DQMH
VSS
CAS
VSS
RAS
VSS
VSSQ
VSSQ
WE
VSSQ
CS
VSSQ
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
1
14
27
3
9
43
49
28
41
54
6
12
46
52
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
SDA10
A13
BA0
BA1
20
21
A14
3V3
36
40
A1
SDCKE
37
SDCK
38
NBS2
15
39
CAS
RAS
17
18
CFIOW_NBS3_NWR3
C68
C70
C72
C74
100NF 100NF
100NF 100NF
C69
C71
C73
100NF 100NF 100NF
3V3
SDWE
16
19
A0 MT48LC16M16A2 DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
A10
DQ10
A11
DQ11
DQ12
BA0
DQ13
BA1
DQ14
DQ15
A12
N.C
VDD
VDD
CKE
VDD
VDDQ
CLK
VDDQ
VDDQ
DQML
VDDQ
DQMH
VSS
CAS
VSS
RAS
VSS
VSSQ
VSSQ
WE
VSSQ
CS
VSSQ
R30
470K
256 Mbits
0R
SDCS_NCS1
23
24
25
26
29
30
31
32
33
34
22
35
R32
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
D
3V3
1
14
27
3
9
43
49
28
41
54
6
12
46
52
C75
C77
C79
C81
100NF 100NF
100NF 100NF
C76
C78
C80
100NF 100NF
100NF
C
256 Mbits
0R
3V3
NANDFLASH
D[0..15]
R37
470K
DUAL FOOTPRINT
16-bit bus width
MN6A1
CLE
ALE
NANDOE
NANDWE
NANDCS
3V3
RDYBSY
3V3
R38
R39
R36
R33
R34
R35
R41
0R
0R
0R
470K
0R
1K
CLE
ALE
nRE
nWE
nCE
16
17
8
18
9
CLE
ALE
RE
WE
CE
RnB
7
R/B
WP
19
470K
B
S6
1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
34
35
WP
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
MN6B1
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
26
28
30
32
40
42
44
46
27
29
31
33
41
43
45
47
N.C
PRE
N.C
39
38
36
VCC
VCC
37
12
VSS
VSS
VSS
48
25
13
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
3V3
CLE
ALE
nRE
nWE
nCE
16
17
8
18
9
CLE
ALE
RE
WE
CE
RnB
7
R/B
WP
19
WP
1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
25
26
C84
100NF
C83
100NF
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
3V3
8-bit bus width
MN9
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
29
30
31
32
41
42
43
44
N.C
N.C
N.C
N.C
N.C
N.C
PRE
N.C
N.C
N.C
N.C
N.C
48
47
46
45
40
39
38
35
34
33
28
27
VCC
VCC
37
12
VSS
VSS
D0
D1
D2
D3
D4
D5
D6
D7
SCK
CS
R40
8
1
2
4
SO
SI
SCK
CS
3
RESET
0R
NRST
VCC
6
GND
7
WP
5
SERIAL DATAFLASH
J13
CLK
3V3
C85 100NF
3V3
FPS009
8
7
6
5
4
3
2
1
9
3V3
36
13
B
R43
10K
DAT1
DAT0
CMD
DAT3
DAT2
S5
WRITE PROTECT
NORMALLY OPEN
3V3
R42
0R
C82
100NF
SD CARD / MMC CARD
DATAFLASH CARD INTERFACE
NOT POPULATED
R44
10K
R46
R45
10K
MN10
0R
SCL
SDA
A
R47
0R
3V3
C86
100NF
6
5
SCL
SDA
8
VCC
4
GND
A0
A1
NC
1
2
3
WP
7
A
B
A INIT EDIT
SERIAL EEPROM
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AT91SAM9260-EK
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3
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1
8
7
6
D
5
4
3
2
1
D
3V3
R48
1 OE
10K
VDD 4
C87
100NF
50 MHz
2 VSS
OUT 3
Y3
C88
22PF
SG-8002JC-50.0000M-PCB R49
S7
0R
C89
22PF
Y4
25MHz
1
C90
2
100NF
GND_ETH
REF_CLK/XT2
R119
R120
0R
0R
17
18
19
20
21
22
TXD3
TXD2
TXD1
TXD0
TX_EN
TX_CLK/ISOLATE
26
27
28
29
RXD3/PHYAD3
RXD2/PHYAD2
RXD1/PHYAD1
RXD0/PHYAD0
S8
R121
R122
RXD3
RXD2
RXD1
RXD0
RX_CLK
RX_DV
TX_ER
RX_ER
3V3
R127
3V3
R55
R56
0R
10K
R57
10K
34
37
RX_CLK/10BTSER
RX_DV/TESTMODE
R124
0R
16
38
TX_ER/TXD4
RX_ER/RXD4/RPTR
R125
R126
0R
0R
36
35
100NF
COL/RMII
CRS/PHYAD4
MDC
MDIO
MDINTR
39
DISMDIX
C97
100NF
C98
100NF
B
R62 0R
NRST
DVDD
23
DVDD
15
33
44
DGND
DGND
DGND
10
PWRDWN
40
RESET
J14
1 TD+
8
3
TX+
1
2 TD-
TX-
2
3 RD+
RX+
3
RX-
6
C
5 CT
RX-
4
AVDDR
1
6 RDL3
C91
100NF
C92
100NF
2
VCCA
DM9161AEP
DVDD
30
R52
49R9
1%
4 CT
AVDDR
24
25
32
41
7
RX+
0R
C96
TX+
R51
49R9
1%
VCCA
3V3
J15
43
TX-
R123
10K
COL
CRS
MDC
MDIO
MDINTR
0R
0R
XT1
15
42
AVDDT
9
AGND
AGND
AGND
5
6
46
BGRESG
47
BGRES
LEDMODE
LED0/OP0
LED1/OP1
LED2/OP2
CABLESTS/LINKSTS
48
31
11
12
13
14
N.C
45
VCCA
742792093
C93
10V
10µF
R53
49R9
1%
R54
49R9
1%
C101
10µF
10V
C102
100NF
75
75
4
5
C94
100NF
1nF
75
8
C95
100NF
GND_ETH
75
7 NC
GND_ETH
7
8
3V3
J00-0061NL
GND_ETH
RJ45 ETHERNET CONNECTOR
8
7
6
5
C
0R
R58
6,80K
1%
RR6
10K
1
2
3
4
TXD3
TXD2
TXD1
TXD0
TX_EN
R50
16
MN11
TX_CLK
3V3
1K
DS2
YELLOW
R59
FULL DUPLEX
R61
SPEED 100
R63
LINK&ACT
1K
DS3
GREEN
DS4
GREEN
B
1K
3V3
C99
10µF
10V
R64 0R
R65 0R
GND_ETH
A
A
B
A INIT EDIT
REV
AT91SAM9260-EK
MODIF.
SCALE
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28/08/06
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ETHERNET
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VER.
DATE
REV.
SHEET
B
6
8
7
6
5
4
3
5V
F1
500 mA
CCUSBA-32002-30X
B1
B2
B3
B4
A
B
D
4 3
2 1
USB HOST INTERFACE
A1
A2
A3
A4
39R
C110
47pF
C111
47pF
R70
15K
C109
100NF
C108
100NF
R66
39R
3V3
HDMA
HDPA
R67
3 C14 C2+
C106
100NF
5 C2-
R69 0R
R68
100K
R71
15K
R72
11
0R
NOT POPULATED
R73
0R
DRXD
VCC
16
GND
15
V+
2
V-
6
C104
100NF
SERIAL DEBUG PORT
C105
100NF
MALE RIGHT ANGLED
C107
100NF
1
6
2
7
3
8
4
9
5
RXD
14
T
10
DTXD
1
3V3
MN12
1 C1+
C103
100NF
F2
500 mA
J16
2
TXD
7
T
12
R
13
9
R
8
R74
39R
R76
HDMB
HDPB
10
R75 0R
39R
D
11
8
J17
ADM3202ARN
R77
15K
R78
15K
3V3
NOT POPULATED
R80
100K
USB_CNX
C
R82
0R
USBCNX
R84
22K
3V3
R83
0R
R85
0R
R86
6
RS232 COM PORT 1
MALE RIGHT ANGLED
2
C116
100NF
C118
100NF
6
1
6
2
7
3
8
4
9
5
RXD
RTS
TXD
CTS
14
7
T
R
13
9
R
8
10
12
C
0R
J18
39R
R89
ADM3202ARN
MN14
DDM
R90
C123
15PF
5
0R
VT
10
USB DEVICE INTERFACE
39R
3
11
CTS1
C119
33PF
4
V+
3V3
C115
100NF
R79
100K
TXD1
R88
2
15
3 C14 C2+
GND
C117
100NF
RXD1
R87
1,5K
1
16
RTS1
NOT POPULATED
C120
100NF
MN13
1 C1+
VCC
5 C2-
15K R81
J19
C114
100NF
11
C113
47pF
DDP
C121
100NF
3V3
R92
100K
C124
15PF
C127
100NF
R91
100K
R94
R93
100K
0R
RTS0
R95
0R
TXD0
B
R96
28
C1+
24
1
C1C2+
2
C2-
14
T1IN
13
T2IN
12
T3IN
3V3
T
VCC
26
GND
25
V+
27
MALE RIGHT ANGLED
C125
100NF
DCD
DSR
RXD
RTS
TXD
CTS
DTR
RI
C126
100NF
V-
3
T1OUT
9
T2OUT
10
T3OUT
11
T
RS232 COM PORT 0
C122
100NF
1
6
2
7
3
8
4
9
5
B
0R
T
10
DTR0
21
R
20
R
11
C112
47pF
J20
R98
0R
DCD0
R101
0R
DSR0
R103
0R
RXD0
R104
0R
CTS0
R105
0R
RI0
R106
0R
19
R1OUT
18
R2OUT
17
R3OUT
16
R4OUT
15
R5OUT
23
EN
R
R
R1IN
4
R2IN
5
R3IN
6
R4IN
7
R5IN
8
SHDN
22
R
R
R
3V3
MAX3241E
A
A
R107 100K
B
A INIT EDIT
REV
AT91SAM9260-EK
MODIF.
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28/08/06
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DES.
DATE
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SERIAL INTERFACES
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VER.
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7
8
8
7
6
5
4
3
2
1
J25
Interposer 100 TOP
PA[0..31]
PB[0..31]
PC[0..15]
J23
PA1
PA3
PA5
PA7
PA9
PA11
PA13
PA15
PA17
PA19
PA21
PA23
PA25
PA27
PA29
PA31
D
RR8-2
RR8-4
RR7-2
RR7-4
0R
0R
0R
0R
2
4
2
4
7
5
7
5
3V3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
J26
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
8
6
8
6
1
3
1
3
PA0
PA2
PA4
PA6
PA8
PA10
PA12
PA14
PA16
PA18
PA20
PA22
PA24
PA26
PA28
PA30
RR8-1
RR8-3
RR7-1
RR7-3
0R
0R
0R
0R
3V3
PB1
PB3
PB5
PB7
PB9
PB11
PB13
PB15
PB17
PB19
PB21
PB23
PB25
PB27
PB29
PB31
3V3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
PIO A
3V3
D[0..31]
J24
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PB0
PB2
PB4
PB6
PB8
PB10
PB12
PB14
PB16
PB18
PB20
PB22
PB24
PB26
PB28
PB30
A24
PC5
CFCE2
PC7
CFCS1_NCS5 PC9
NCS2 PC11
NCS6 PC13
NWAIT PC15
3V3
PC1
PC3
PC5
PC7
PC9
PC11
PC13
PC15
D17
D19
D21
D23
D25
D27
D29
D31
3V3
AVDD
AGND
PIO B
1V8
C130
100NF
A[0..22]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PC0
PC2
PC4
PC6
PC8
PC10
PC12
PC14
D16
D18
D20
D22
D24
D26
D28
D30
PC4
PC6
PC8
PC10
PC12
PC14
A23
CFCE1
CFCS0_NCS4
A25_CFRNW
NCS7
NANDCS_NCS3
3V3
VREFP
PIO C & ADC
A0 NBS0_A0
A1 NWR2_NBS2_A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
C133
100NF
C
C131
10V
10µF
C132
10V
10µF
J28
R108
PC4
PA24
PIO_CNTRL1
TWCK
PB21
PB23
PB25
PB27
PB11
PB13
ISI_DATA[1]
ISI_DATA[3]
ISI_DATA[5]
ISI_DATA[7]
ISI_DATA[9]
ISI_DATA[11]
0R
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
R109
0R
PB19
PA23
PB31
PB29
PB30
PB28
PB20
PB22
PB24
PB26
PB10
PB12
CFIOW_NBS3_NWR3
CFOE_NRD
SDWE
SDCKE
CAS
RAS
PIO_CNTRL2
TWD
ISI_MCK
ISI_VSYNC
ISI_HSYNC
ISI_PCK
ISI_DATA[0]
ISI_DATA[2]
ISI_DATA[4]
ISI_DATA[6]
ISI_DATA[8]
ISI_DATA[10]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D0
D1
D2
D5
D6
D7
D10
D11
D12
D15
D16
D17
D20
D21
D22
D25
D26
D27
D30
D31
A0
A3
A4
A5
A8
A9
A10
A13
A14
A15
A18
A19
A20
A23
A24
A25_CFRNW
NCS2
NANDCS_NCS3
CFCS0_NCS4
CFCS1_NCS5
CFCE2
NCS7
NANDOE
NANDWE
SPARE2
IMAGE SENSOR CONNECTOR
PB19
PB20
PB21
A1
B1
C1
A2
B2
C2
A3
B3
C3
A4
B4
C4
A5
B5
C5
A6
B6
C6
A7
B7
C7
A8
B8
C8
A9
B9
C9
A10
B10
C10
A11
B11
C11
A12
B12
C12
A13
B13
C13
A14
B14
C14
A15
B15
C15
A16
B16
C16
A17
B17
C17
A18
B18
C18
A19
B19
C19
A20
B20
C20
E1
D1
E2
D2
D4
D3
E3
D3
D9
D8
E4
D4
D14
D13
E5
D5
D19
D18
E6
D6
D24
D23
E7
D7
D29
D28
E8
D8
A2
NWR2_NBS2_A1
E9
D9
A7
A6
D
E10 A12
D10 A11
E11 A17
D11 A16
E12 A22
D12 A21
C
E13
D13
SDCS_NCS1
NCS0
E14
D14
CFWE_NWE_NWR0
CFIOR_NBS1_NWR1
E15
D15
SDA10
SDCK
E16 NCS6
D16 NWAIT
E17 CFCE1
D17
E18
D18
E19 PB30
D19
SPARE1
SPARE0
E20
D20
NRST
B
B
EBI CONNECTORS
NOT POPULATED
3V3
Z15
J31-1
C134
47 uF
6V3
USER INTERFACE
J31-2
J31-3
CR2
3.3V
3V3
NOT POPULATED
C135
100NF
GREEN
R118 220R
PA6
PA30
BP3
DS5
A
A
PA31
BP4
B
A INIT EDIT
REV MODIF.
AT91SAM9260-EK
SCALE
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JPG
28/08/06
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DES.
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VER.
DATE
REV.
SHEET
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8
8
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1
Schematics
5-2
6234C–ATARM–22-Mar-07
AT91SAM9260-EK Evaluation Board User Guide
Section 6
Errata
6.1
VDD Backup
Jumper Selector
(J10)
The silkscreen is wrong. The markings for BB and 1V8 are inverted.
The marking should be:
! On J10 pin 1 (square pin): BB.
! On J10 pin 3: 1V8.
6.2
6.3
6.4
JTAGSEL S2
Footprint
Selector
The S2 footprint must never be shorted to select a JTAG mode, otherwise the chip can
be damaged.
TWI line pullups
for Fast Mode
operation
In order to use the TWI in Fast Mode (up to 400 Kbits/s), the default 10 KΩ resistors R44
and R45 should be replaced by smaller values (e.g., 2.2 KΩ).
AT73C213
clocking
In the present schematics (block diagram p.10 and sheet 1/8, p.26), the MCLK and
BCLK sources implementation does not guarantee a correct phase relation as specified
in the AT73C213 datasheet.
By default, the JTAGSEL input pin integrates a pull-down resistor (ICE mode). To select
the JTAG mode, connect the JTAGSEL input pin at VDDBU power.
Note that there is no need to change the pull-up resistors if the TWI is used in Standard
Mode (up to 100 Kbits/s).
Problem Fix/Workaround:
In his own design, the user must make sure the BCLK and MCLK clocks generation
implements the timing specified in the AT73C213 datasheet.
AT91SAM9260-EK Evaluation Board User Guide
6-1
6234C–ATARM–22-Mar-07
Errata
6-2
6234C–ATARM–22-Mar-07
AT91SAM9260-EK Evaluation Board User Guide
Section 7
Revision History
7.1
Revision History
Table 7-1.
Change Request
Ref.
Document
Comments
6234A
First issue.
6234B
New Figure 2-3, ” AT91SAM9260-EK Block
Diagram”. Inserted Section 3.14, ” PIO Usage”.
Added new schematics in Section 5. Added new
Section 6, Errata.
3315
6234C
Added errata Section 6.3, ”TWI line pullups for
Fast Mode operation”.
Added errata Section 6.4, ”AT73C213 clocking”
4086
AT91SAM9260-EK Evaluation Board User Guide
4227
7-1
6234C–ATARM–22-Mar-07
Revision History
7-2
6234C–ATARM–22-Mar-07
AT91SAM9260-EK Evaluation Board User Guide
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