AT91SAM7SE-EK Evaluation Board .............................................................................................. User Guide -2 6241B–ATARM–22-Mar-07 AT91SAM7SE-EK Evaluation Board User Guide Table of Contents Section 1 Overview............................................................................................... 1-1 1.1 1.2 1.3 Scope........................................................................................................1-1 Deliverables ..............................................................................................1-1 AT91SAM7SE-EK Evaluation Board ........................................................1-1 Section 2 Setting Up the AT91SAM7SE-EK Board .............................................. 2-1 2.1 2.2 2.3 2.4 2.5 2.6 Electrostatic Warning ................................................................................2-1 Requirements............................................................................................2-1 Layout .......................................................................................................2-2 Powering Up the Board .............................................................................2-3 Getting Started..........................................................................................2-3 AT91SAM7SE-EK Block Diagram ............................................................2-4 Section 3 Board Description ................................................................................. 3-1 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 AT91SAM7SE Microcontroller ..................................................................3-1 AT91SAM7SE Block Diagram ..................................................................3-4 Memory .....................................................................................................3-5 Clock Circuitry ...........................................................................................3-5 Reset Circuitry ..........................................................................................3-5 Power Supply Circuitry..............................................................................3-5 Remote Communication ...........................................................................3-5 Audio Stereo Interface ..............................................................................3-5 User Interface ...........................................................................................3-5 Debug Interface ........................................................................................3-5 Expansion Slot ..........................................................................................3-5 PIO Usage ................................................................................................3-6 Section 4 Configuration ........................................................................................ 4-1 4.1 4.2 4.3 4.4 4.5 4.6 4.7 AT91SAM7SE-EK Evaluation Board User Guide Jumpers ....................................................................................................4-1 Audio Configuration ..................................................................................4-1 JTAG/ICE..................................................................................................4-2 Microcontroller Clock ................................................................................4-2 Memory .....................................................................................................4-2 Ethernet ....................................................................................................4-2 Miscellaneous ...........................................................................................4-3 -i 6241B–ATARM–22-Mar-07 Section 5 Schematics ........................................................................................... 5-1 5.1 Schematics ...............................................................................................5-1 Section 6 Errata .................................................................................................... 6-1 6.1 6.2 PIO Usage ................................................................................................6-1 TWI line pullups are too weak for Fast Mode operation............................6-1 Section 7 Revision History.................................................................................... 7-1 7.1 -ii 6241B–ATARM–22-Mar-07 Revision History ........................................................................................7-1 AT91SAM7SE-EK Evaluation Board User Guide Section 1 Overview 1.1 Scope The AT91SAM7SE-EK evaluation board enables the evaluation of and code development for applications running on an AT91SAM7SE device. This guide focuses on the AT91SAM7SE-EK board as an evaluation platform. 1.2 Deliverables 1.2.1 Standard Version AT91SAM7S-EK VAR The AT91SAM7SE-EK package contains the following items: ! An AT91SAM7SE-EK board ! One Universal input AC/DC power supply with US and Europe plug adapter ! One A/B-type USB cable ! One serial RS232 cable ! One CD-ROM containing summary and full datasheets, datasheets with electrical and mechanical characteristics, application notes and getting started documents for all development boards and AT91 microcontrollers. An AT91 software package with C and assembly listings is also provided. This allows the user to begin evaluating the AT91 ARM® Thumb® 32-bit microcontroller quickly. 1.3 AT91SAM7SEEK Evaluation Board The board is equipped with an AT91SAM7SE512 (128-pin LQFP package) together with the following: ! 32 Mbytes of SDRAM memory ! 256 Mbytes of NAND Flash memory ! One USB device port interface ! One DBGU serial communication port ! One additional serial communication port with RTS/CTS handshake control ! One JTAG/ICE debug interface ! One Atmel AT73C213 Stereo Audio DAC AT91SAM7SE-EK Evaluation Board User Guide 1-1 6241B–ATARM–22-Mar-07 Overview ! One power LED and two general-purpose LEDs ! One joystick and two user input pushbuttons ! One Reset pushbutton ! Three expansion connectors (PIO A, PIO B, PIO C) ! One EBI expansion BGA-like footprint connector 1-2 6241B–ATARM–22-Mar-07 AT91SAM7SE-EK Evaluation Board User Guide Section 2 Setting Up the AT91SAM7SE-EK Board 2.1 Electrostatic Warning The AT91SAM7SE-EK evaluation board is shipped in protective anti-static packaging. The board must not be subjected to high electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid touching the component pins or any other metallic element. 2.2 Requirements In order to set up the AT91SAM7SE-EK evaluation board, the following items are needed: ! The AT91SAM7SE-EK evaluation board itself. ! AC/DC power adapter (5V at 2A), 2.1 mm x 5.5 mm AT91SAM7SE-EK Evaluation Board User Guide 2-1 6241B–ATARM–22-Mar-07 Setting Up the AT91SAM7SE-EK Board 2.3 Layout 2-2 6241B–ATARM–22-Mar-07 Figure 2-1. AT91SAM7SE-EK Layout - Top View AT91SAM7SE-EK Evaluation Board User Guide Setting Up the AT91SAM7SE-EK Board Figure 2-2. AT91SAM7SE-EK Layout - Bottom View 2.4 Powering Up the Board The AT91SAM7SE-EK requires 5V DC (±5%). DC power is supplied to the board via the 2.1 mm x 5.5 mm socket J1. Coaxial plug center positive standard. 2.5 Getting Started The AT91SAM7SE-EK evaluation board is delivered with a CD-ROM containing all necessary information and step-by-step procedures for working with the most common development toolchains. Please refer to this CD-ROM, or to the AT91 web site, http://www.atmel.com/products/AT91/, for the most up-to-date information on getting started with the AT91SAM7SE-EK. AT91SAM7SE-EK Evaluation Board User Guide 2-3 6241B–ATARM–22-Mar-07 Setting Up the AT91SAM7SE-EK Board 2.6 AT91SAM7SE-EK Block Diagram MEMORY D[0..31] USERLED2 RIGHTCLIC UP DOWN LEFT RIGHT MCLK SDIN LRFS BCLK AT73C213 DOUT DIN CLK CS NRST PWM1 RAS CAS SDA10 SDWE SDCS PWM2 PB22 SDCK SDCKE SDCK PB23 PB24 PB27 PB26 A0 NBS1 PB25 A16 A17 PCK2 TD TF TK A22 A21 NANDOE NANDWE NANDCS RDYBSY MISO MOSI SPCK NPCS1 D[0..15] AT91SAM7SE NRST MOSI MISO SPCK NPCS0 01 - POWER SUPPLY USB RS232 SERIAL INTERFACES DBGU DTXD DRXD COM0 TXD RXD RTS CTS DEVICE USBCNX DDM DDP DTXD DRXD NRST TXD0 RXD0 RTS0 CTS0 TWCK TWD PC19 RAS CAS SDA10 SDWE SDCS SDCK SDCKE NBS0 NBS1 BA0 BA1 CLE ALE NANDOE NANDWE NANDCS RDYBSY D[0..15] SI SO SCK CS NOT POPULATED NRST SCL SDA NOT POPULATED 03 - MEMORY DDM DDP EXPANSION CONNECTORS D[0..31] 05 - COMMUNICATION A[0..22] RMII_MII ETHERNET FAST ETHERNET A[2..14] SDRAM USERLED1 D[0..15] NANFLASH A[0..22] A[2..14] PUSHLEFTCLIC DAC D[0..15] PWM0 SERIAL SERIAL EEPROM DATAFLASH POWERLED USER'S INTERFACE 5VDC POWER SUPPLY D[0..15] D[0..15] CMD NOT POPULATED IOW IOR CS INT PWRST SDCK A12 PA[0..31] NWE NRD NCS2 PB[0..31] PC[0..23] IRQ1 NRST NRST AD[4..7] 03 - RMII_MII ETHERNET PA[0..31] SDCK PA[0..31] PB[0..31] PB[0..31] PC[0..23] PC[0..23] NRST NRST AD[4..7] AD[4..7] 06 - EXPANSION CONNECTORS 02 - AT91SAM7SE PIO USAGE PA[0..31] PB[0..31] PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 2-4 6241B–ATARM–22-Mar-07 PWM0 PWM1 PWM2 TWD TWCK RXD0 TXD0 RTS0 CTS0 DRXD DTXD NPCS0 MISO MOSI SPCK TF TK TD NCS2 NBS1 SDA10 SDCKE SDCS SDWE CAS RAS IRQ1 NPCS1 PC[0..23] PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 NANDCS PB19 RDYBSY PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 PCK2 A[0..22] PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 NANDOE NANDWE NWE NRD PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PC16 PC17 PC18 PC19 PC20 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 PA30 PA31 D[0..31] D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 AT91SAM7SE-EK Evaluation Board User Guide Section 3 Board Description 3.1 AT91SAM7SE Microcontroller • Incorporates the ARM7TDMI® ARM® Thumb® Processor – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support • Internal High-speed Flash – 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (AT91SAM7SE512) – 256 Kbytes (AT91SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (AT91SAM7SE256) – 32 Kbytes (AT91SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (AT91SAM7SE32) – Single Cycle Access at Up to 30 MHz in Worst Case Conditions – Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed – Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms – 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit – Fast Flash Programming Interface for High Volume Production • 32 Kbytes (AT91SAM7SE512/256) or 8 Kbytes (AT91SAM7SE32) of Internal High-speed SRAM, Single-cycle Access at Maximum Speed • One External Bus Interface (EBI) – Supports SDRAM, Static Memory, Glueless Connection to CompactFlash® and ECC-enabled NANDFlash • Memory Controller (MC) – Embedded Flash Controller – Memory Protection Unit – Abort Status and Misalignment Detection • Reset Controller (RSTC) – Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector – Provides External Reset Signal Shaping and Reset Source Status • Clock Generator (CKGR) – Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL • Power Management Controller (PMC) AT91SAM7SE-EK Evaluation Board User Guide 3-1 6241B–ATARM–22-Mar-07 Board Description • • • • • • • • • • • • • • • • 3-2 6241B–ATARM–22-Mar-07 – Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode – Three Programmable External Clock Signals Advanced Interrupt Controller (AIC) – Individually Maskable, Eight-level Priority, Vectored Interrupt Sources – Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected Debug Unit (DBGU) – Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention Periodic Interval Timer (PIT) – 20-bit Programmable Counter plus 12-bit Interval Counter Windowed Watchdog (WDT) – 12-bit key-protected Programmable Counter – Provides Reset or Interrupt Signals to the System – Counter May Be Stopped While the Processor is in Debug State or in Idle Mode Real-time Timer (RTT) – 32-bit Free-running Counter with Alarm – Runs Off the Internal RC Oscillator Three Parallel Input/Output Controllers (PIO) – Eighty-eight Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os – Input Change Interrupt Capability on Each I/O Line – Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output – Schmitt Trigger on All inputs Eleven Peripheral DMA Controller (PDC) Channels One USB 2.0 Full Speed (12 Mbits per second) Device Port – On-chip Transceiver, Eight Endpoints, 2688-byte Configurable Integrated FIFOs One Synchronous Serial Controller (SSC) – Independent Clock and Frame Sync Signals for Each Receiver and Transmitter – I²S Analog Interface Support, Time Division Multiplex Support – High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) – Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation – Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support – Full Modem Line Support on USART1 One Master/Slave Serial Peripheral Interfaces (SPI) – 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects One Three-channel 16-bit Timer/Counter (TC) – Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel – Double PWM Generation, Capture/Waveform Mode, Up/Down Capability One Four-channel 16-bit PWM Controller (PWMC) One Two-wire Interface (TWI) – Master, Multi-Master and Slave Mode Support, All Two-wire Atmel EEPROMs Supported – General Call Supported in Slave Mode One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os SAM-BA™ – Default Boot program – Interface with SAM-BA Graphic User Interface AT91SAM7SE-EK Evaluation Board User Guide Board Description • IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins • Four High-current Drive I/O lines, Up to 16 mA Each • Power Supplies – Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components – 1.8V or 3,3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply – 1.8V VDDCORE Core Power Supply with Brownout Detector • Fully Static Operation: Up to 48 MHz at 1.65V and 85° C Worst Case Conditions • Available in a 128-lead LQFP Green Package, or a 144-ball LFBGA RoHS-compliant Package AT91SAM7SE-EK Evaluation Board User Guide 3-3 6241B–ATARM–22-Mar-07 Board Description 3.2 AT91SAM7SE Block Diagram Figure 3-1. AT91SAM7SE Block Diagram ICE TDI TDO TMS TCK ARM7TDMI Processor JTAG SCAN JTAGSEL TST 1.8V Voltage Regulator System Controller FIQ DRXD DTXD DBGU VDDCORE Memory Controller Embedded Address Flash Decoder Controller AIC PIO IRQ0-IRQ1 PDC Abort Status PDC VDDIO SRAM 32 Kbytes (SE512/256) or 8 Kbytes (SE32) Misalignment Detection PCK0-PCK2 PLLRC PLL XIN XOUT OSC VDDIN GND VDDOUT VDDFLASH Flash Memory Protection Unit 512 Kbytes (SE512) 256 Kbytes (SE256) 32 Kbytes (SE32) PMC ERASE RCOSC Peripheral Bridge VDDFLASH VDDCORE VDDCORE BOD POR Reset Controller Peripheral DMA Controller 11 Channels NRST PIT PGMRDY PGMNVALID PGMNOE PGMCK PGMM0-PGMM3 PGMD0-PGMD15 PGMNCMD PGMEN0-PGMEN1 Fast Flash Programming Interface APB WDT SAM-BA RTT PIOA PIOC EBI PIOB PDC PDC PDC USART1 SDRAM Controller PDC PDC SPI Static Memory Controller PDC Timer Counter TIOA0 TIOB0 TIOA1 TIOB1 TIOA2 TIOB2 TC0 ADVREF ECC Controller FIFO TC1 USB Device TC2 6241B–ATARM–22-Mar-07 DDM DDP PDC PWMC PDC PIO ADC SSC PDC TWI 3-4 SDCK Transciever TCLK0 TCLK1 TCLK2 ADTRG AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 CompactFlash NAND Flash PIO USART0 PIO RXD0 TXD0 SCK0 RTS0 CTS0 RXD1 TXD1 SCK1 RTS1 CTS1 DCD1 DSR1 DTR1 RI1 NPCS0 NPCS1 NPCS2 NPCS3 MISO MOSI SPCK D[31:0] A0/NBS0 A1/NBS2 A[15:2], A[20:18] A21/NANDALE A22/REG/NANDCLE A16/BA0 A17/BA1 NCS0 NCS1/SDCS NCS2/CFCS1 NCS3/NANDCS NRD/CFOE NWR0/NWE/CFWE NWR1/NBS1/CFIOR NBS3/CFIOW SDCKE RAS CAS SDWE SDA10 CFRNW NCS4/CFCS0 NCS5/CFCE1 NCS6/CFCE2 NCS7 NANDOE NANDWE NWAIT PWM0 PWM1 PWM2 PWM3 TF TK TD RD RK RF TWD TWCK AT91SAM7SE-EK Evaluation Board User Guide Board Description 3.3 Memory ! 512 Kbytes of Internal Flash ! 32 KBytes of Internal High Speed SRAM ! 32 Mbytes of SDRAM memory (16-bit bus width) ! 256 Mbytes of NANDFlash memory (8-bit bus width) 3.4 Clock Circuitry ! 18.432 MHz 20 pF miniature AT cut strip crystal ! Internal RC Oscillator 3.5 Reset Circuitry ! Internal reset controller with a bi-directional reset pin ! External reset push button 3.6 Power Supply Circuitry ! Embedded 1.8V regulator (drawing up to 100 mA for the core and external components) ! On board 3.3V linear regulator 3.7 Remote Communication ! One Serial interface (DBGU COM Port) via RS-232 DB9 male connectors ! One additional serial interface (COM Port 0) with RTS/CTS handshake control via RS-232 DB9 male connectors ! USB V2.0 Full-speed compliant, 12 Mbits per Second (UDP) 3.8 3.9 Audio Stereo Interface ! One Atmel stereo audio DAC (AT73C213) User Interface ! One 5-way joystick (4 directions and push for confirmation) ! One 32 Ohm/20 mW Stereo Headset output (J3) with master volume and mute controls ! Two user input pushbuttons ! Two user green LEDs ! One yellow power LED (can be also software controlled) 3.10 Debug Interface ! 20-pin JTAG/ICE interface connector ! DBGU COM Port 3.11 Expansion Slot ! All I/Os of the AT91SAM7SE are routed to peripheral extension connectors AT91SAM7SE-EK Evaluation Board User Guide 3-5 6241B–ATARM–22-Mar-07 Board Description ! All EBI Signals of the AT91SAM7SE are routed to extension footprint connectors (J14) This allows the developer to check the integrity of the components and to extend the features of the board by adding external hardware components or boards. 3.12 PIO Usage Table 3-1. PIO Controller A I/O Line Peripheral A Peripheral B Comments Function PA0 PWM0 A0_NBS0 High-Drive Power LED PA1 PWM1 A1_NBS2 High-Drive User LED 1 PA2 PWM2 A2 High-Drive User LED 2 PA3 TWD A3 High-Drive EEPROM AT24C256 (SDA) PA4 TWCK A4 EEPROM AT24C256 (SCL) PA5 RXD0 A5 RS232 COM PORT (RXD) PA6 TXD0 A6 RS232 COM PORT (TXD) PA7 RTS0 A7 RS232 COM PORT (RTS) PA8 CTS0 A8 RS232 COM PORT (CTS) PA9 DRXD A9 SERIAL DEBUG PORT(RXD) PA10 DTXD A10 SERIAL DEBUG PORT(TXD) PA11 NPCS0 A11 SPI DATAFLASH memory (Chip Select) PA12 MISO A12 SPI DATAFLASH & Audio DAC (MISO) PA13 MOSI A13 SPI DATAFLASH & Audio DAC (MOSI) PA14 SPCK A14 SPI DATAFLASH & Audio DAC (SPCK) PA15 TF A15 Audio DAC AT73C213 (LRFS) PA16 TK A16_BA0 Audio DAC AT73C213 (BCLK) PA17 TD A17_BA1 AD0 PA18 RD NBS3_CFIOW AD1 PA19 RK NCS4_CFCS0 AD2 PA20 RF NCS2_CFCS2 AD3 PA21 RXD1 NCS6_CFCE2 PA22 TXD1 NCS5_CFCE1 PA23 SCK1 NWR1_NBS1_CFIOR SDRAM DEVICE (NBS1) PA24 RTS1 SDA10 SDRAM DEVICE (SDA10) PA25 CTS1 SDCKE SDRAM DEVICE (SDCKE) PA26 DCD1 NCS1_SDCS SDRAM DEVICE (Chip Select) PA27 DTR1 SDWE SDRAM DEVICE (SDWE) PA28 DSR1 CAS SDRAM DEVICE (CAS) 3-6 6241B–ATARM–22-Mar-07 Audio DAC AT73C213 (SDIN) ETHERNET DM9000A (Chip Select) AT91SAM7SE-EK Evaluation Board User Guide Board Description Table 3-1. PIO Controller A (Continued) I/O Line Peripheral A Peripheral B Comments Function PA29 RI1 RAS SDRAM DEVICE (RAS) PA30 IRQ1 D30 ETHERNET DM9000A (IRQ) PA31 NPCS1 D31 SPI Audio DAC AT73C213 (Chip Select) Table 3-2. PIO Controller B I/O Line Peripheral A Peripheral B PB0 TIOA0 A0_NBS0 PB1 TIOB0 A1_NBS2 PB2 SCK0 A2 PB3 NPCS3 A3 PB4 TCLK0 A4 PB5 NPCS3 A5 PB6 PCK0 A6 PB7 PWM3 A7 PB8 ADTRG A8 PB9 NPCS1 A9 PB10 NPCS2 A10 PB11 PWM0 A11 PB12 PWM1 A12 PB13 PWM2 A13 PB14 PWM3 A14 PB15 TIOA1 A15 PB16 TIOB1 A16_BA0 PB17 PCK1 A17_BA1 PB18 PCK2 D16 NandFlash (NANDCS) PB19 FIQ D17 NandFlash (RDYBSY) PB20 IRQ0 D18 PB21 PCK1 D19 PB22 NPCS3 D20 RIGHT clic push button PB23 PWM0 D21 Joystick UP PB24 PWM1 D22 Joystick DOWN PB25 PWM2 D23 Joystick LEFT PB26 TIOA2 D24 Joystick RIGHT PB27 TIOB2 D25 Joystick PUSH and LEFT clic push button PB28 TCLK1 D26 AT91SAM7SE-EK Evaluation Board User Guide Comments Function ADDRES BUS (PB0..PB17) 3-7 6241B–ATARM–22-Mar-07 Board Description Table 3-2. PIO Controller B (Continued) I/O Line Peripheral A Peripheral B PB29 TCLK2 D27 PB30 NPCS2 D28 PB31 PCK2 D29 Comments Function Audio DAC AT73C213 (MCLK) Table 3-3. PIO Controller C I/O Line Peripheral A Peripheral B PC0 D0 PC1 D1 PC2 D2 PC3 D3 PC4 D4 PC5 D5 PC6 D6 PC7 D7 PC8 D8 RTS1 PC9 D9 DTR1 PC10 D10 PCK0 PC11 D11 PCK1 PC12 D12 PCK2 PC13 D13 PC14 D14 NPCS1 PC15 D15 NCS3_NANDCS PC16 A18 NWAIT PC17 A19 NANDOE NandFlash (NANDOE) PC18 A20 NANDWE NandFlash (NANDWE) PC19 A21 PC20 A22 USB_CNX (VBUS DETECT) and NandFlash (ALE). See errata section NCS7 NWR0_NWE_CFWE PC22 NRD_CFOE CFRNW 3-8 6241B–ATARM–22-Mar-07 Function DATA BUS (PC0..PC15) PC21 PC23 Comments NandFlash (CLE) NCS0 AT91SAM7SE-EK Evaluation Board User Guide Section 4 Configuration 4.1 Jumpers Table 4-1. Jumpers Designation Note: 4.2 Audio Configuration Default Setting Feature (1) J2 Closed 3.3V Jumper J5-1 Opened Erases all internal Flash memory when the board is powered. To do so, the user will have to close this jumper for at least 10 ms. J5-2 Closed VDDIO Jumper(1) J5-3 Closed VDDCORE Jumper (1) J5-4 Closed VDDIN Jumper (1) J5-5 Closed VDDPLL Jumper (1) J5-6 Closed VDDFLASH Jumper (1) 1. These jumpers are provided for power consumption measurement use. By default, they are closed. To use this feature, the user has to open the strap and insert an anmeter. Table 4-2. Audio Configuration Designation Default Setting Feature R5 Soldered Enables the use of the audio stereo DAC AT73C213 AT91SAM7SE-EK Evaluation Board User Guide 4-1 6241B–ATARM–22-Mar-07 Configuration 4.3 JTAG/ICE Table 4-3. JTAG/ICE Configuration 4.4 4.5 Microcontroller Clock Designation Default Setting Feature S1 Opened Selects ICE mode or JTAG mode (Closed) R11 Soldered Enables the ICE NRST input Table 4-4. Microcontroller Clock Configuration Designation Default Setting R13/R15 Soldered S3 Opened Feature Enables the use of 18.432MHz crystal. If external clock used, R13/R15 must be unsoldered and S3 closed. Memory Table 4-5. Memory Configuration Designation Default Setting Feature Soldered Enables MN4 Chip select access SDRAM R18 NAND FLASH (MN6x) R22 R20 S5 Soldered Soldered Opened Enables the use of NANDFlash (MN6x) Enables the use of Ready Busy signal Disables write protect SERIAL DATAFLASH (MN5) (NOT POPULATED) R26 S4 Soldered Opened Enables the use of the Serial DataFlash Disables the write protect. TWI SERIAL EEPROM (MN10) (NOT POPULATED) R30 R31 4.6 Ethernet Soldered Soldered Enables SCL access Enables SDA access NOT POPULATED Table 4-6. Ethernet Configuration 4-2 6241B–ATARM–22-Mar-07 Designation Default Setting Feature R37 Soldered Enables the use of the Ethernet controller DM9000A R11 Soldered Enables the use of the IRQ Ethernet controller AT91SAM7SE-EK Evaluation Board User Guide Configuration 4.7 Miscellaneous Refer to Section 3.12 and top level schematic for details on PIO usage. Table 4-7. Designation Default Setting Feature R4 Soldered Enables the software control of the POWER_LED R51 Soldered USB DEVICE: Enables the use of the USBCNX signal R47 Soldered R48 Soldered DBGU COM Port: Enables the use of DTXD output signal Enables the use of DRXD input RS232 COM Port 0: Enables the use of output signals R58 R59 Soldered TXD0 RTS0 RS232 COM Port 0: Enable the use of input signals R60 R61 Soldered RXD0 CTS0 TP1 N.A GND Test point TP2 N.A GND Test point. TP3 N.A GND Test point. TP4 N.A GND Test point. Refer to Section 2.6, “AT91SAM7SE-EK Block Diagram”. AT91SAM7SE-EK Evaluation Board User Guide 4-3 6241B–ATARM–22-Mar-07 Configuration 4-4 6241B–ATARM–22-Mar-07 AT91SAM7SE-EK Evaluation Board User Guide Section 5 Schematics 5.1 Schematics This section contains the following schematics: ! Board Layout And Silkscreen Printing - Top View ! Power & Audio & User Interface ! AT91SAM7SE512-LQFP128 ! Memory ! Ethernet ! Serial Interface ! Expansion AT91SAM7SE-EK Evaluation Board User Guide 5-1 6241B–ATARM–22-Mar-07 7 6 5 4 3 2 MEMORY POWER SUPPLY D[0..15] PWM0 A[0..22] A[2..14] USER'S INTERFACE USERLED1 USERLED2 RIGHTCLIC UP DOWN LEFT RIGHT PUSHLEFTCLIC DAC MCLK SDIN LRFS BCLK AT73C213 DOUT DIN CLK CS NRST PWM1 RAS CAS SDA10 SDWE SDCS PWM2 PB22 SDCK SDCKE SDCK PB23 PB24 PB27 PB26 A0 NBS1 PB25 A16 A17 PCK2 TD TF TK A22 A21 NANDOE NANDWE NANDCS RDYBSY MISO MOSI SPCK NPCS1 D[0..15] AT91SAM7SE NRST MOSI MISO SPCK NPCS0 01 - POWER SUPPLY SERIAL INTERFACES USB RS232 C DBGU DTXD DRXD COM0 TXD RXD RTS CTS DEVICE USBCNX DDM DDP DTXD DRXD NRST TXD0 RXD0 RTS0 CTS0 TWCK TWD D[0..15] A[2..14] D RAS CAS SDA10 SDWE SDCS SDRAM POWERLED SDCK SDCKE NBS0 NBS1 BA0 BA1 CLE ALE NANDOE NANDWE NANDCS RDYBSY NANFLASH 5VDC D[0..31] D D[0..15] SI SO SCK CS NOT POPULATED NRST SCL SDA NOT POPULATED C 03 - MEMORY PC19 DDM DDP EXPANSION CONNECTORS D[0..31] 05 - COMMUNICATION A[0..22] RMII_MII ETHERNET FAST ETHERNET 1 SERIAL SERIAL EEPROM DATAFLASH 8 D[0..15] D[0..15] CMD NOT POPULATED IOW IOR CS INT PWRST SDCK A12 PA[0..31] NWE NRD NCS2 PB[0..31] PC[0..23] IRQ1 NRST NRST AD[4..7] 03 - RMII_MII ETHERNET PA[0..31] SDCK PA[0..31] PB[0..31] PB[0..31] PC[0..23] PC[0..23] NRST NRST AD[4..7] AD[4..7] 06 - EXPANSION CONNECTORS 02 - AT91SAM7SE B B PIO USAGE PA[0..31] PB[0..31] PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 A PWM0 PWM1 PWM2 TWD TWCK RXD0 TXD0 RTS0 CTS0 DRXD DTXD NPCS0 MISO MOSI SPCK TF TK TD NCS2 NBS1 SDA10 SDCKE SDCS SDWE CAS RAS IRQ1 NPCS1 PC[0..23] PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 NANDCS PB19 RDYBSY PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 PCK2 A[0..22] PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PC16 PC17 PC18 PC19 PC20 NANDOE NANDWE NWE NRD A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 PA30 PA31 D[0..31] D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 A A INIT EDIT REV AT91SAM7SE-EK MODIF. SCALE JPG 12/09/06 DES. DATE 1/1 DIAGRAM This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. 8 7 6 5 4 3 2 1 VER. DATE REV. SHEET A 1 7 8 7 6 5 4 3 2 1 D D 3V3 5 SQUARE CM COPPER AREA FOR HEAT SINKING WITH NO SOLDER MASK R1 120R MN1 LT1963AEQ-3.3 J1 5V C2 100NF 1 2 J2 GND 2 + VIN VOUT GND 3 1 2.1 MM SOCKET CR1 STPS3L40S POWER LED 3V3 R2 100K 4 10V C3 10µF 5 10V C4 10µF MN2 R3 470K DS3 YELLOW FB 3 SD 3V3 3V3 CURRENT MEASURE 6 REGULATED 5V ONLY AUDIO DAC INTERFACE 3 C1 330µF 16V R4 Q1 IRLML2402 0R 1 POWERLED 2 C 15 12 14 13 PAINN VBAT CBP HPP 11 10 HPN LPHN 16 PAINP 30 MONOP 29 MONON 7 6 USER INTERFACE 3V3 R6 DS2 220R 3 2 + USERLED1 C11 100µF 6V3 1 SMODE RSTB 22 21 VDIG 24 3V3 AVDD 2 VCC_DAC AVDDHS 5 VCM 9 VREF 1 LINEL 31 AUXP 32 AUXN 4 HSR 3 HSL MCLK SDIN LRFS BCLK INGND 4 25 26 27 28 DOUT DIN CLK CS R5 0R NRST C 220R GREEN DOUT DIN CLK CS LINER + USERLED2 R8 DS1 J3 5 GREEN C10 100µF 6V3 AT73C213 8 GNDB C5 10µF C9 10µF 20 17 19 18 R7 47R C8 100NF C6 C7 100NF 100NF GND_DAC MCLK SDIN LRFS BCLK GNDD 33 23 RIGHT CLICK 3.5 PHONEJACK STEREO RIGHTCLIC BP2 GND_DAC BP3 1 2 3 JOYSTICK B VCC_DAC 4 5 6 UP RIGHT DOWN L1 4.7µH 3V3 B C12 10µF 10V LEFT PUSHLEFTCLIC LEFT CLICK BP1 R9 0R GND_DAC ADHESIVE FEET Z1 Z2 11.1 11.1 GND TEST POINT TP1 TP2 TP3 TP4 A A Z3 Z4 Z5 11.1 11.1 11.1 A INIT EDIT REV AT91SAM7SE-EK MODIF. SCALE JPG 12/09/06 DES. DATE 1/1 POWER & AUDIO & UI This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. 8 7 6 5 4 3 2 1 VER. DATE REV. SHEET A 2 7 8 7 6 5 4 3 2 1 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC[0..23] C ICE INTERFACE 5 6 7 8 3V3 69 68 67 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 44 43 42 41 40 39 38 37 36 35 34 33 RR1 100K 122 121 DDP DDM J4 D0/PC0 D1/PC1 D2/PC2 D3/PC3 D4/PC4 D5/PC5 D6/PC6 D7/PC7 D8/RTS1/PC8 D9/DTR1/PC9 D10/PCK0/PC10 D11/PCK1/PC11 D12/PCK2/PC12 D13/PC13 D14/NPCS1/PC14 D15/NCS3_NANDCS/PC15 A18/NWAIT/PC16 A19/NANDOE/PC17 A20/NANDWE/PC18 A21/PC19 A22/NCS7/PC20 NWR0_NWE_CFWE/PC21 NRD_CFOE/PC22 CFRNW/NCS0/PC23 MN3 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 PA[0..31] D 106 105 104 103 102 101 100 99 98 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 PB[0..31] D PB0/TIOA0/A0_NBS0 PB1/TIOB0/A1_NBS2 PB2/SCK0/A2 PB3/NPCS3/A3 PB4/TCLK0/A4 PB5/NPCS3/A5 PB6/PCK0/A6 PB7/PWM3/A7 PB8/ADTRG/A8 PB9/NPCS1/A9 PB10/NPCS2/A10 PB11/PWM0/A11 PB12/PWM1/A12 PB13/PWM2/A13 PB14/PWM3/A14 PB15/TIOA1/A15 PB16/TIOB1/A16_BA0 PB17/PCK1/A17_BA1 PB18/PCK2/D16 PB19/FIQ/D17 PB20/IRQ0/D18 PB21/PCK1/D19 PB22/NPCS3/D20 PB23/PWM0/D21 PB24/PWM1/D22 PB25/PWM2/D23 PB26/TIOA2/D24 PB27/TIOB2/D25 PB28/TCLK1/D26 PB29/TCLK2/D27 PB30/NPCS2/D28 PB31/PCK2/D29 NBS0_A0/PWM0/PA0 NBS2_A1/PWM1/PA1 A2/PWM2/PA2 A3/TWD/PA3 A4/TWCK/PA4 A5/RXD0/PA5 A6/TXD0/PA6 A7/RTS0/PA7 A8/CTS0/PA8 A9/DRXD/PA9 A10/DTXD/PA10 A11/NPCS0/PA11 A12/MISO/PA12 A13/MOSI/PA13 A14/SPCK/PA14 A15/TF/PA15 BA0_A16/TK/PA16 AD0/BA1_A17/TD/PA17 AD1/NBCS3_CFIOW/RD/PA18 AD2/NCS4_CFCS0/RK/PA19 AD3/NCS2_CFCS2/RF/PA20 NCS6_CFCE2/RXD1/PA21 NCS5_CFCE1/TXD1/PA22 NWR1_NBS1_CFIOR/SCK1/PA23 SDA10/RTS1/PA24 SDCKE/CTS1/PA25 SDCS_NCS1/DCD1/PA26 SDWE/DTR1/PA27 CAS/DSR1/PA28 RAS/RI1/PA29 D30/IRQ1/PA30 D31/NPCS1/PA31 AT91SAM7SE512 SDCK 32 31 30 29 28 27 26 25 24 20 19 18 17 16 15 14 13 12 11 10 9 117 116 115 114 113 112 111 110 109 108 107 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 97 SDCK C DP DM AD[4..7] 4 3 2 1 VDDPLL CURRENT MEASURE PLLRC 128 VDDPLL 22R 3V3 J5-2 73 R14 1K NRST NRST BP4 RESET 75 ERASE VDDFLASH NRST B 3V3 J5-6 10µF 100NF 100NF 100NF 100NF 100NF 10µF C19 C21 C23 C20 C24 C30 VDDCORE CURRENT MEASURE 2 4 12 J5-1 C29 C22 6 74 1 5 123 J5-3 7 10µF 8 VDDOUT 3V3 11 J5-4 TST 3V3 S3 100NF XIN C27 125 10µF XOUT C26 126 VDDIO VDDIO VDDIO VDDIO VDDIO Y1 18.432MHz R15 0R NOT POPULATED R10 3V3 21 46 71 95 120 R13 0R SMB MALE 1 S2 8 2 4 1 3 5 127 100NF 100NF 100NF 100NF 100NF C18 NOT POPULATED J6 ADVREF AD7 AD6 AD5 AD4 C13 100NF C31 C32 C33 C28 C25 B AD7 AD6 AD5 AD4 3 4 5 6 1,5K VDDIN C16 100NF C17 NOT POPULATED TDO JTAGSEL 3 R12 C14 10NF C15 1NF 66 78 3V3 9 S1 GND GND GND GND GND GND GND J5-5 VDDOUT 10 3V3 2 22 45 70 94 119 124 NRST VDDCORE VDDCORE VDDCORE VDDCORE VDDCORE 0R TDI TMS TCK 23 47 72 96 118 R11 65 77 76 VDDOUT 1 3 5 7 9 11 13 15 17 19 7 2 4 6 8 10 12 14 16 18 20 VDDIO CURRENT MEASURE VDDFLASH CURRENT MEASURE A A A INIT EDIT REV AT91SAM7SE-EK MODIF. SCALE JPG 12/09/06 DES. DATE 1/1 AT91SAM7SE512-LQFP128 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. 8 7 6 5 4 3 2 1 VER. DATE REV. SHEET A 3 7 8 7 6 5 4 3 2 1 SDRAM D[0..15] A[2..14] MN4 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 D A13 23 24 25 26 29 30 31 32 33 34 22 35 SDA10 20 21 BA0 BA1 A14 36 40 SDCKE 37 SDCK 38 NBS0 NBS1 15 39 CAS RAS 17 18 SDWE 16 19 3V3 R17 470K C R18 A0 MT48LC16M16A2 DQ0 A1 DQ1 A2 DQ2 A3 DQ3 A4 DQ4 A5 DQ5 A6 DQ6 A7 DQ7 A8 DQ8 A9 DQ9 A10 DQ10 A11 DQ11 DQ12 BA0 DQ13 BA1 DQ14 DQ15 A12 N.C VDD VDD CKE VDD VDDQ CLK VDDQ VDDQ DQML VDDQ DQMH VSS CAS VSS RAS VSS VSSQ VSSQ WE VSSQ CS VSSQ 2 4 5 7 8 10 11 13 42 44 45 47 48 50 51 53 1 14 27 3 9 43 49 28 41 54 6 12 46 52 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D 3V3 C34 C36 C38 C40 100NF 100NF 100NF 100NF C35 C37 C39 100NF 100NF 100NF C 256 Mbits 0R SDCS NOT POPULATED 3V3 NAND FLASH D[0..15] MN6A1 CLE ALE NANDOE NANDWE NANDCS 3V3 RDYBSY 3V3 R24 R25 R22 R19 R20 R21 R27 0R 0R 0R 470K 0R 1K CLE ALE nRE nWE nCE 16 17 8 18 9 CLE ALE RE WE CE RnB 7 R/B WP 19 470K B 1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 34 35 S5 WP N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C SERIAL DATAFLASH R23 470K DUAL FOOTPRINT 16-bit bus width MN6B1 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 26 28 30 32 40 42 44 46 27 29 31 33 41 43 45 47 N.C PRE N.C 39 38 36 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 3V3 VCC VCC 37 12 VSS VSS VSS 48 25 13 CLE ALE nRE nWE nCE C43 100NF C42 100NF 16 17 8 18 9 CLE ALE RE WE CE RnB 7 R/B WP 19 WP 1 2 3 4 5 6 10 11 14 15 20 21 22 23 24 25 26 3V3 8-bit bus width N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C MN5 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 29 30 31 32 41 42 43 44 N.C N.C N.C N.C N.C N.C PRE N.C N.C N.C N.C N.C 48 47 46 45 40 39 38 35 34 33 28 27 VCC VCC 37 12 VSS VSS D0 D1 D2 D3 D4 D5 D6 D7 SO SI SCK CS R26 8 1 2 4 SO SI SCK CS 3 RESET 0R NRST VCC 6 GND 7 WP 5 C41 100NF S4 WRITE PROTECT NORMALLY OPEN 3V3 R28 10K R30 3V3 R29 10K MN10 0R SCL SDA R31 0R 3V3 C44 100NF 36 13 NOT POPULATED B 6 5 SCL SDA 8 VCC 4 GND A0 A1 NC 1 2 3 WP 7 SERIAL EEPROM A A A INIT EDIT REV MODIF. AT91SAM7SE-EK SCALE JPG 12/09/06 DES. DATE 1/1 MEMORY VER. DATE REV. SHEET A 4 7 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 D D NOT POPULATED R34 470K 32 CMD IOR IOW CS IOR# IOW# CS# INT R37 0R 35 36 37 R38 0R 34 40 PWRST X2 19 20 21 TX+ 1 TX- 8 2 TD- TX- 2 RX+ 3 3 RD+ RX+ 3 C 5 CT RX- C49 100NF INT PWRST# BGGND 48 BGRES SD LED2 LED1 C50 100NF R35 49R9 1% 2 9 5 47 6 EEDIO EECK EECS 6 RD- 4 RXGND RXGND TXGND TEST J10 1 TD+ 7 4 CT RXVDD25 TXVDD25 15 33 45 41 R33 49R9 1% 16 44 X1 TX+ DM9000A CMD 100NF GND_ETH R32 49R9 1% VDD VDD VDD C C47 2 23 30 42 3V3 GND GND GND D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 MN7 DM9000AEP 18 SD0 17 SD1 16 SD2 14 SD3 13 SD4 12 SD5 11 SD6 10 SD7 31 SD8 29 SD9 28 SD10 27 SD11 26 SD12 25 SD13 24 SD14 22 SD15 43 1 D[0..15] C46 22PF Y2 25MHz 15 C45 22PF 1 46 R36 49R9 1% RX- C48 100NF 75 7 NC 75 75 6 4 5 C51 220 uF 4V 1nF GND_ETH 8 C52 100NF GND_ETH 75 7 8 J00-0061NL R39 6,80K 1% 38 39 GND_ETH RJ45 ETHERNET CONNECTOR 3V3 1K DS4 GREEN DS5 GREEN R40 SPEED 100 R41 LINK&ACT 1K C56 10µF 3V3 B B R42 0R 100NF 100NF 100NF R44 0R GND_ETH C53 C54 C55 R43 0R A A A INIT EDIT REV AT91SAM7SE-EK MODIF. SCALE JPG 12/09/06 DES. DATE 1/1 ETHERNET This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. 8 7 6 5 4 3 2 1 VER. DATE REV. SHEET A 5 7 7 6 5 4 3 2 C57 100NF D 3V3 C60 100NF R46 0R R45 100K R47 0R R48 0R 3 C14 C2+ 5 C2- 10 DTXD DRXD 3V3 MN8 1 C1+ 11 1 VCC 16 GND 15 V+ 2 V- 6 C58 100NF SERIAL DEBUG PORT C59 100NF C61 100NF 1 6 2 7 3 8 4 9 5 RXD 14 T TXD 7 T 12 R 13 9 R 8 10 R49 0R ADM3202ARNZ 15K R50 USB_CNX R51 D MALE RIGHT ANGLE 11 8 J11 0R USBCNX R52 22K 3V3 NOT POPULATED C C C62 33PF J12 1 C65 100NF 4 6 USB DEVICE INTERFACE 2 27R R56 3 27R R54 C67 15PF 5 3V3 C63 100NF DDM DDP C68 15PF R55 100K C69 100NF R57 100K 3V3 MN9 1 C1+ 3 C14 C2+ 0R 11 TXD R59 0R 10 RTS R60 0R R61 GND 15 V- RS232 COM PORT C64 100NF MALE RIGHT ANGLE C66 100NF 2 C70 100NF 6 14 T 1 6 2 7 3 8 4 9 5 RXD RTS TXD CTS 7 T 12 R 13 9 R 8 10 RXD 16 V+ 5 C2R58 NOT POPULATED VCC 0R CTS 11 R53 1,5K J13 ADM3202ARNZ B B A A A INIT EDIT REV AT91SAM7SE-EK MODIF. SCALE JPG 12/09/06 DES. DATE 1/1 SERIAL INTERFACES This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. 8 7 6 5 4 3 2 1 VER. DATE REV. SHEET A 6 7 8 7 6 5 4 3 2 1 J14 Interposer 100 TOP A[0..22] D PA[0..31] PB[0..31] PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 C D[0..31] A0 NBS0 A1 NBS2 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 PC[0..23] SPARE2 GPIO1 GPIO2 CFRST CFCD PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 SPARE1 CFIOW_NBS3 CFCS0_NCS4 CFCS1 NCS2 CFCE2 NCS6 CFCE1 NCS5 CFIOR_NBS1_NWR1 SDA10 SDCKE SDCS_NCS1 SDWE CAS RAS PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 NANDCS_NCS3 NWAIT NANDOE NANDWE NCS7 CFWE_NWE_NWR0 CFOE_NRD CFRNW_NCS0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 AD[4..7] AD4 AD5 AD6 AD7 D0 D1 D2 D5 D6 D7 D10 D11 D12 D15 D16 D17 D20 D21 D22 D25 D26 D27 D30 D31 A0 NBS0 A3 A4 A5 A8 A9 A10 A13 A14 A15 A18 A19 A20 CFRST CFCD CFRNW_NCS0 NCS2 NANDCS_NCS3 CFCS0_NCS4 CFIOW_NBS3 CFOE_NRD SDWE SDCKE CAS RAS CFCS1 CFCE2 NCS7 NANDOE NANDWE SPARE2 GPIO1 GPIO2 A1 B1 C1 A2 B2 C2 A3 B3 C3 A4 B4 C4 A5 B5 C5 A6 B6 C6 A7 B7 C7 A8 B8 C8 A9 B9 C9 A10 B10 C10 A11 B11 C11 A12 B12 C12 A13 B13 C13 A14 B14 C14 A15 B15 C15 A16 B16 C16 A17 B17 C17 A18 B18 C18 A19 B19 C19 A20 B20 C20 E1 D1 E2 D2 D4 D3 E3 D3 D9 D8 E4 D4 D14 D13 E5 D5 D19 D18 E6 D6 D24 D23 E7 D7 D29 D28 E8 D8 A2 A1 NBS2 E9 D9 A7 A6 D E10 A12 D10 A11 E11 A17 D11 A16 E12 A22 D12 A21 C E13 SDCS_NCS1 D13 CFRNW_NCS0 E14 CFWE_NWE_NWR0 D14 CFIOR_NBS1_NWR1 E15 SDA10 D15 SDCK E16 NCS6 D16 NWAIT E17 CFCE1 D17 E18 D18 E19 SPARE1 D19 SPARE1 SPARE0 E20 D20 NRST EBI CONNECTORS B PIO A PIO B J15 PA1 PA3 PA5 PA7 PA9 PA11 PA13 PA15 PA17 PA19 PA21 PA23 PA25 PA27 PA29 PA31 3V3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 J16 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 PA0 PA2 PA4 PA6 PA8 PA10 PA12 PA14 PA16 PA18 PA20 PA22 PA24 PA26 PA28 PA30 3V3 PB1 PB3 PB5 PB7 PB9 PB11 PB13 PB15 PB17 PB19 PB21 PB23 PB25 PB27 PB29 PB31 3V3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 J17 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 PB0 PB2 PB4 PB6 PB8 PB10 PB12 PB14 PB16 PB18 PB20 PB22 PB24 PB26 PB28 PB30 PC1 PC3 PC5 PC7 PC9 PC11 PC13 PC15 PC17 PC19 PC21 PC23 AD5 AD7 3V3 3V3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 B NOT POPULATED PIO C & ADC USER'S GRID AERA 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 PC0 PC2 PC4 PC6 PC8 PC10 PC12 PC14 PC16 PC18 PC20 PC22 3V3 5V NOT POPULATED 1.27 PITCH 3V3 Z10 J18-1 3V3 5V AD4 AD6 C72 47 uF 6V3 J18-2 J18-3 CR2 3.3V C71 100NF 2.54 PITCH 3V3 S6 A A 5V A INIT EDIT REV MODIF. AT91SAM7SE-EK SCALE JPG 12/09/06 DES. DATE 1/1 EXPANSION VER. DATE REV. SHEET A 7 7 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. 8 7 6 5 4 3 2 1 Schematics 5-2 6241B–ATARM–22-Mar-07 AT91SAM7SE-EK Evaluation Board User Guide Section 6 Errata 6.1 PIO Usage The PIO PC19 is erroneously used twice. USB_CNX (VBUS detect) and A21/ALE (NAND Flash Address Latch Enable) uses this PIO. There is no effect when PC19 is configured as A21 for the NAND Flash usage, but USB_CNX state (VBUS) cannot be read at the same time. The user has to swap PC19 to input mode to detect the VBUS state, but the NANDFlash cannot be accessed in this configuration. 6.2 6.3 TWI line pullups for Fast Mode operation In order to use the TWI in Fast Mode (up to 400 Kbits/s), the default 10 KΩ resistors R28 and R29 should be replaced by smaller values (e.g., 2.2 KΩ). AT73C213 clocking In the schematics (sheet 1/7, ”AT91SAM7SE-EK Diagram”), the MCLK and BCLK sources implementation does not guarantee a correct phase relation as specified in the AT73C213 datasheet. Note that there is no need to change the pull-up resistors if the TWI is used in Standard Mode (up to 100 Kbits/s). Problem Fix/Workaround In his own design, the user must make sure the BCLK and MCLK clocks generation implements the timing specified in the AT73C213 datasheet. AT91SAM7SE-EK Evaluation Board User Guide 6-1 6241B–ATARM–22-Mar-07 Errata 6-2 6241B–ATARM–22-Mar-07 AT91SAM7SE-EK Evaluation Board User Guide Section 7 Revision History 7.1 Revision History Table 7-1. Document Comments 6241A First issue. 6241B Added errata Section 6.2 ”TWI line pullups for Fast Mode operation” . Added errata Section 6.3 ”AT73C213 clocking” . AT91SAM7SE-EK Evaluation Board User Guide Change Request Ref. 4085 4226 7-1 6241B–ATARM–22-Mar-07 Revision History 7-2 6241B–ATARM–22-Mar-07 AT91SAM7SE-EK Evaluation Board User Guide Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Atmel Europe Le Krebs 8, rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-en-Yvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 1150 East Cheyenne Mtn. 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