AN 4840 - Dynex Semiconductor Ltd.

AN 4840
Gate Triggering and Gate
Characteristics
Application Note
AN4840-4 July 2014 LN31796
Authors: Colin Smith; Colin Rout
1(b) and 1(c) show curves with linear axes (2
graphs are needed to be the equivalent of Fig
1(a)). When gate drive load lines are to be
superimposed linear versions are much more
user friendly - see below.
Introduction:
In all thyristor data sheets a set of curves
showing device gate characteristics is given.
This gives information fundamental to the
correct triggering of the thyristor but the right
interpretation sometimes causes problems.
Note, the curves should be used in
conjunction with the table of ratings and
trigger characteristics given elsewhere in each
data sheet. This table gives the relevant test
conditions.
Information provided by curves
Igt, Vgt. The value of gate current, Ig and
voltage, Vg to be supplied to the thyristor to
guarantee simple triggering should always be
greater than the appropriate data book values
of Igt and Vgt. Simple triggering is adequate
for low di/dt applications only - see below.
In this application note two types of gate
curve are shown (Fig. 1a to c). Fig 1(a) shows
the traditional format with logarithmic 'X' and
'Y' axes. This version allows a wide range of
gate current and voltage to be shown. Fig
Note, that although the device may trigger at
Ig and Vg values below the Igt and Vgt values
shown, no guarantee can be given.
Fig 1a
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Igd and Vgd are the values of Ig and Vg below
which the thyristor can be guaranteed NOT to
fire. This is important for guarding against
spurious triggering caused by pick up on the
gate leads. Because it is very dependent on
applied anode - cathode voltage and junction
temperature, Igd is not provided as standard
information in data sheets. However, test
information can be provided by the factory on
request.
Fig 1b
Load line 30V, 10
Fig 1c
Gate Characteristic
This characteristic is that of the forward
biased gate-to-cathode junction, together
with associated on-chip series and parallel
resistors, e.g. gate-to-emitter shorts. The
graph shows the upper limit i.e. highest
impedance and lower limit i.e. lowest
impedance for all thyristors of that type likely
to be manufactured.
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The limits take into account the temperature
range -40 to +125C. All devices will have
characteristics between these limits.
Gate characteristic information is used in
conjunction with firing circuit output load
lines to pre-determine operating values of
gate current and voltage - see below.
Gate Rating Limits
Thyristors turn on best when Ig and Vg values
are well above Igt and Vgt limits - see below.
However, peak gate current, gate voltage and
power rating limits should not be exceeded.
Vfgm. Peak forward gate voltage.
If the open circuit voltage of the firing circuit
exceeds this rating (usually 30 volts) there is a
danger of internal voltage breakdown. In
practice, 50 or more volts can often be
achieved but is not guaranteed since some
internal device constructions are limited.
various pulse widths and repetition rates. Also
on the graph are lines of constant power.
These lines are the power limits
corresponding to the pulse powers given in
the table and are used in conjunction with
gate drive load lines. Note the limit for the
AVERAGE gate power is given by the 50Hz
10,000 µs pulse combination as 10 watts.
Matching the gate drive/firing circuit to
the thyristor triggering requirements
The basic approach is to draw the output load
line of the firing circuit onto the gate
characteristic curve. It is usually assumed that
the gate drive has a purely resistive linear
characterisation - fig 2. The characteristic is
defined by its open circuit source voltage Voc
and its short circuit current Isc. The straight
line between these 2 points represents the
Ifgm. Peak forward gate current.
This rating is determined by the
current carrying capability of internal gate
leads, bonds and surface metallisation of the
thyristor, depending on the technology.
Note that the 'X' axis of the graph
only extends to 10 amps so that the Ifgm limit
of large thyristors is not shown.
Fig.2 Output load line for gate drive
Pgm. Peak gate power.
The average heating effect of the gate
current is the issue here. Thus, a narrow
rectangular pulse of high Pqm is as
permissible as a wide pulse of low Pgm.
Included on the graph is a table showing
maximum permitted peak gate power for
internal source resistance of the gate drive.
Gate drive output is often defined in terms of
its open circuit voltage and internal source
resistance.
To select the correct gate drive load line it is
useful to draw several possibilities onto the
characteristic curve (Fig 1). Compare the 20V,
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10 ohm line drawn onto the logarithmic and
linear axis versions. Clearly, the linear version
is much easier to work with.
The first requirement for the load line is that
it must pass through the 'preferred gate drive
area' to the right of the appropriate Igt Vgt
limit point. For operation down to -40C, this
is point B. For +25C minimum operation
temperature, point A applies. Load line 10V,
14.3 ohm is adequate for 25C operation but
load line 10V, 16.6 ohm is not since it crosses
the 25C 'zone of uncertain triggering'.
Unfortunately, most applications demand
gate drive levels well above the minimum,
with good di/dt performance being the most
demanding. For DCR3030 a 30V, 10 ohm load
line is preferred. This load line lies well to the
right of Point B.
Low values of triggering Ig and Vg are
satisfactory for simple resistive loads with
minimal overload currents and low di/dt. In
this near-ideal situation a simple pulse of
10S or less would suffice, with Ig only slightly
more than Igt.
In practice, this situation is unrealistic and an
appropriate gate pulse shape must be chosen
to match the application. Fig 3 shows the
general shape for a single gate pulse. It
consists of an initial short, fast rising high
amplitude section followed by a longer low
amplitude "back-porch" section.
The back-porch section has to be long enough
to allow an inductive load anode current to
rise to the device latching current.
In most applications a CR snubber network is
connected across the thyristor. Because of
the high di/dt of the snubber discharge
current on thyristor triggering, the initial gate
pulse should be of high amplitude and rate of
rise. Where the load itself is capacitive, or
very low inductance, circuit di/dt levels are
even higher and hard gate drives are needed.
For example, the gate drive recommendation
for DCR3030 to achieve its di/dt ratings of
400A/s is 30 volt, 10 ohms, with current rise
time less than 0.5s. High gate drive is only
necessary for the duration of the turn-on
period - a few microseconds. After that the
gate amplitude may be allowed to fall to a low
maintaining value, i.e. the back-porch current.
Fig 3. Gate pulse characteristics
More on Igt, Vgt, gate pulse widths and
recommended gate drive
Two basic circuit connections should be
considered.
1) Using single thyristor elements.
2) Using series and parallel combinations.
First consider single thyristor elements.
The function of the back-porch current is to
allow the thyristor to be retriggered if the
anode current transiently dips below the
holding current value. However, it is quite
common for the gate signal to be needed for
several milliseconds after initial triggering.
This is done by providing a train of pulses for
the duration of the triggering period since a
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single long pulse would require too much
power from the gate drive.
Series and parallel combinations.
All the above remarks relating to triggering of
single thyristors apply equally to series and
parallel combinations. An additional
requirement is to ensure that all thyristors in
the combination turn on as nearly together as
is possible. This is done by reducing the  tgd
value, i.e. the difference between individual
device delay times. For this, a hard gate drive
is also required.
time) is needed for the majority of
applications. A low power gate drive is likely
to cause triggering problems. The basic pulse
should have a high current front end and low
current back-porch. In some situations a train
of these pulses may be needed.
For further information on gate drive circuits,
please see Dynex Application Note AN6148
“Thyristor Gate Drives” and also Chapter 7
section 7.2 of “ Power Electronics: Devices,
Drivers, Applications, and Passive
Components by Prof Barry Wayne Williams”
as detailed in Application Note AN6144.
Gate drive recommendations
From the above it is clear that a hard gate
drive (high current, high voltage, fast rise
Fig. 5 A typical gate signal
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AN 4840
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