7WBD383 - Translating Bus Exchange Switch

7WBD383
Translating Bus Exchange
Switch
The 7WBD383 is an advanced high−speed low−power translating
bus exchange switch in ultra−small footprints.
Features
•
•
•
•
•
•
•
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High Speed: tPD = 0.25 ns (Max) @ VCC = 4.5 V
3 W Switch Connection Between 2 Ports
Power Down Protection Provided on Inputs
Zero Bounce
TTL−Compatible Control Inputs
Ultra−Small Pb−Free Packages
These are Pb−Free Devices
MARKING
DIAGRAMS
8
1
UDFN8
MU SUFFIX
CASE 517AJ
UDFN8
1.95 x 1.0
CASE 517CA
ALM
G
XM
1
8
Micro8]
DM SUFFIX
CASE 846A
D383
AYWG
G
1
1
8
UQFN8
MU SUFFIX
CASE 523AN
1
AJ M*G
G
8
US8
US SUFFIX
CASE 493
AG M*G
G
1
A
= Assembly Location
Y
= Year
W
= Work Week
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 2
1
Publication Order Number:
7WBD383/D
7WBD383
OE
A
1
8
2
7
VCC
GND
3
6
4
5
A
B
7
6
5
OE
1
8
VCC
A
2
7
C
B
3
6
D
GND
4
5
EX
C
VCC
B
OE
8
4
GND
D
EX
1
2
3
C
D
EX
Figure 3. US8/Micro8
Figure 2. UQFN8
Figure 1. UDFN8
(Top View)
(Top Thru−View)
(Top Thru−View)
A
C
B
D
EX
OE
Figure 4. Logic Diagram
FUNCTION TABLE
Input OE
Input EX
Function
L
L
A = C; B = D
L
H
A = D; B = C
H
X
Disconnect
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2
7WBD383
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
Parameter
−0.5 to +7.0
V
VIN
Control Pin Input Voltage
−0.5 to +7.0
V
VI/O
Switch Input / Output Voltage
−0.5 to +7.0
V
IIK
Control Pin DC Input Diode Current
VIN < GND
−50
mA
IOK
Switch I/O Port DC Diode Current
VI/O < GND
−50
mA
IO
ON−State Switch Current
$128
mA
Continuous Current Through VCC or GND
$150
mA
ICC
DC Supply Current Per Supply Pin
$150
mA
IGND
DC Ground Current per Ground Pin
$150
mA
TSTG
Storage Temperature Range
−65 to +150
°C
260
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
TJ
Junction Temperature Under Bias
qJA
Thermal Resistance
PD
Power Dissipation in Still Air at 85°C
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ILATCHUP
ESD Withstand Voltage
150
°C
US8 (Note 1)
UDFN8
UQFN8
Micro8
251
111
208
392
°C/W
US8
UDFN8
UQFN8
Micro8
498
1127
601
319
mW
Level 1
Oxygen Index: 28 to 34
Human Body Mode (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Latchup Performance Above VCC and Below GND at 125 °C (Note 5)
UL 94 V−0 @ 0.125 in
> 2000
> 200
N/A
V
$200
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD22−A114−A.
3. Tested to EIA / JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
4.0
5.5
V
VCC
Positive DC Supply Voltage
VIN
Control Pin Input Voltage
0
5.5
V
VI/O
Switch Input / Output Voltage
0
5.5
V
−55
+125
°C
0
0
5
DC
nS/V
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
Control Input
Switch I/O
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
7WBD383
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
VCC
(V)
Conditions
Min
Typ
4.5
Max
Min
Unit
−1.2
V
Clamp Diode Voltage
VIH
High−Level Input Voltage
(Control)
4.0 to
5.5
VIL
Low−Level Input Voltage
(Control)
4.0 to
5.5
0.8
0.8
V
VOH
Output Voltage High
See Figure 5
Input Leakage Current
0 v VIN v 5.5 V
5.5
±0.1
±1.0
mA
IOFF
Power Off Leakage Current
VI/O = 0 to 5.5 V
0
±0.1
±1.0
mA
ICC
Quiescent Supply Current
IO = 0,
VIN = VCC or 0 V
OE = GND
OE = VCC
5.5
±1.0
±0.1
±1.0
±1.0
mA
mA
2.5
mA
DICC
Increase in Supply Current
(Control Pin)
One input at 3.4 V;
Other inputs at VCC
or GND
5.5
RON
Switch ON Resistance
VI/O = 0,
II/O = 64 mA
II/O = 30 mA
4.5
−1.2
Max
VIK
IIN
II/O = −18 mA
TA =
−555C to +1255C
TA = 255C
2.0
V
W
VI/O = 2.4,
II/O = 15 mA
VI/O = 2.4,
II/O = 15 mA
2.0
3
3
7
7
7
7
15
50
50
50
70
70
4.0
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS
VCC
(V)
Min
Typ
Max
Max
Unit
0.25
0.25
ns
4.5
4.5
ns
0.8
4.2
ns
4.6
0.8
4.6
3.0
4.8
0.8
4.8
2.9
4.4
0.8
4.4
Symbol
Parameter
tPD
Propagation Delay, Bus to Bus
See Figure 6
4.0 to
5.5
tPD−EX
Propagation Delay, EX to Bus
See Figure 6 and
Figure 7
4.0 to
5.5
Output Enable Time
See Figure 6
4.5 to
5.5
0.8
2.5
4.2
4.0
0.8
3.0
4.5 to
5.5
0.8
4.0
0.8
tEN
tDIS
CIN
Test Condition
TA =
−555C to +1255C
TA = 25 5C
Output Disable Time
Min
ns
Control Input Capacitance
VIN = 5 or 0 V
5.0
2.5
pF
CIO(ON)
Switch On Capacitance
Switch ON
5.0
10
pF
CIO(OFF)
Switch Off Capacitance
Switch OFF
5.0
5
pF
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4
7WBD383
TYPICAL DC CHARACTERISTICS
VOH, HIGH LEVEL OUTPUT VOLTAGE (V)
3.75
IOH =
−0.1 mA
3.50
−6 mA
−12 mA
−24 mA
3.25
3.00
2.75
2.50
TA = +85°C
VIN = VCC
2.25
2.00
4.50
4.75
5.00
5.25
5.50
5.75
VCC, SUPPLY VOLTAGE (V)
VOH, HIGH LEVEL OUTPUT VOLTAGE (V)
3.75
3.50
IOH =
−0.1 mA
3.25
−6 mA
−12 mA
−24 mA
3.00
2.75
2.50
TA = +25°C
VIN = VCC
2.25
2.00
4.50
4.75
5.00
5.25
5.50
5.75
VCC, SUPPLY VOLTAGE (V)
VOH, HIGH LEVEL OUTPUT VOLTAGE (V)
3.75
3.50
IOH =
−0.1 mA
3.25
−6 mA
−12 mA
−24 mA
3.00
2.75
2.50
TA = −40°C
VIN = VCC
2.25
2.00
4.50
4.75
5.00
5.25
5.50
5.75
VCC, SUPPLY VOLTAGE (V)
Figure 5. Output Voltage High vs Supply Voltage
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5
7WBD383
AC LOADING AND WAVEFORMS
From Output
Under Test
500 W
7V
S1
Open
GND
CL = 50 pF*
500 W
Test
S1
tPD
Open
tPLZ/tPZL
7V
tPHZ/tPZH
Open
*CL includes probes and jig capacitance.
1.5 V
1.5 V
Output
Control
tPZL
Output
Waveform 1
S1 at 7 V
(Note 6)
3V
Input
0V
tPLH
tPHL
VOH
1.5 V
1.5 V
Output
Waveform 2
S1 at Open
(Note 6)
VOL
Voltage Waveforms
Propagation Delay Times
1.5 V
3V
0V
tPLZ
tPZH
1.5 V
Output
1.5 V
1.5 V
3.5 V
VOL + 0.3 V
VOL
tPHZ
VOH
VOH − 0.3 V
0V
Voltage Waveforms
Enable and Disable Times
6. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control
7. All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, ZO = 50 W, tr v 2.5 ns, tf v 2.5 ns.
8. The outputs are measured one at a time, with one transition per measurement.
9. tPLZ and tPHZ are the same as tDIS.
10. tPZL and tPZH are the same as tEN.
11. tPHL and tPLH are the same as tPD.
Figure 6. tPD, tEN, tDIS Loading and Waveforms
tr 2.5 ns
tf 2.5 ns
3V
Exchange
(EX)
90%
1.5 V
10%
tPLH
GND
tPHL
Output
(A, B, C, D)
1.5 V
VOH
Output
(A, B, C, D)
VOL
1.5 V
tPHL
tPLH
Figure 7. tPD−EX Waveforms
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6
7WBD383
ORDERING INFORMATION
Package
Shipping†
7WBD383USG
US8
(Pb−Free)
3000 / Tape & Reel
7WBD383MUTAG
UDFN8
(Pb−Free)
3000 / Tape & Reel
7WBD383AMUTCG
UQFN8
(Pb−Free)
3000 / Tape & Reel
7WBD383DMR2G
Micro8
(Pb−Free)
4000 / Tape & Reel
(In Development)
UDFN8, 1.95 x 1.0, 0.5 mm Pitch
(Pb−Free)
3000 / Tape & Reel
Device
7WBD383DMUTCG
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
7WBD383
PACKAGE DIMENSIONS
UDFN8 1.8 x 1.2, 0.4P
CASE 517AJ
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 mm FROM TERMINAL TIP.
4. MOLD FLASH ALLOWED ON TERMINALS
ALONG EDGE OF PACKAGE. FLASH MAY
NOT EXCEED 0.03 ONTO BOTTOM
SURFACE OF TERMINALS.
5. DETAIL A SHOWS OPTIONAL
CONSTRUCTION FOR TERMINALS.
A B
D
0.10 C
PIN ONE
REFERENCE
ÉÉ
ÉÉ
L1
E
DETAIL A
NOTE 5
0.10 C
TOP VIEW
(A3)
0.05 C
DIM
A
A1
A3
b
b2
D
E
e
L
L1
L2
A
0.05 C
SIDE VIEW
A1
e/2
e
(b2)
C
DETAIL A
8X
1
SEATING
PLANE
L
4
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
0.30 REF
1.80 BSC
1.20 BSC
0.40 BSC
0.45
0.55
0.00
0.03
0.40 REF
MOUNTING FOOTPRINT*
SOLDERMASK DEFINED
(L2)
8
5
BOTTOM VIEW
8X
8X b
0.10
M
C A B
0.05
M
C
0.66
7X
0.22
NOTE 3
1.50
1
0.32
0.40 PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
7WBD383
PACKAGE DIMENSIONS
UDFN8 1.95x1.0, 0.5P
CASE 517CA
ISSUE O
PIN ONE
REFERENCE
0.10 C
2X
2X
ÉÉÉ
ÉÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
A B
D
E
DIM
A
A1
A3
b
D
E
e
L
L1
TOP VIEW
A3
0.05 C
A
0.05 C
A1
SIDE VIEW
C
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
7X
e/2
0.49
e
7X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.15
0.25
1.95 BSC
1.00 BSC
0.50 BSC
0.25
0.35
0.30
0.40
L
8X
0.30
4
1
L1
1.24
8
5
BOTTOM VIEW
8X
b
0.10
M
C A B
0.05
M
C
0.54
NOTE 3
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
9
1
PKG
OUTLINE
7WBD383
PACKAGE DIMENSIONS
UQFN8, 1.6x1.6, 0.5P
CASE 523AN
ISSUE O
A
B
D
ÉÉ
ÉÉ
ÉÉ
PIN ONE
REFERENCE
2X
0.10 C
2X
EXPOSED Cu
E
A1
ÇÇ
ÉÉ
MOLD CMPD
A3
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
DETAIL B
DIM
A
A1
A3
b
D
E
e
L
L1
L3
OPTIONAL
CONSTRUCTION
0.10 C
TOP VIEW
L1
(A3)
DETAIL B
L3
A
0.05 C
b
0.05 C
(0.15)
(0.10)
SIDE VIEW
C
A1
SEATING
PLANE
DETAIL A
SOLDERING FOOTPRINT*
OPTIONAL
CONSTRUCTION
1.70
8X
L3
8X
L
0.50
PITCH
1
e
5
3
1
DETAIL A
MILLIMETERS
MIN
MAX
0.45
0.60
0.00
0.05
0.13 REF
0.15
0.25
1.60 BSC
1.60 BSC
0.50 BSC
0.35
0.45
−−−
0.15
0.25
0.35
0.35
7
8
8X
b
0.10 C A B
BOTTOM VIEW
1.70
0.05 C
7X
NOTE 3
0.25
8X
0.53
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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10
7WBD383
PACKAGE DIMENSIONS
US8
CASE 493
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
MOLD FLASH. PROTRUSION AND GATE
BURR SHALL NOT EXCEED 0.140 MM
(0.0055”) PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTER−LEAD FLASH OR PROTRUSION.
INTER−LEAD FLASH AND PROTRUSION
SHALL NOT E3XCEED 0.140 (0.0055”) PER
SIDE.
5. LEAD FINISH IS SOLDER PLATING WITH
THICKNESS OF 0.0076−0.0203 MM.
(300−800 “).
6. ALL TOLERANCE UNLESS OTHERWISE
SPECIFIED ±0.0508 (0.0002 “).
−X−
A
8
J
−Y−
5
DETAIL E
B
L
1
4
R
S
G
P
U
C
−T−
SEATING
PLANE
H
0.10 (0.004) T
K
D
N
0.10 (0.004)
M
R 0.10 TYP
T X Y
V
M
DIM
A
B
C
D
F
G
H
J
K
L
M
N
P
R
S
U
V
F
DETAIL E
SOLDERING FOOTPRINT*
3.8
0.15
0.50
0.0197
1.8
0.07
0.30
0.012
1.0
0.0394
SCALE 8:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
11
MILLIMETERS
MIN
MAX
1.90
2.10
2.20
2.40
0.60
0.90
0.17
0.25
0.20
0.35
0.50 BSC
0.40 REF
0.10
0.18
0.00
0.10
3.00
3.20
0_
6_
5_
10 _
0.23
0.34
0.23
0.33
0.37
0.47
0.60
0.80
0.12 BSC
INCHES
MIN
MAX
0.075
0.083
0.087
0.094
0.024
0.035
0.007
0.010
0.008
0.014
0.020 BSC
0.016 REF
0.004
0.007
0.000
0.004
0.118
0.126
0_
6_
5_
10 _
0.010
0.013
0.009
0.013
0.015
0.019
0.024
0.031
0.005 BSC
7WBD383
PACKAGE DIMENSIONS
Micro8t
CASE 846A
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
D
HE
PIN 1 ID
E
e
b 8 PL
0.08 (0.003)
−T−
M
T B
S
A
MILLIMETERS
NOM
MAX
−−
1.10
0.08
0.15
0.33
0.40
0.18
0.23
3.00
3.10
3.00
3.10
0.65 BSC
0.40
0.55
0.70
4.75
4.90
5.05
DIM
A
A1
b
c
D
E
e
L
HE
S
SEATING
PLANE
MIN
−−
0.05
0.25
0.13
2.90
2.90
INCHES
NOM
−−
0.003
0.013
0.007
0.118
0.118
0.026 BSC
0.016
0.021
0.187
0.193
MIN
−−
0.002
0.010
0.005
0.114
0.114
MAX
0.043
0.006
0.016
0.009
0.122
0.122
0.028
0.199
A
0.038 (0.0015)
A1
L
c
SOLDERING FOOTPRINT*
8X
1.04
0.041
0.38
0.015
3.20
0.126
6X
8X
4.24
0.167
0.65
0.0256
5.28
0.208
SCALE 8:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Micro8 is a trademark of International Rectifier.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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