ROHM BH7625KS2_05

TECHNICAL NOTE
Video/Audio Interfaces for TV and DVD Recorders
NTSC-PAL Video
I/O Interface
BH7625KS2
٨Description
BH7625KS2 is a video signal selector with two built-in sync separation circuits, and two sync detector circuits. It includes
5-composit, 5-Y, 5-C, and 1-component video signal inputs that can be selected freely for each output. Additionally, The
existance of the signal outputted from outside can be judged by only this chip.
٨Features
1) Built-in 5-video, 5-Y, 5-C and 1-component inputs
2) Input terminal of the S2 standard suitability
2
3) I C-BUS control (High impedance when power supply off)
4) Built-in 0/3dB switch AMP㧔CVBS OUT, C OUT㧕
5) Built-in 0/6dB switch AMP㧔Y/CVBS OUT㧕
6) Built-in sync separation circuit㧔2 circuits SYNC OUT, V SYNC OUT㧕
7) Built-in sync detector circuit㧔2 circuits㧕
8) Built-in 3 LPF circuits㧔4 order + TRAP㧕
٨Applications
DVD-Recorder, visual instrument, etc
٨Absolute maximum ratings (Ta=25°C)
Parameter
Symbol
Power Supply Voltage
V
Power dissipation
Pd
Operating temperature range
Topr
Storage temperature range
Tstg
㧖1 Reduced by 13 mW/qC at 25qC or higher.
٨Operating range (Ta=25°C)
Parameter
Symbol
VCC1
VCC2
VCC3
Supply voltage
DVCC
SYNC VCC
VCC
Limits
7.0
1300 㧖1
-25㨪+75
-55㨪+125
Unit
V
mW
°C
°C
Limits
Unit
4.5㨪5.5
V
Ver.B Oct.2005
٨Electrical characteristics (Unless otherwise specified, Vcc1, Vcc2, Vcc3, DVCC, SYNC VCC, VCC=5V, Ta=25°C)
Item
Symbol
Limit
Unit
Conditions
128
mA
Normal Condition
12.5
16.9
mA
Standby Condition
㧙
0
10
μA
Power Down Condition
MIN.
TYP.
MAX.
ICC
71
95
VCC STBY Circuit Current
ICCST
9.38
VCC PD Circuit Current
ICCPD
㧨Whole㧪
VCC Circuit Current
㧨SW Part㧪
CVBS OUT
Cb OUT
Voltage Gain H
GV1H
2.4
2.9
3.4
dB
Vin=1.0Vpp , f=100kHz,
LPF OFF
CVBS OUT
Cb OUT
Voltage Gain L
GV1L
㧙0.7
㧙0.2
0.3
dB
Vin=1.0Vpp , f=100kHz,
LPF OFF
Y/CVBS OUT
Cy OUT
Voltage Gain H
GV2H
5.5
6.0
6.5
dB
Vin=1.0Vpp , f=100kHz,
LPF OFF
Y/CVBS OUT
Cy OUT
Voltage Gain L
GV2L
㧙0.7
㧙0.2
0.3
dB
Vin=1.0Vpp , f=100kHz,
LPF OFF
C OUT
Cr OUT
Voltage Gain H
GV3H
2.4
2.9
3.4
dB
Vin=1.0Vpp , f=100kHz,
LPF OFF
C OUT
Cr OUT
Voltage Gain L
GV3L
㧙0.7
㧙0.2
0.3
dB
Vin=1.0Vpp , f=100kHz,
LPF OFF
CVBS OUT
Cb OUT
Voltage Gain H
GV4H
2.2
2.7
3.2
dB
Vin=1.0Vpp , f=100kHz,
LPF ON
CVBS OUT
Cb OUT
Voltage Gain L
GV4L
㧙0.9
㧙0.4
0.1
dB
Vin=1.0Vpp , f=100kHz,
LPF ON
Y/CVBS OUT
Cy OUT
Voltage Gain H
GV5H
5.3
5.8
6.3
dB
Vin=1.0Vpp , f=100kHz,
LPF ON
Y/CVBS OUT
Cy OUT
Voltage Gain L
GV5L
㧙0.9
㧙0.4
0.1
dB
Vin=1.0Vpp , f=100kHz,
LPF ON
C OUT
Cr OUT
Voltage Gain H
GV6H
2.2
2.7
3.2
dB
Vin=1.0Vpp , f=100kHz,
LPF ON
C OUT
Cr OUT
Voltage Gain L
GV6L
㧙0.9
㧙0.4
0.1
dB
Vin=1.0Vpp , f=100kHz,
LPF ON
CVBS OUT
Cb OUT
Maximum Output
Level
VOM1
2.6
3.0
㧙
Vpp
f=100kHz(10kHz), THD=1%
Y/CVBS OUT
Cy OUT
Maximum Output
Level
VOM2
2.6
3.0
㧙
Vpp
f=100kHz(10kHz), THD=1%
C OUT
Cr OUT
Maximum Output
Level
VOM3
2.6
3.0
㧙
Vpp
f=100kHz(10kHz), THD=1%
CVBS OUT
Cb OUT
Frequency
Characteristic 1
GF11
㧙1.5
㧙0.5
0.5
dB
CVBS OUT
Cb OUT
Frequency
Characteristic 2
GF12
㧙
㧙38
̆27
dB
㧨SW Part㧪
2/16
Vin=1.0Vpp Gain=3dB
Vin=2.0Vpp Gain=0dB
f=6.75MHz/100kHz(LPF ON)
Vin=1.0Vpp Gain=3dB
Vin=2.0Vpp Gain=0dB
f=27MHz/100kHz (LPF ON)
Item
Symbol
Limit
MIN.
TYP.
MAX.
Unit
CVBS OUT
Cb OUT
Frequency
Characteristic 3
GF13
㧙1.0
0
1.0
dB
Y/CVBS OUT
Cy OUT
Frequency
Characteristic 1
GF21
㧙1.5
㧙0.5
0.5
dB
Y/CVBS OUT
Cy OUT
Frequency
Characteristic 2
GF22
㧙
㧙38
㧙27
dB
Y/CVBS OUT
Cy OUT
Frequency
Characteristic 3
GF23
㧙1.0
0
1.0
dB
C OUT
Cr OUT
Frequency
Characteristic 1
GF31
㧙1.5
㧙0.5
0.5
dB
C OUT
Cr OUT
Frequency
Characteristic 3
GF33
㧙1.0
0
1.0
dB
Conditions
Vin=1.0Vpp Gain=3dB
Vin=2.0Vpp Gain=0dB
f=7MHz/100kHz (Through)
Vin=1.0Vpp Gain=6dB
Vin=2.0Vpp Gain=0dB
f=6.75MHz/100kHz (LPF ON)
Vin=1.0Vpp Gain=6dB
Vin=2.0Vpp Gain=0dB
f=27MHz/100kHz (LPF ON)
Vin=1.0Vpp Gain=6dB
Vin=2.0Vpp Gain=0dB
f=7MHz/100kHz (Through)
Vin=1.0Vpp Gain=3dB
Vin=2.0Vpp Gain=0dB
f=6.75MHz/100kHz (LPF ON)
Vin=1.0Vpp Gain=3dB
Vin=2.0Vpp Gain=0dB
f=7MHz/100kHz (Through)
V-SW
Difference In Switch
Voltage Gain
ӠGV
㧙0.5
0.0
0.5
dB
f=100kHz, Vin=1.0Vpp
Y-SW
Difference In Switch
Voltage Gain
ӠGY
㧙0.5
0.0
0.5
dB
f=100kHz, Vin=1.0Vpp
C-SW
Difference In Switch
Voltage Gain
ӠGC
㧙0.5
0.0
0.5
dB
f=100kHz, Vin=1.0Vpp
V-SW
Switch Crosstalk
CTSV
㧙
㧙60
㧙55
dB
f=4.43MHz, Vin=1.0Vpp
Y-SW
Switch Crosstalk
CTSY
㧙
㧙60
㧙55
dB
f=4.43MHz, Vin=1.0Vpp
C-SW
Switch Crosstalk
CTSC
㧙
㧙60
㧙55
dB
f=4.43MHz, Vin=1.0Vpp
VЊYЊC
Channel Crosstalk
CTCH
㧙
㧙60
㧙55
dB
f=4.43MHz, Vin=1.0Vpp
C IN Input Impedance
ZCIN
12.5
18.0
23.5
kȍ
Minimum sync separation level
SLMIN
㧙
0.08
0.15
Vpp
LPF Conditioň111̍
V SYNC OUT Output Voltage H
VVSH
Vcc
㧙0.5
Vcc
㧙0.1
Vcc
V
No Load
V SYNC OUT Output Voltage L
VVSL
㧙
0.1
0.5
V
No Load
VD Pulse Width
TWV1
㧙
185
㧙
μsec
HD Pulse Width
TWH1
㧙
4.5
㧙
μsec
C SYNC OUT Output Voltage H
VVCH
Vcc
㧙0.5
Vcc
㧙0.1
Vcc
V
No Load
C SYNC OUT Output Voltage L
VVCL
㧙
0.1
0.5
V
No Load
㧨SYNC DETECTOR Part㧪
3/16
Vin㧩1.0Vpp,
Standard staircase signal
LPF Conditioň111̍
Vin㧩1.0Vpp,
Standard staircase signal
LPF Conditioň111̍
Item
Symbol
MIN.
Limit
TYP.
MAX.
Unit
Conditions
SYNC DET OUT Output Voltage H
VSDH
Vcc
㧙0.5
Vcc
㧙0.1
Vcc
V
No Load
SYNC DET OUT Output Voltage L
VSDL
㧙
0.1
0.5
V
No Load
S1/S2 DET Detection Level H
DLH
3.4
㧙
Vcc
V
16:9 Squeeze Signal
S1/S2 DET Detection Level M
DLM
1.3
1.9
2.5
V
4:3 Letter Box Signal
S1/S2 DET Detection Level L
DLL
0.0
㧙
0.7
V
4:3 Video Signal, No Signal
Input Voltage H
VIHADR
2.0
㧙
Vcc
V
Input Voltage L
VILADR
0.0
㧙
1.0
V
Input Impedance
ZINADR
65
100
135
kȍ
Input Voltage H
VIHIIC
2.0
㧙
Vcc
V
Input Voltage L
VILIIC
0.0
㧙
1.0
V
Input Bias Current
IBIIC
0
㧙1
㧙10
μA
Input Voltage H
VIHPD
2.0
㧙
Vcc
V
Input Voltage L
VILPD
0.0
㧙
0.7
V
Input Impedance
ZINPD
65
100
135
kȍ
Pull Down Resistance
Differential Gain
DG
㧙
0.5
㧙
%
CVBS OUT, Y/CVBS OUT,
C OUT
Differential Phase
DP
㧙
0.5
㧙
deg
CVBS OUT, Y/CVBS OUT,
C OUT
Y S/N
SNY
㧙
㧙70
㧙
dB
C S/N
SNC
㧙
㧙70
㧙
dB
㧨I2C-BUS Control㧪
㧨ADR㧪
Pull Down Resistance
㧨SCL‫ޔ‬SDA㧪
㧨PD㧪
㧨Guaranteed design parameter㧪
4/16
CVBS OUT, Y/CVBS OUT
50% White signal
Filter : 100kHz㨪6MHz
C OUT
100% Chroma signal
Filter : 100Hz㨪500kHz
٨Block diagram
%8$5
Ǵ(
%8$5
Ǵ(
%8$5
Ǵ(
%8$5
%D
Synctip
Clamp
/
Synctip
Clamp
/3)
;%[
Ǵ(
;
Ǵ(
;
Ǵ(
;
G%
+05'.
Synctip
Clamp
Synctip
Clamp
%1/210'06
Synctip
Clamp
/3)
%
Ǵ(
%
Ǵ(
Ǵ(
BIAS
BIAS
BIAS
%
BIAS
%
BIAS
&8%%
&#)0&
)0&
8%%
8%%
8%%
;%8$5%[ 176
8%%
6'56
6'56
%%T 176
5;0% 8%%
55%
C.Sync
% 5;0% 176
V.Sepa
8 5;0% 176
5&'6176
&'6%
G%
/
%.2
G%
7(67
.2( 101((
Ǵ(
)0&
+
+
.2( 101((
Synctip
Clamp
+05'.
+05'.
+05'.
%%T
/
%1/210'06
Ǵ(
)0&
+
+
Synctip
Clamp
Pedestal
Clamp
G%
/
)0&
/
/
+05'.
+05'.
+05'.
;
; 176 5'.
Ǵ(
Ǵ(
+
; 176 5'.
%8$5%D 176
G%
G%
)0&
Ǵ(
/
%.2
Pedestal
Clamp
5;0% )0&
84'(
+
+
Synctip
Clamp
95()
+05'.
Ǵ(
Synctip
Clamp
.2( 101((
Ǵ(
Synctip
Clamp
%1/210'06
%1/210'06
%8$5
+05'.
+05'.
+05'.
Ǵ(
+
/3)
/
+
G%
/
G%
%.2
Sync
LPF
Sync
Sepa
Clamp
Pulse
Ǵ(
SYNC DET1
55 &'6
00
'(7
M
55 &'6
M
55 &'6
Ǵ(
M
Logic
M
2&
5%.
5&#
#&4
//6
SYNC DET2
Sync
LPF
Sync
Sepa
00
R(
'(7
5&'6176
&'6%
Ǵ(
M
//6
R(
55%
Ǵ(
Blocks inside the dotted line operate at a standby mode
Fig.1
5/16
٨Equivalent circuit
Pin NO./Pin Name
Function
(Input/Output)
14.
10.
6.
51.
GND1
GND2
GND3
GND4
11.
13.
15.
17.
19.
40.
42.
44.
46.
48.
CVBS1
CVBS2
CVBS3
CVBS4
CVBS5
Y1_Cy
Y2
Y3
Y4
Y5
2.
4.
7.
9.
C2
C3
C4
C5
Equivalent Circuit
GND terminal
Input
Range(V)
Terminal
Voltage (V)
0
Signal input terminal
The video signal input pins is a
sync-tip-clamp.
1.4
Signal input terminal
The video signal input pins is a
resistance bias.
2.9
Signal input terminal
50. C1_Cr
25. CVBS/Cb OUT
21. Y/CVBS/Cy OUT
23. C/Cr OUT
This pin is input of chroma signal1
(C1) and Cr. Change resistor bias
and pedestal clamp.
Signal output terminal
2.9
0.7
The gain can be selected by
2
I C-BUS.
2.1
Signal input terminal
38. Cb
52. S1/S2 DET1
1. S1/S2 DET2
5. S1/S2 DET3
43. PD
18. TEST1
16. TEST2
The video signal input pin (Cb) is a
pedestal clamp.
㧙
Signal input terminal
The state of inputted signal can be
read by I2C-BUS.
PD terminal
㧙
0
Sets power down mode.
TEST terminal
0
Shorts to GND.
6/16
SSC terminal
26. SSC1
33. SSC2
29. C SYNC OUT
30. V SYNC OUT
Makes reference voltage for sync
separation.
㧙
C, V sync signal output terminal
5.0
Outputs sync separation signal.
Generate DET voltage terminal
28. DETC1
31. DETC2
Turns the MM duty pulse into the
DC voltage.
㧙
MM adjusting terminal
27. MMT1
32. MMT2
Determines the MM time constant
by the outside capacitor and
resister.
㧙
Signal output terminal
41. SDET OUT1
39. SDET OUT2
These pins output sync detecting
signal.
0
Reference voltage terminal
8. VREF
2.8
A capacitor is connected to
opposite GND.
ADR terminal
25. ADR
The pin to set slave address 90H
(91H) or 92H (93H).
0
I2C-BUS Clock input terminal
36. SCL
The pin is input clock of I2C-BUS.
Uses pull up resistor.
㧙
I2C-BUS Data terminal
35. SDA
2
The pin is data of I C-BUS. Uses
pull up resistor.
7/16
㧙
٨Description of operations
CLP࡮Clamp Pulse
CLP is pedestal clamp pulse of component input,
It is the same timing as C-SYNC.
SYNC LPF
The high frequency noise of the input signal
is shut out. Cut off frequency can be chosen
by I2C-BUS from 8 steps.
Video signal input
The input signal is different in sync det1
block and in sync det2 block for
selecting inside selecter.
Detection
The smoothing voltage by DET block is compared with
inside threshold voltage. And the existance of the video
signal is judged.
0.033uF
SYNC DET1
CLP
Sync
LPF
M.M
Sync
Sepa
Clamp
Pulse
SSC1
C.Sync
C.Sync
C SYNC OUT
V.Sepa
V.Sepa
V SYNC OUT
DET
SYNCOUT1
DETC1
0.1uF
390k
MMT1
100pF
DET
The output from MM, it's smoothing by about 100kǡ and outside capacitor.
(Smoothing means turning the duty of MM output into the DC voltage.)
SYNC DET1 block is the same as C SYNC OUT signal.
Input to the MM block
Comparator level
VCC/2 Fixation
MM1 terminal
Output to the MM block
(Input to the DET block)
̪‫ޓ‬Compose the outside application
‫ޓޓ‬so that duty may become
‫ޓޓ‬50%㨪60%‫ޓ‬when a video signal is
‫ޓޓ‬inputted normally.
This is able to monitor DETC terminal
in the OPEN state (removed capacitor)
Fig.2
΀ The detection sensitivity level of this LSI can be different depending on the tuner used. Therefore, change
the detection level setting by selecting LPF cut off and the outside part value of MMT (27 pin, 32 pin) for
each tuner when using this feature.
8/16
٨Description of operations
‫ع‬I2C-BUS Control input specifications
࡮I2C-BUS Format (WRITE MODE)
S
SLAVE
ADDRESS
A
DATA1
A
DATA2
A
P
S : Start Condition A : Acknowledge P: Stop Condition
b7
b6
b5
b4
b3
b2
b1
B0
1
0
0
1
0
0
ADR
R/W
5
4
2
1
L2
L1
L0
Y-OUT
SEL
Component
3
INSEL
LPF
ON/OFF
GAIN
0/6dB
STBY
T2
T1
T0
Slave
address
DATA1
DATA2
#㧔Don’t Care㧕
*
*
At power on, BH7625KS2 becomes “ * ”condition.
ADR and S1/S2 DET terminal inputs value’s must be set between start and stop condition and must be
consistent, as a change in value may result in poor operation.
SELECT INPUT SWITCH࡮SETTING MODE
Explanation
Slave Address (write mode) set by ADR pin
0 : Address is “90H”, when ADR
ADR
pin input is set to L
1 : Address is “92H”, when ADR pin input is
set to H
ż
INSEL5㨪4
R/W
READ/WRITE Setting Mode
0 : WRITE
1 : READ
INSEL3㨪1
Y-OUT SEL
Y-OUT SEL SW output setting
0 : L *
1:H
Component
LPF
ON/OFF
Stand-By
ż
Explanation
SYNC DET2 input setting
00 : Y1/Cy *
01 : Y1/Cy
10 : CVBS2
11 : Y2
Change setting of input selector
SW.
Refer to the next page SW
correspondence table.
Component SEL SW output
setting
0 : L (Composit) *
1 : H (Component)
AMP GAIN setting
0 : L (0dB) *
1 : H (6dB or 3dB)
LPF ON/OFF setting
0 : L 㧔OFF㧕 *
GAIN0/6dB
1 : H 㧔ON㧕
Stand-By Mode setting
0 : L (move)
1 : H(standby) ̪In standby condition, activate only the circuits in the block diagram.
INPUT SW CONTROL table
INSEL 3
INSEL 2
INSEL 1
0
0
0
Y-OUT
SEL
1
Y OUT
C OUT
0
CVBS
OUT
CVBS1
CVBS1
C1
CSYNC
etc.
CVBS1
0
0
1
1
0
CVBS2
CVBS2
C2
CVBS2
0
1
0
0
1
1
1
0
CVBS3
CVBS3
C3
CVBS3
1
0
CVBS4
CVBS4
C4
1
0
CVBS4
0
1
0
CVBS5
CVBS5
C5
CVBS5
0
0
0
0
0
0
CVBS1
Y1
C1
Y1
0
1
0
0
CVBS2
Y2
C2
Y2
0
1
0
0
0
CVBS3
Y3
C3
Y3
0
1
1
0
0
CVBS4
Y4
C4
Y4
1
0
0
0
0
CVBS5
Y5
C5
Y5
-
-
-
0
1
Cb
Y1(Cy)
C1(Cr)
Y1(Cy)
-
-
-
1
1
Cb
Cb
C1(Cr)
Y1(Cy)
Component
9/16
Explanation
L2-L0
ż
SYNC SEPA LPF Cut-off conditioning
000 : LOW (Normal)
001 : ω
010 : ω
011 : ω
100 : ω
101 : ω
110 : ω
111 : High
*
T2-T0
Explanation
DET Output decision comparator threshold
conditioning.
000 : LOW (Normal)
001 : ω
010 : ω
011 : ω *
100 : ω
101 : ω
110 : ω
111 : High
I2C-BUS Format (READ MODE)
SLAVE
A DATA1 A/N P
ADDRESS
S : Start Condition A : Acknowledge A/N : NO acknowledge P: Stop Condition
B7
b6
b5
b4
b3
b2
b1
S
Slave
address
DATA1
1
0
SD1
0
1
0
SD2
0
SD3
ADR
b0
R/W
V-DET2
V-DET1
#㧔Don’t Care㧕
* ADR and S1/S2 DET terminal inputs value’s must be set between start and stop condition and must be
consistent, as a change in value may result in poor operation.
ADR
V-DET1,
V-DET2
Explanation
Slave Address (read mode) Set by ADR pin.
0 : Address is “91H”, when ADR pin input is
set to L
1 : Address is “93H”, when ADR pin input is
set to H
The signal SDET OUT is read out.
0 : H (VIDEO signal ON)
1 : L (VIDEO signal OFF)
SD1
SD2
SD3
Explanation
The state of S1/S2 DET1㨪S1/S2 DET3 is
read out.
00 : 4:3Video signal 㧔0㨪0.7V㧕
01 : 4:3Letter Box signal 㧔1.3㨪2.5V㧕
11 : 16:9Squeeze signal 㧔3.4V㨪Vcc㧕
‫ع‬Power down state
Power down state occurs when PD terminal is LOW. Internal circuit becomes non-active in this state.
LOW
㧦Power down state
HI
㧦Active state
10/16
٨Application circuit
%8$5
Ǵ(
%8$5
Ǵ(
%8$5
Ǵ(
%8$5
%D
Synctip
Clamp
;
Ǵ(
;
;
Synctip
Clamp
; 176 5'.
+
Synctip
Clamp
%1/210'06
Synctip
Clamp
Synctip
Clamp
Pedestal
Clamp
/3)
+
%.2
%%T
Ǵ(
%
Ǵ(
%
Ǵ(
%
Ǵ(
%
BIAS
BIAS
BIAS
BIAS
&8%%
&#)0&
+05'.
+05'.
+05'.
%1/210'06
Ǵ(
%8$5%D 176
)0&
)0&
)0&
)0&
8%%
8%%
8%%
;%8$5%[ 176
8%%
6'56
6'56
%%T 176
+
G%
/
/
Ǵ(
/
.2( 101((
Ǵ(
;
G%
+
; 176 5'.
Ǵ(
84'(
G%
+05'.
+05'.
G%
/
/
Synctip
Clamp
;%[
Ǵ(
+
+
G%
%.2
Ǵ(
95()
/
+05'.
+05'.
+05'.
)0&
/3)
+
Synctip
Clamp
Pedestal
Clamp
5;0% )0&
/
Synctip
Clamp
G%
7(67
.2( 101((
Ǵ(
Synctip
Clamp
.2( 101((
Ǵ(
Synctip
Clamp
%1/210'06
%1/210'06
%8$5
+05'.
+05'.
+05'.
Ǵ(
+
/3)
/
+
G%
/
G%
BIAS
%.2
Sync
LPF
Sync
Sepa
Clamp
Pulse
5;0% 8%%
55%
C.Sync
% 5;0% 176
V.Sepa
8 5;0% 176
5&'6176
&'6%
Ǵ(
SYNC DET1
55 &'6
00
M
'(7
55 &'6
M
55 &'6
Ǵ(
M
Logic
M
2&
5%.
5&#
#&4
//6
SYNC DET2
Sync
LPF
Sync
Sepa
00
R(
'(7
5&'6176
&'6%
Ǵ(
M
//6
R(
55%
Ǵ(
Fig.3
11/16
٨Description of external components
ԘVideo signal terminal㧔Clamp terminal㧕
Use a capacitor above 0.01μF. If a capacitor is too small, a video signal may become distorted.
ԙVideo signal input terminal㧔Bias terminal㧕
Input impedance is 20kȍ(TYP) with this terminal. Therefore, set so that a chroma signal may pass fully.
ԚS1/S2 DET terminal
Chroma signal input
Chrsignal input terminal
75ȍ
Static electricity breakdown
Add countermeasure diode
R2ȍ
LPF
R1
Set up higher than
100kȍ
S terminal standard.
Fig.4
R2: Overvoltage transient can affect the static electricity protection diode connected to the VCC side.
Therefore, add a limit current resistor (R2).
ԛSSC terminal
This terminal sets the sensitivity of the sync-tip level detection.
When a capacitor is large, sensitivity becomes low, but becomes too sensitive when the capacitor is small.
But, when it is too small, it becomes poor at the noise.
ԜMMT
Adjusting the value of the outside RC, and duty of the pulse output in DETC is set.
(Pulse can be monitored when the capacitor of DETC is removed.)
Set duty to 50%㨪60% in the state so that there is no noise in the input signal.
The duty is not equal to the same time constant (RC=constant) when R is small.
ԝDETC
When a capacitor is small, detection reaction becomes fast, When it is large, detection reaction becomes slow.
Pulse is smoothed by the output impedance of 100kȍ and a capacitor connected to this terminal.
The status of the video signal is monitored by this DC voltage value.
12/16
٨Reference data
3
2
1.5
1
0.5
0
-50
-25
0
25
50
75
㪄㪍㪇
Y S/N[dB]
DIFFERENTION PHASE[deg]
2.5
DIFFERENTIAL GAIN[%]
㪄㪌㪌
㪉
㪈
㪄㪎㪇
㪄㪎㪌
㪇
㪄㪌㪇
100
TEMPERATURE[㷄]
㪄㪍㪌
㪄㪉㪌
㪇
㪉㪌
㪌㪇
㪎㪌
㪄㪏㪇
㪄㪌㪇
㪈㪇㪇
㪄㪉㪌
㪇
Fig.5 Differential Gain
㪉㪌
㪌㪇
㪎㪌
㪈㪇㪇
TEMPERATURE[㷄]
TEMPERATURE[㷄]
Fig.6 Differential Phase
Fig.7 Y S/N ratio
150
4
C S/N[dB]
㪄㪍㪇
㪄㪍㪌
㪄㪎㪇
㪄㪎㪌
3.8
125
3.6
CIRCUIT CURRENT[mA]
MAXIMUM OUTPUT VOLTAGE[V]
㪄㪌㪌
3.4
3.2
3
2.8
100
75
2.6
50
2.4
㪄㪏㪇
-50
-25
0
25
50
75
4.4
-50
100
-25
25
50
75
100
Fig.9 Maximum output voltage
(Temperature dependence)
Fig.8 C S/N ratio
PD CURRENT[uA]
12.5
10
7.5
5
0.1
150
0.08
140
0.06
130
0.04
0.02
0
-0.02
-0.04
-0.06
2.5
0
5
5.2
5.4
5.6
4.4
POWER SUPPLY VOLTAGE[V]
4.6
4.8
5
5.2
5.4
㪈㪊
㪈㪉㪅㪌
㪈㪉
㪈㪈㪅㪌
㪇
㪄㪇㪅㪇㪌
㪈㪈
㪈㪇㪅㪌
㪎㪌
Fig.14 VCC Circuit current
(Temperature dependence)
㪇
㪈㪇㪇
㪌㪇
㪈㪇㪇
Fig.13 VCC Circuit current
(Temperature dependence)
MAXIMUM OUTOUT VOLTAGE[Vpp]
PD CURRENT[uA]
STBY CURRENT[mA]
㪇㪅㪇㪌
㪌㪇
80
4
㪈㪋
㪈㪊㪅㪌
㪉㪌
90
TEMPERATURE[㷄]
㪇㪅㪈
TEMPERATURE[㷄]
100
Fig.12 VCC Circuit current (PD)
(Supply voltage dependence)
㪈㪌
㪇
5.6
110
50
㪄㪌㪇
5.6
㪈㪋㪅㪌
㪄㪉㪌
5.4
120
POWER SUPPLY VOLTAGE[V]
Fig.11 VCC Circuit current (STBY)
(Supply voltage dependence)
㪈㪇
㪄㪌㪇
5.2
60
-0.1
4.8
5
70
-0.08
4.6
4.8
Fig.10 VCC Circuit current
(Supply voltage dependence)
㪚㪠㪩㪚㪬㪠㪫㩷㪚㪬㪩㪩㪜㪥㪫㪲㫄㪘㪴
15
4.4
4.6
POWER SUPPLY VOLTAGE[V]
TEMPERATURE[㷄]
TEMPERATURE[㷄]
STBY CURRENT[mA]
0
㪄㪇㪅㪈
㪄㪌㪇
㪄㪉㪌
㪇
㪉㪌
㪌㪇
㪎㪌
㪈㪇㪇
3.8
3.6
3.4
3.2
3
2.8
2.6
2.4
㪋㪅㪋
㪋㪅㪍
㪋㪅㪏
㪌
㪌㪅㪉
㪌㪅㪋
㪌㪅㪍
TEMPERATURE[㷄]
POWER SUPPLY VOLTAGE[V]
Fig.15 VCC Circuit current PD
(Temperature dependence)
Fig.16 Maximum output voltage
(Supply voltage dependence)
13/16
85
80
75
70
65
60
-50
-25
0
25
50
75
30
90
85
INPUT IMPEDANCE [k㱅]
MINIMUM SYNC SEPERATION LEVEL[Vpp]
MINIMUM SYNC SEPERATION LEVEL[Vpp
90
80
75
70
25
20
15
65
60
10
4.4
100
4.6
4.8
5
5.2
5.4
5.6
4.4
4.6
POWER SUPPLY VOLTAGE[V]
TEMPERATURE[㷄]
Fig.17 Min synchronous isolation level
(Temperature dependence)
180
10
135
5.0V
0
4.4V
PHASE 6dB
-45
-30
GAIN 0dB
90
100C
-10
15
-50C
-50
-25
0
25
50
75
CVBS/Cb OUT
TEMP=25ͨ ,LPF=OFF
100
10E+06
25C
FREQUENCY [Hz]
Fig.21 Frequency characteristic
(Supply voltage dependence)
-10
4.4V
-30
100C
-50C
CVBS/Cb OUT
TEMP=25ͨ ,LPF=ON
5.6V
PHASE 0dB
-20
-40
4.4V
0
-45
YCVBSCy OUT
TEMP=25ͨ ,LPF=OFF
-90
5.6V
-40
CVBS/Cb OUT
VCC=5V ,LPF=ON
45
5.0V
PHASE 6dB
-30
-30
-40
90
-10
25C
-20
135
GAIN 0dB
GAIN [dB]
GAIN [dB]
5.6V
-20
GAIN 6dB
0
GAIN 0dB
5.0V
-180
100E+06
180
GAIN 3dB
GAIN 0dB
10E+06
10
0
-10
1E+06
Fig.22 Frequency characteristic
(Temperature dependence)
10
0
-135
CVBS/Cb OUT
VCC=5V ,LPF=OFF
FREQUENCY [Hz]
TEMPERATURE[㷄]
GAIN 3dB
-90
-50C
-50
100E+03
-180
100E+06
Fig.20 CIN input impedance
(Temperature dependence)
10
-45
100C
-30
-135
1E+06
0
PHASE 6dB
-40
-50
100E+03
45
25C
PHASE 3dB
-20
-90
10
GAIN [dB]
45
5.6V
4.4V
PHASE 3dB
135
0
GAIN [dB]
5.0V
-40
5.6
180
90
5.6V
-10
GAIN [dB]
INPUT IMPEDANCE[kȍ]
GAIN 0dB
20
5.4
GAIN 3dB
0
-20
5.2
10
GAIN 3dB
25
5
Fig.19 CIN input impedance
(Supply voltage dependence)
Fig.18 Min synchronous isolation level
(Supply voltage dependence)
30
4.8
POWER SUPPLY VOLTAGE[V]
5.0V
-135
4.4V
-50
100E+03
1E+06
10E+06
-50
100E+03
100E+06
1E+06
10E+06
100E+06
FREQUENCY [Hz]
Fig.23 Frequency characteristic
(Supply voltage dependence)
Fig.24 Frequency characteristic
(Temperature dependence)
GAIN [dB]
-50C
-20
PHASE 6dB
PHASE 0dB
0
100C
-30
-45
25C
-40
-135
YCVBSCy OUT
VCC=5.0V ,LPF=OFF
-50
100E+03
1E+06
-10
10E+06
-180
100E+06
5.6V
-10
4.4V
-30
100C
25C
-20
-30
YCVBSCy OUT
TEMP=25ͨ!,LPF=ON
-40
-50
100E+03
GAIN 6dB
GAIN 0dB
5.0V
-20
-90
-50C
0
GAIN 0dB
90
45
GAIN 6dB
GAIN [dB]
100C
25C
0
GAIN [dB]
GAIN 0dB
-10
-180
100E+06
Fig.25 Frequency characteristic
(Supply voltage dependence)
10
135
0
10E+06
10
180
GAIN 6dB
1E+06
FREQUENCY [Hz]
FREQUENCY [Hz]
10
-50
100E+03
-50C
YCVBSCy OUT
VCC=5.0V ,LPF=ON
-40
1E+06
10E+06
100E+06
FREQUENCY [Hz]
FREQUENCY [Hz]
Fig.26 Frequency characteristic
(Temperature dependence)
Fig.27 Frequency characteristic
(Supply voltage dependence)
14/16
-50
100E+03
1E+06
10E+06
100E+06
FREQUENCY [Hz]
Fig.28 Frequency characteristic
(Temperature dependence)
٨Cautions on use
1.
2.
Numbers and data in entries are representative design values and are not guaranteed values of the items.
Although ROHM is confident that the example application circuit reflects the best possible recommendations, be sure to
verify circuit characteristics for your particular application. Modification of constants for other externally connected circuits
may cause variations in both static and transient characteristics for external components as well as this Rohm IC. Allow
for sufficient margins when determining circuit constants.
3. Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings, such as the applied voltage or operating temperature range
(Topr), may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open
mode) when such damage is suffered. A physical safety measure, such as a fuse, should be implemented when using
the IC at times where the absolute maximum ratings may be exceeded.
4. GND potential
Ensure a minimum GND pin potential in all operating conditions. Make sure that no pins are at a voltage below the
GND at any time, regardless of whether it is a transient signal or not.
5. Thermal design
Perform thermal design, in which there are adequate margins, by taking into account the permissible dissipation (Pd)
in actual states of use.
6. Short circuit between terminals and erroneous mounting
Pay attention to the assembly direction of the ICs. Wrong mounting direction or shorts between terminals, GND, or other
components on the circuits, can damage the IC.
7. Operation in strong electromagnetic field
Using the ICs in a strong electromagnetic field can cause operation malfunction.
8. Supply voltage of operation
Although basic circuit function is guaranteed under normal voltage operation (4.75V㨪5.25V), ensure each parameter
complies with appropriate electrical characteristics, when using this device.
9. The outside parts must be layout nearest to the IC and lines from amplifier must be short.
10. The coupling capacitor must be layout nearest to the IC and each pin.
11. VCC for this IC should use the same power source. Impedance should be connected as low as possible for each VCC
pin and for each GND pin.
POWER DISSIPATION : Pd[mW]
٨Thermal derating characteristics
1400
1200
1000
800
600
400
200
0
-50
-25
0
25
50
75
100
AMBIENT TEMPERATURE [㷄]
Fig. 29
15/16
125
150
٨Selection of order type
7
H
B
6
2
5
K
S
2
TYPE
BH7625KS2
SQFP-T52
<Dimension>!
<Packing information>!
12.0 ± 0.3
10.0 ± 0.2
52
14
13
0.125 ± 0.1
1pin
0.1 ± 0.1
1.4 ± 0.1
1
1000pcs
Direction of product is fixed in a tray.
Direction
of feed
27
26
40
Tray(with dry pack)
Quantity
0.5
12.0 ± 0.3
10.0 ± 0.2
39
Container
0.65
0.3 ± 0.1
0.15
㧔Unit:mm)
̪Orders are available in complete units only.
The contents described herein are correct as of October, 2005
The contents described herein are subject to change without notice. For updates of the latest information, please contact and confirm with ROHM CO.,LTD.
Any part of this application note must not be duplicated or copied without our permission.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding
upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams and information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any
warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such
infringement, or arising from or connected with or related to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, implied right or license to practice or commercially exploit any intellectual property rights or other
proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer.
The products described herein utilize silicon as the main material.
The products described herein are not designed to be X ray proof.
Published by
Application Engineering Group
Catalog NO.05T394Be '05.10 ROHM C 2000 TSU
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any
means without prior permission of ROHM CO.,LTD.
The contents described herein are subject to change without notice. The specifications for the
product described in this document are for reference only. Upon actual use, therefore, please request
that specifications to be separately delivered.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard
use and operation. Please pay careful attention to the peripheral conditions when designing circuits
and deciding upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams information, described herein
are intended only as illustrations of such devices and not as the specifications for such devices. ROHM
CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any
third party's intellectual property rights or other proprietary rights, and further, assumes no liability of
whatsoever nature in the event of any such infringement, or arising from or connected with or related
to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or
otherwise dispose of the same, no express or implied right or license to practice or commercially
exploit any intellectual property rights or other proprietary rights owned or controlled by
ROHM CO., LTD. is granted to any such buyer.
Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices
(such as audio visual equipment, office-automation equipment, communications devices, electrical
appliances and electronic toys).
Should you intend to use these products with equipment or devices which require an extremely high level
of reliability and the malfunction of which would directly endanger human life (such as medical
instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers
and other safety devices), please be sure to consult with our sales representative in advance.
It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance
of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow
for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in
order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM
cannot be held responsible for any damages arising from the use of the products under conditions out of the
range of the specifications or due to non-compliance with the NOTES specified in this catalog.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
www.rohm.com
Copyright © 2008 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
Contact us : [email protected] rohm.co. jp
21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan
TEL : +81-75-311-2121
FAX : +81-75-315-0172
Appendix1-Rev2.0