INTERSIL IRF350

IRF350
Data Sheet
March 1999
15A, 400V, 0.300 Ohm, N-Channel Power
MOSFET
Features
This is an N-Channel enhancement mode silicon gate power
field effect transistor designed for applications such as
switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
They can be operated directly from integrated circuits.
• rDS(ON) = 0.300Ω
File Number 1826.3
• 15A, 400V
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
Formerly developmental type TA9399.
• High Input Impedance
Ordering Information
PART NUMBER
IRF350
PACKAGE
TO-204AA
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
BRAND
IRF350
NOTE: When ordering, include the entire part number.
Symbol
D
G
S
Packaging
JEDEC TO-204AA
TOP VIEW
DRAIN
(FLANGE)
SOURCE (PIN 2)
GATE (PIN 1)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
IRF350
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Paackage Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
IRF350
400
400
15
9.0
60
±20
150
1.2
700
-55 to 150
UNITS
V
V
A
A
A
V
W
W/oC
mJ
oC
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
TC = 25oC, Unless Otherwise Specified
Electrical Specifications
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
PARAMETER
SYMBOL
BVDSS
VGS = 0V, ID = 250µA, (Figure 10)
400
-
-
V
Gate to Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250µA
2.0
-
4.0
V
-
-
25
µA
-
-
250
µA
15
-
-
A
Zero-Gate Voltage Drain Current
IDSS
TEST CONDITIONS
VDS = Rated BVDSS, VGS = 0V
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC
On-State Drain Current (Note 2)
ID(ON)
Gate to Source Leakage Current
VGS = ±20V
-
-
±100
nA
VGS = 10V, ID = 8.0A, (Figures 8, 9)
-
0.25
0.300
Ω
gfs
VDS > ID(ON) x rDS(ON)MAX, ID = 8A, (Figure 12)
8
10
-
S
tD(ON)
VDD = 180V, ID ≈ 8.0A, RG = 4.7Ω, RL = 22.5Ω,
VGS = 10V, (Figures 17, 18)
MOSFET switching times are essentially independent of operating temperature
-
-
35
ns
-
-
65
ns
-
-
150
ns
IGSS
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
rDS(ON)
tr
Turn-Off Delay Time
tD(OFF)
Fall Time
VDS > ID(ON) x rDS(ON)MAX, VGS = 10V
tf
Total Gate Charge
(Gate to Source + Gate to Drain)
Qg
Gate to Source Charge
Qgs
VGS = 10V, ID = 18A, VDS = 0.8 x Rated BVDSS,
IG(REF) = 1.5mA (Figures 14, 19, 20)
Gate charge is essentially independent of operating
temperature
-
-
75
ns
-
79
120
nC
-
38
-
nC
-
41
-
nC
-
2000
-
pF
Gate to Drain “Miller” Charge
Qgd
Input Capacitance
CISS
Output Capacitance
COSS
-
400
-
pF
Reverse Transfer Capacitance
CRSS
-
100
-
pF
-
5.0
-
nH
-
12.5
-
nH
-
0.83
-
oC/W
-
-
30
oC/W
VGS = 0V, VDS = 25V, f = 1.0MHz, (Figure 11)
Internal Drain Inductance
LD
Measured Between the
Contact Screw on Header that is Closer to
Source and Gate Pins
and Center of Die
Internal Source Inductance
LS
Measured From The
Source Lead, 6mm
(0.25in) From Header to
Source Bonding Pad
Modified MOSFET Symbol Showing the Internal
Devices
Inductances
D
LD
G
LS
S
Thermal Resistance Junction to Case
RθJC
Thermal Resistance Junction to Ambient
RθJA
2
Free Air Operation
IRF350
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Continuous Source to Drain Current
ISD
Pulse Source to Drain Current
(Note 3)
TEST CONDITIONS
MIN
TYP
MAX
UNITS
-
-
15
A
-
-
60
A
TJ = 25oC, ISD = 15A, VGS = 0V, (Figure 13)
-
-
1.6
V
TJ = 150oC, ISD = 15A, dISD/dt = 100A/µs
TJ = 150oC, ISD = 15A, dISD/dt = 100A/µs
-
1000
-
ns
-
6.6
-
µC
Modified MOSFET
Symbol Showing the Integral Reverse P-N
Junction Diode
ISDM
D
G
S
Source to Drain Diode Voltage (Note 2)
VSD
Reverse Recovery Time
trr
Reverse Recovered Charge
QRR
NOTES:
2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive Rating: Pulse width is limited by Maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 40V, starting TJ = 25oC, L = 5.66µH, RG = 50Ω, peak IAS = 15A. (Figures 15, 16).
Typical Performance Curves
Unless Otherwise Specified
20
ID, DRAIN CURRENT (A)
1.0
0.8
0.6
0.4
0.2
0
16
12
8
4
0
0
50
100
150
25
50
TC, CASE TEMPERATURE (oC)
75
100
150
125
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
1.0
ZθJC, NORMALIZED
THERMAL IMPEDANCE
POWER DISSIPATION MULTIPLIER
1.2
0.5
0.2
0.1
0.1
PDM
0.05
0.02
t1
t2t2
0.01
NOTES:
DUTY FACTOR: D = t1/t2
TJ = PD x ZθJC x RθJC + TC
SINGLE PULSE
0.01
10-5
10-4
0.1
10-2
10-3
t1, RECTANGULAR PULSE DURATION (S)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
3
1
10
IRF350
Typical Performance Curves
Unless Otherwise Specified (Continued)
20
100
10µs
100µs
10
1ms
10ms
100ms
OPERATION IN THIS
REGION IS LIMITED
BY rDS(ON)
1
TC = 25oC
TJ = MAX RATED
SINGLE PULSE
DC
16
12
VGS = 4.5V
4
VGS = 4.0V
VGS = 3.5V
20
50 100
200
5 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
2
VGS = 5.0V
8
0.1
1.0
0
500
0
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
IDS(ON), DRAIN TO SOURCE CURRENT (A)
ID, DRAIN CURRENT (A)
PULSE DURATION = 80µs
VGS = 10V
VGS = 5.0V
VGS = 4.5V
6
4
VGS = 4.0V
2
VGS = 3.5V
0
0
1
2
3
4
VDS, DRAIN TO SOURCE VOLTAGE (V)
5
VDS > ID(ON) x rDS(ON)MAX
PULSE DURATION = 80µs
10
8
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
rDS(ON), DRAIN TO SOURCE
ON RESISTANCE (Ω)
VGS = 10V
VGS = 20V
0.5
0.4
0.3
rDS(ON) MEASURED WITH CURRENT PULSE OF
2.0µs DURATION. INITIAL TJ = 25oC.
(HEATING EFFECT OF 2.0µs PULSE IS MINIMAL)
TJ = -55oC
2
0
0
10
40
20
50
30
ID, DRAIN CURRENT (A)
60
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
4
4
5
6
2
3
VGS, GATE TO SOURCE VOLTAGE (V)
1
7
8
70
ID = 8A
VGS = 10V
1.8
1.4
1.0
0.6
0.2
0
0
TJ = 25oC
4
2.2
0.2
TJ = 125oC
6
FIGURE 7. TRANSFER CHARACTERISTICS
0.8
0.6
300
100
150
200
250
VDS, DRAIN TO SOURCE VOLTAGE (V)
12
FIGURE 6. SATURATION CHARACTERISTICS
0.7
50
FIGURE 5. OUTPUT CHARACTERISTICS
10
8
PULSE DURATION = 80µs
VGS = 5.5V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
VGS = 6.0V
-40
0
40
80
120
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
160
IRF350
Typical Performance Curves
Unless Otherwise Specified (Continued)
4000
1.15
1.05
0.95
2400
COSS
CRSS
800
0.75
-40
0
40
80
120
0
160
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
0
10
20
30
40
VDS, DRAIN TO SOURCE VOLTAGE (V)
50
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
20
16
ISD, SOURCE TO DRAIN CURRENT (A)
2
VDS > ID(ON) x rDS(ON)MAX
PULSE DURATION = 80µs
TJ = -55oC
TJ = 25oC
12
TJ = 125oC
8
4
0
4
8
12
ID, DRAIN CURRENT (A)
16
TJ = 25oC
102
TJ = 150oC
10
1
20
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
0
1
2
3
VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
ID = 18A
15
VDS = 80V
VDS = 200V
10
VDS = 320V
5
0
0
28
56
84
112
140
Qg(TOT), TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
5
TJ = 150oC
TJ = 25oC
20
VGS, GATE TO SOURCE VOLTAGE (V)
gfs, TRANSCONDUCTANCE (S)
CISS
1600
0.85
0
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
3200
C, CAPACITANCE (pF)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.25
4
IRF350
Test Circuits and Waveforms
VDS
BVDSS
L
tP
VARY tP TO OBTAIN
IAS
+
RG
REQUIRED PEAK IAS
VDS
VDD
VDD
-
VGS
DUT
tP
0V
IAS
0
0.01Ω
tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(ON)
td(OFF)
tf
tr
RL
VDS
90%
90%
+
RG
-
VDD
10%
10%
0
DUT
90%
VGS
VGS
0
FIGURE 17. SWITCHING TIME TEST CIRCUIT
0.2µF
50%
PULSE WIDTH
10%
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
VDS
(ISOLATED
SUPPLY)
CURRENT
REGULATOR
12V
BATTERY
50%
VDD
Qg(TOT)
SAME TYPE
AS DUT
50kΩ
Qgd
0.3µF
VGS
Qgs
D
VDS
DUT
G
0
IG(REF)
S
0
IG CURRENT
SAMPLING
RESISTOR
VDS
ID CURRENT
SAMPLING
RESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
6
IG(REF)
0
FIGURE 20. GATE CHARGE WAVEFORMS
IRF350
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
7
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029