IRFF9130 Data Sheet February 1999 -6.5A, -100V, 0.300 Ohm, P-Channel Power MOSFET File Number 2216.3 Features • -6.5A, -100V This P-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. • rDS(ON) = 0.300Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance Symbol Formerly developmental type TA17511. D Ordering Information PART NUMBER IRFF9130 PACKAGE TO-205AF G BRAND IRFF9130 S NOTE: When ordering, include the entire part number. Packaging JEDEC TO-205AF DRAIN (CASE) SOURCE GATE 4-101 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRFF9130 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20MΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL IRFF9130 -100 -100 -6.5 -26 ±20 25 0.2 500 -55 to 150 UNITS V V A A V W W/oC mJ oC 300 oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = -250µA, (Figure 10) -100 - - V Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2.0 - -4.0 V VDS = Rated BVDSS, VGS = 0V - - -25 µA VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - -250 µA Zero-Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage IDSS ID(ON) IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time rDS(ON) gfs td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time tf Total Gate Charge (Gate to Source + Gate to Drain) Qg(TOT) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V -6.5 - - A VGS = ±20V - - ±100 nA VGS = -10V, ID = -3A, (Figures 8, 9) - 0.25 0.300 Ω 2.5 3.5 - S VDD = 0.5 x Rated BVDSS, ID ≈ -6.5A, RG = 9.1Ω, RL = 7.4Ω for BVDSS = -100V RL =5.8Ω for BVDSS = -80V (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature - 30 60 ns - 70 140 ns - 70 140 ns - 70 140 ns VGS = -10V, ID = -6.5A, VDS = 0.8 x Rated BVDSS, IG(REF) = -1.5mA, (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature - 25 45 nC - 13 - nC - 12 - nC - 500 - pF VDS ≥ ID(ON) x rDS(ON)MAX, ID = -3A, (Figure 12) Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS - 300 - pF Reverse-Transfer Capacitance CRSS - 100 - pF - 5.0 - nH - 15 - nH - - 5.0 oC/W - - 175 oC/W VGS = 0V, VDS = -25V, f = 1.0MHz, (Figure 11) Internal Drain Inductance LD Measured From the Drain Lead, 5mm (0.2in) From Package to Center of Die Internal Source Inductance LS Measured From The Source Lead, 5mm (0.2in) From Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances D LD G LS S Junction to Case RθJC Junction to Ambient RθJA 4-102 Typical Socket Mount IRFF9130 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode D MIN TYP MAX UNITS - - -6.5 A - - -26 A - - -1.5 V - 300 - ns - 1.8 - µC G S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time VSD trr Reverse Recovered Charge QRR TC = 25oC, ISD = 6.5A, VGS = 0V (Figure 13) TJ = 150oC, ISD = 6.5A, dISD/dt = 100A/µs TJ = 150oC, ISD = 6.5A, dISD/dt = 100A/µs NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 17.75mH, RG = 25Ω, peak IAS = 6.5A. (Figures 15, 16). Typical Performance Curves Unless Otherwise Specified -7.0 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 -5.6 -4.2 -2.8 -1.4 0 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 150 25 50 75 100 125 TC, CASE TEMPERATURE (oC) 150 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1 0.5 ZθJC, NORMALIZED THERMAL IMPEDANCE POWER DISSIPATION MULTIPLIER 1.2 0.2 0.1 PDM 0.1 0.05 t1 t2 0.02 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJC + TC 0.01 SINGLE PULSE 0.01 10-5 10-4 10-1 10-3 10-2 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 4-103 1 10 IRFF9130 Typical Performance Curves Unless Otherwise Specified (Continued) 102 -20 OPERATION IN THIS REGION IS LIMITED BY rDS(ON) VGS = -9V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10µs 100µs 10 1ms 10ms 1 TC = 25oC TJ = MAX RATED RJC = 5.0oC/W SINGLE PULSE 0.1 1 100ms VGS = -10V -16 PULSE DURATION = 80µs -12 VGS = -7V -8 VGS = -6V -4 VGS = -5V DC VGS = -4V 0 0 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) -10 ID, DRAIN CURRENT (A) ID(ON), ON-STATE DRAIN CURRENT (A) -20 VGS = -7V VGS = -9V -8 VGS = -8V VGS = -6V -6 PULSE DURATION = 80µs -4 VGS = -5V -2 VGS = -4V TJ = -55oC -8 -4 -5 0 FIGURE 6. SATURATION CHARACTERISTICS 2.2 NORMALIZED DRAIN TO SOURCE ON RESISTANCE VOLTAGE PULSE DURATION = 2µs 0.8 0.6 0.4 VGS = -20V 0.2 0 -10 -20 -30 ID, DRAIN CURRENT (A) -40 -50 FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4-104 -2 -4 -6 -8 VGS, GATE TO SOURCE VOLTAGE (V) -10 FIGURE 7. TRANSFER CHARACTERISTICS 1.0 0 -50 TJ = 125oC TJ = 25oC -12 0 -1 -2 -3 -4 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = -10V -40 VDS > ID(ON) x rDS(ON) MAX PULSE DURATION = 80µs -16 0 0 -30 FIGURE 5. OUTPUT CHARACTERISTICS -10 VGS = -10V -20 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA rDS(ON), DRAIN TO SOURCE ON RESISTANCE VGS = -8V VGS = -10V ID = -3A 1.8 1.4 1.0 0.6 0.2 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 160 IRFF9130 Typical Performance Curves Unless Otherwise Specified (Continued) 1.25 1000 1.15 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 800 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250µA 1.05 0.95 600 CISS COSS 400 0.85 200 0.75 -40 0 40 120 80 0 160 CRSS 0 -10 -20 -30 -40 VDS, DRAIN TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE -100 TJ = -55oC ISD, SOURCE TO DRAIN CURRENT (A) TJ = 25oC 4 TJ = 125oC 3 2 1 0 PULSE DURATION = 80µs 0 -4 -8 -12 ID, DRAIN CURRENT (A) -16 -10 TJ = 150oC TJ = 25oC -1 -0.1 -0.4 -20 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 VSD, SOURCE TO DRAIN VOLTAGE (V) FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 0 VGS, GATE TO SOURCE VOLTAGE (V) gfs, TRANSCONDUCTANCE (S) 5 -50 ID = -6.5A -5 -10 VDS = -80V VDS = -50V -15 VDS = -20V -20 -25 0 8 16 24 32 40 Qg(TOT), TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 4-105 -1.8 IRFF9130 Test Circuits and Waveforms VDS tAV L 0 VARY tP TO OBTAIN - RG REQUIRED PEAK IAS + VDD DUT 0V VDD tP VGS IAS IAS VDS tP 0.01Ω BVDSS FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(OFF) td(ON) tr 0 RL - DUT VGS + 10% 10% VDS VDD RG tf VGS 0 90% 90% 10% 50% 50% PULSE WIDTH 90% FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS -VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0 VDS DUT 12V BATTERY 0.2µF 50kΩ 0.3µF Qgs Qg(TOT) DUT G VGS Qgd D VDD 0 S IG(REF) IG CURRENT SAMPLING RESISTOR +VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 4-106 0 IG(REF) FIGURE 20. GATE CHARGE WAVEFORMS IRFF9130 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 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