Data Sheet

LF
PA
K
56D
BUK7K6R2-40E
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
6 November 2013
Product data sheet
1. General description
Dual standard level N-channel MOSFET in an LFPAK56D (Dual Power-SO8) package
using TrenchMOS technology. This product has been designed and qualified to
AEC Q101 standard for use in high performance automotive applications.
2. Features and benefits
•
•
•
•
•
Dual MOSFET
Q101 compliant
Repetitive avalanche rated
Suitable for thermally demanding environments due to 175 °C rating
True standard level gate with VGS(th) of greater than 1 V at 175 °C
3. Applications
•
•
•
•
12 V Automotive systems
Motors, lamps and solenoid control
Transmission control
Ultra high performance power switching
4. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
40
V
ID
drain current
VGS = 10 V; Tmb = 25 °C; Fig. 1
-
-
40
A
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
-
-
68
W
VGS = 10 V; ID = 20 A; Tj = 25 °C;
-
4.8
5.8
mΩ
-
10.5
-
nC
[1]
Static characteristics FET1 and FET2
RDSon
drain-source on-state
resistance
Fig. 11
Dynamic characteristics FET1 and FET2
QGD
gate-drain charge
ID = 20 A; VDS = 32 V; VGS = 10 V;
Tj = 25 °C; Fig. 13; Fig. 14
[1]
Continuous current is limited by package.
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
5. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
S1
source1
2
G1
gate1
3
S2
source2
4
G2
gate2
5
D2
drain2
6
D2
drain2
7
D1
drain1
8
D1
drain1
Simplified outline
8
7
6
Graphic symbol
5
D1 D1
S1
D2 D2
G1
S2
G2
mbk725
1
2
3
4
LFPAK56D (SOT1205)
6. Ordering information
Table 3.
Ordering information
Type number
Package
BUK7K6R2-40E
Name
Description
Version
LFPAK56D
Plastic single ended surface mounted package (LFPAK56D); 8
leads
SOT1205
7. Marking
Table 4.
Marking codes
Type number
Marking code
BUK7K6R2-40E
76E240
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
40
V
VDGR
drain-gate voltage
RGS = 20 kΩ
-
40
V
VGS
gate-source voltage
Tj ≤ 175 °C; DC
-20
20
V
ID
drain current
VGS = 10 V; Tmb = 25 °C; Fig. 1
[1]
-
40
A
Tmb = 100 °C; VGS = 10 V; Fig. 1
[1]
-
40
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 4
-
308
A
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
-
68
W
BUK7K6R2-40E
Product data sheet
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
Symbol
Parameter
Tstg
Tj
Conditions
Min
Max
Unit
storage temperature
-55
175
°C
junction temperature
-55
175
°C
-
40
A
-
308
A
-
157
mJ
Source-drain diode FET1 and FET2
IS
source current
Tmb = 25 °C
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
[1]
Avalanche Ruggedness FET1 and FET2
EDS(AL)S
non-repetitive drain-source
avalanche energy
[1]
[2]
[3]
ID
(A)
ID = 40 A; Vsup ≤ 40 V; VGS = 10 V;
[2][3]
Tj(init) = 25 °C; Fig. 3
Continuous current is limited by package.
Refer to application note AN10273 for further information
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C
003aak975
80
03aa16
120
Pder
(%)
60
80
(1)
40
40
20
0
0
30
60
90
120
150
Tj (°C)
(1) Capped at 40A due to package
Fig. 1.
Continuous drain current as a function of
mounting base temperature
BUK7K6R2-40E
Product data sheet
0
180
Fig. 2.
0
100
150
Tmb (°C)
200
Normalized total power dissipation as a
function of mounting base temperature
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3 / 13
BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
IAL
(A)
003aak976
102
10
(1)
(2)
1
(3)
10-1
10-3
Fig. 3.
10-2
10-1
1
tAL (ms)
10
Avalanche rating; avalanche current as a function of avalanche time
ID
(A)
003aak977
103
Limit RDSon = VDS / ID
102
tp = 10 us
100 us
10
10-1
10-1
Fig. 4.
1 ms
DC
1
1
10 ms
100 ms
10
VDS (V)
102
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
9. Thermal characteristics
Table 6.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance
from junction to
mounting base
Fig. 5
-
-
2.21
K/W
Rth(j-a)
thermal resistance
from junction to
ambient
Minimum footprint; mounted on a
printed circuit board
-
95
-
K/W
BUK7K6R2-40E
Product data sheet
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
003aak978
10
Zth(j-mb)
(K/W)
1
δ = 0.5
0.2
10-1
0.1
0.05
0.02
single shot
P
δ=
10-2
tp
10-3
10-6
Fig. 5.
10-5
10-4
10-3
10-2
10-1
tp
T
t
T
tp (s)
1
Transient thermal impedance from junction to mounting base as a function of pulse duration
10. Characteristics
Table 7.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
36
-
-
V
ID = 250 µA; VGS = 0 V; Tj = 25 °C
40
-
-
V
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C;
2.4
3
4
V
1
-
-
V
-
-
4.5
V
VDS = 40 V; VGS = 0 V; Tj = 25 °C
-
0.02
1
µA
VDS = 40 V; VGS = 0 V; Tj = 175 °C
-
-
500
µA
VGS = -20 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = 20 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = 10 V; ID = 20 A; Tj = 25 °C;
-
4.8
5.8
mΩ
-
9.5
11.4
mΩ
Static characteristics FET1 and FET2
V(BR)DSS
VGS(th)
Fig. 9; Fig. 10
ID = 1 mA; VDS = VGS; Tj = 175 °C;
Fig. 9; Fig. 10
ID = 1 mA; VDS = VGS; Tj = -55 °C;
Fig. 9; Fig. 10
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
Fig. 11
VGS = 10 V; ID = 20 A; Tj = 175 °C;
Fig. 11; Fig. 12
Dynamic characteristics FET1 and FET2
QG(tot)
total gate charge
ID = 20 A; VDS = 32 V; VGS = 10 V;
-
32.3
-
nC
QGS
gate-source charge
Tj = 25 °C; Fig. 13; Fig. 14
-
7.2
-
nC
QGD
gate-drain charge
-
10.5
-
nC
BUK7K6R2-40E
Product data sheet
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Ciss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
-
1657
2210
pF
Coss
output capacitance
Tj = 25 °C; Fig. 15
-
354
425
pF
Crss
reverse transfer
capacitance
-
208
285
pF
td(on)
turn-on delay time
VDS = 32 V; RL = 1.6 Ω; VGS = 10 V;
-
9.5
-
ns
tr
rise time
RG(ext) = 5 Ω; Tj = 25 °C; ID = 20 A
-
16
-
ns
td(off)
turn-off delay time
-
21
-
ns
tf
fall time
-
17
-
ns
Source-drain diode FET1 and FET2
VSD
source-drain voltage
IS = 15 A; VGS = 0 V; Tj = 25 °C; Fig. 16
-
0.78
1.2
V
trr
reverse recovery time
IS = 5 A; dIS/dt = -100 A/µs; VGS = 0 V;
-
25
-
ns
recovered charge
VDS = 20 V; Tj = 25 °C
-
18
-
nC
Qr
003aak980
30
RDSon
ID
(A)
25
003aak979
40
10 V
6V
VVGS
5.5VV
GS==5.5
5V
20 V
32
20
24
15
4.5 V
16
10
8
5
0
Fig. 6.
4V
0
5
10
15
VGS (V)
Drain-source on-state resistance as a function
of gate-source voltage; typical values
BUK7K6R2-40E
Product data sheet
0
20
0
0.2
0.4
0.6
0.8
VDS (V)
1
Tj = 25 °C; tp = 300 μs
Fig. 7.
Output characteristics; drain current as a
function of drain-source voltage; typical values
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
003aak982
150
ID
(A)
ID
(A)
120
10-2
90
10-3
60
10-4
30
10-5
175°C
0
Fig. 8.
003aah028
10-1
0
2
Tj = 25°C
4
6
VGS (V)
8
Transfer characteristics; drain current as a
function of gate-source voltage; typical values
10-6
Fig. 9.
003aah027
5
0
2
4
VGS (V)
6
003aak985
50
max
4
max
Sub-threshold drain current as a function of
gate-source voltage
RDSon
VGS(th)
(V)
typ
min
4.5 V
5V
40
3
typ
30
2
min
20
5.5 V
6V
10
1
VGS = 10 V
0
-60
0
60
120
T j (°C)
0
180
Fig. 10. Gate-source threshold voltage as a function of
junction temperature
BUK7K6R2-40E
Product data sheet
0
8
16
24
32
ID (A)
40
Tj = 25 °C; tp = 300 μs
Fig. 11. Drain-source on-state resistance as a function
of drain current; typical values
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
003aaj813
2
VDS
a
ID
1.6
VGS(pl)
1.2
VGS(th)
VGS
0.8
QGS1
QGS2
QGS
0.4
QGD
QG(tot)
003aaa508
0
-60
0
60
120
Tj (°C)
Fig. 13. Gate charge waveform definitions
180
Fig. 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
VGS
(V)
003aak987
10
003aak988
104
C
(pF)
8
VDS = 14 V
6
Ciss
32 V
103
4
Coss
2
0
Crss
0
6
12
18
24
30
QG (nC)
Fig. 14. Gate-source voltage as a function of gate
charge; typical values
BUK7K6R2-40E
Product data sheet
102
10-1
36
1
10
VDS (V)
102
Fig. 15. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
IS
(A)
003aak989
40
32
24
16
8
0
175°C
0
0.2
0.4
Tj = 25°C
0.6
0.8
1
VSD (V)
1.2
Fig. 16. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
BUK7K6R2-40E
Product data sheet
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
11. Package outline
Plastic single ended surface mounted package (LFPAK56D); 8 leads
E
A
SOT1205
A
b1
c1
L1
mounting
base
D
H
D1
D2
L
1
2
3
e
b
(8x)
4
w
X
c
A
E1
E2
A1
C
θ
Lp
detail X
0
2.5
A
max 1.05
nom
min
mm
5 mm
scale
Dimensions
Unit
y C
c
c1
D(1) D1(1)
A1
b
b1
0.1
0.50
4.4
0.25 0.30 4.70
0.0
0.35
4.1
0.19 0.24 4.45
4.8
D2
(ref)
3.5
E(1) E1(1)
5.30
1.8
4.95
1.6
E2
0.85
e
1.27
H
L
L1
Lp
6.2
1.3
0.55 0.85
5.9
0.8
0.30 0.40
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
Outline
version
References
IEC
JEDEC
JEITA
w
y
θ
0.25
0.1
8°
0°
sot1205_po
European
projection
Issue date
13-02-19
13-02-21
SOT1205
Fig. 17. Package outline LFPAK56D (SOT1205)
BUK7K6R2-40E
Product data sheet
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
12. Legal information
12.1 Data sheet status
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Document
status [1][2]
Product
status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification
This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Definition
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
12.2 Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product
is deemed to offer functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
BUK7K6R2-40E
Product data sheet
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
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BUK7K6R2-40E
NXP Semiconductors
Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
BUK7K6R2-40E
Product data sheet
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BUK7K6R2-40E
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Dual N-channel 40 V, 5.8 mΩ standard level MOSFET
13. Contents
1
General description ............................................... 1
2
Features and benefits ............................................1
3
Applications ........................................................... 1
4
Quick reference data ............................................. 1
5
Pinning information ............................................... 2
6
Ordering information ............................................. 2
7
Marking ................................................................... 2
8
Limiting values .......................................................2
9
Thermal characteristics .........................................4
10
Characteristics ....................................................... 5
11
Package outline ................................................... 10
12
12.1
12.2
12.3
12.4
Legal information .................................................11
Data sheet status ............................................... 11
Definitions ...........................................................11
Disclaimers .........................................................11
Trademarks ........................................................ 12
© NXP N.V. 2013. All rights reserved
For more information, please visit: http://www.nxp.com
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Date of release: 6 November 2013
BUK7K6R2-40E
Product data sheet
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6 November 2013
© NXP N.V. 2013. All rights reserved
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