DC-DC Converters Feedback and Control Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 2 Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 3 What is Feedback? A target is assigned to one or several state-variables, e.g. Vout = 12 V. A circuitry monitors Vout deviations related to Vin, Iout, T° etc. If Vout deviates from its target, an error is created and fed-back to the power stage for action. The action is a change in the control variable: duty-cycle (VM), peak current (CM) or the switching frequency. Compensating for the converter shortcomings! Input voltage Vin DC-DC Output voltage Vout Input voltage Vin action www.onsemi.com 4 control Rth Vth Vout The Feedback Implementation Vout is permanently compared to a reference voltage Vref. The reference voltage Vref is precise and stable over temperature. The error,ε = Vref − αVout, is amplified and sent to the control input. The power stage reacts to reduce ε as much as it can. Power stage - H Vout Control variable d Error amplifier - G Rupper + - Vin α - Modulator - GPWM www.onsemi.com 5 + Vp Vref Rlower Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 6 Positive or Negative Feedback? Do we want to build an oscillator? The « Plant » ε Vin(s) + Vout(s) H(s) Error voltage − G(s) Vout ( s ) Vin ( s ) = H (s) 1+ H (s)G (s) Open-loop gain T(s) ⎡ ⎤ H (s) Vout ( s ) = lim ⎢ Vin ( s ) ⎥ Vin ( s ) → 0 1 + G ( s ) H ( s ) ⎣⎢ ⎦⎥ Sign is neg for: ϕ = -180° www.onsemi.com 7 =1 To sustain self-oscillations, as Vin(s) goes to zero, quotient must go infinite Conditions for Oscillations when the open-loop gain equals 1 (0 dB) – cross over point total rotation is -360°: -180° for H(s) and -180° for G(s) ¾ we have self-sustaining oscillating conditions Total phase delay at fc: 180 -180° H(s) power stage -180° G(s) opamp Loop gain |H(s)| Gain is 1 at fc 90.0 total = -360° 0 dB 0 Loop phase arg H(s) ϕ = -180° -90.0 21 22 -180 1 10 100 1k frequency in hertz www.onsemi.com 8 10k 100k -180° The Need for Phase Margin we need phase margin when T(s) = 0 dB we need gain margin when arg T(s) = -360° T(s) 80.0 180 phase gain -90.0 -180 vdbout in db(volts) Plot1 ph_vout in degrees 0 0 0° 0 dB 2 gain margin Crossover frequency fc T(s) = 0 dB -40.0 1 -80.0 10 www.onsemi.com 9 arg T(s) = -360° 40.0 90.0 Phase margin: The margin before the loop phase rotation arg T(s) reaches -360° at T(s) = 0 dB phase margin 100 1k 10k 100k Gain margin: The margin before the loop gain T(s) reaches 0 dB at a freq. where arg T(s) = -360° Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 10 Poles and Zeros A plant (power stage) loop gain is defined by: N (s) H (s) = D (s) numerator denominator solving for N(s) = 0, the roots are called the zeros solving for D(s) = 0, the roots are called the poles Two zeros H (s) s + 5k )( s + 30k ) ( = s + 1k sz1 = −5k sz2 = −30k s p1 = −1k One pole www.onsemi.com 11 5k = 796 Hz 2π 30k = 4.77 kHz f z2 = 2π 1k = 159 Hz f p1 = 2π f z1 = Poles and Zeros A pole lags the phase by -45°at its cutoff frequency 0 Vin Vout Cutoff frequency -3 dB 20.0 R2 1k 0 -20.0 V1 AC = 1 -40.0 C1 10nF -60.0 |Vout(s)| -1 slope -20 dB/decade 1 0 -20.0 Vout ( s ) 1 1 = = Vin ( s ) 1 + sRC 1 + s -60.0 ω0 -80.0 10 ω0 = www.onsemi.com 12 -45° at cutoff -40.0 1 RC argVout(s) 100 1k 10k 100k 1Meg 2 10Meg -90° delay for f = ∞ Poles and Zeros A zero boosts the phase by +45°at its cutoff frequency 0 0 40.0 0 plot1 vdbout in db(volts) Plot1 vdb2 in db(volts) 30.0 +1 slope +20 dB/decade +1 slope +20 dB/decade 20.0 1 |Vout(s)| 1 -20.0 20.0 -40.0 Cutoff frequency -3 dB 10.0 |Vout(s)| 0 Plot2 ph_v2 in degrees 70.0 Cutoff frequency -3 dB 90° +45° at cutoff 1k frequency in hertz 90° 70.0 10k The general form of a zero: www.onsemi.com 13 1Meg 0° 10.0 100k 10Meg +45° at cutoff 10 Vin 100 C1 10nF 1k Vout s ω0 100k argVout(s) 30.0 argVout(s) G (s) = 1 + 10k frequency in hertz 50.0 0° 100 1k 90.0 30.0 10 100 2 50.0 10.0 10 plot2 ph_vout in degrees 90.0 -60.0 V1 AC = 1 R2 1k 10k frequency in hertz 100k 1Meg 2 10Meg s Vout ( s ) ω0 sRC = = Vin ( s ) 1 + sRC 1 + s ω0 1 ω0 = RC The Right Half-Plane Zero In a CCM boost, Iout is delivered during the off time: I out = I d = I L (1 − D ) Id(t) Id(t) IL1 IL0 Vin L Vin L IL(t) IL(t) Id0 Id1 d̂ t t D0Tsw Tsw D1Tsw Tsw If D brutally increases, D' reduces and Iout drops! What matters is the inductor current slew-rate Occurs in flybacks, buck-boost, Cuk etc. www.onsemi.com 14 d VL ( t ) dt The Right-Half-Plane-Zero With a RHPZ we have a boost in gain but a lag in phase! 1 Plot1 vdbout in db(volts) 40.0 20.0 |Vout(s)| +1 slope +20 dB/decade 0 LHPZ -20.0 G (s) = 1 + -40.0 Plot2 ph_vout in degrees argVout(s) G (s) = 1 − 0 -90° -90.0 2 -180 1 www.onsemi.com 15 10 ω0 RHPZ 180 90.0 s 100 1k frequency in hertz 10k 100k 1Meg s ω0 Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 16 How much Margin? The RLC Filter let us study an RLC low-pass filter, a 2nd order system R1 {R} 3 L1 {L} 2 Vin Vout 1 C1 {C} T (s) = 1 LCs 2 + RCs + 1 T (s) = 1 s2 ωr 2 + 2ζ ωr +1 1 s2 ωr 2 + s +1 ωr Q 1 LC parameters ωr = f0=235k L=10u C=1/(4*3.14159^2*f0^2*L) w0=({L}*{C})^-0.5 Q=10 R=1/((({C}/(4*{L}))^0.5)*2*{Q}) C ζ =R 4L zeta s = Q= 1 2ζ ωr resonant freq. ζ damping factor Q quality coeff. www.onsemi.com 17 The RLC Response to an Input Step changing Q affects the transient response Q=5 Q < 0.5 over damping Q = 0.5 critical damping Q > 0.5 under damping 1.80 Q=1 Plot1 vout#6, vout#5, vout#4, vout#3, vout in volts Q = 0.707 1.40 Overshoot = 65% 1.00 11 9 10 8 7 Asymptotically stable 600m Fast response and no overshoot! Q = 0.5 200m Q = 0.1 5.00u 15.0u ti www.onsemi.com 18 25.0u i 35.0u d 45.0u Where is the Analogy with T(s)? in the vicinity of the crossover point, T(s) combines: one pole at the origin, ω0 and one high frequency pole, ω2 9 Link the closed-loop response to the open-loop phase margin: 180 T (s) = T(s) 80.0 phase gain -90.0 0 T (s) 0° 0 dB 2 -40.0 Link open-loop ϕm with closed-loop Q -80.0 10 www.onsemi.com 19 100 1k = 1 s2 ω0ω2 + s ω0 (CL) +1 1 -1 -180 1+ T (s) T (s) -2 10k 1+ T (s) 100k (OL) Close the loop 40.0 vdbout in db(volts) 0 ph_vout in degrees 90.0 1 ⎛ s ⎞⎛ s ⎞ 1 + ⎜ ⎟⎜ ⎟ ω ω 2 ⎠ ⎝ 0 ⎠⎝ = 1 s2 ωr 2 + s +1 ωr Q Closed-Loop Q Versus Open-Loop ϕm a Q factor of 0.5 (critical response) implies a ϕm of 76° a 45° ϕm corresponds to a Q of 1.2: oscillatory response! 10 Q 7.5 ( 1+ tan( φ) ) 2 1 4 ϕm 5 tan( φ) 2.5 0.5 0 0 25 50 φ⋅ www.onsemi.com 20 360 2⋅ π 75 76° 100 Summary on the Design Criteria compensate the open-loop gain for a phase margin of 70° make sure the open-loop gain margin is better than 15 dB never accept a phase margin lower than 45° in worst case PM = 10° 5.12 PM = 25° PM = 45° PM = 76° Plot2 vout2#a, vout2, vout2#b, vout2#d in volts 5.06 5.00 5 1 3 2 f ( Cout , f c , ΔI out ) 4.94 f ( PM ) 4.88 300u www.onsemi.com 21 900u 1.50m time in seconds 2.10m 2.70m Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 22 DC-DC Output Impedance A DC-DC conv. combines an inductor and a capacitor As f is swept, different elements dominate Zout,OL Rlf 10m Lout 100u 4 1 Open-loop model 2 Z0 Rlf 20.0 Vout 2 ⎛ Rlf ⎞ 1+ ⎜ ⎟ ⎝ Z0 ⎠ 2 f0 Zout (dBΩ) I1 AC = 1 3 Cout 1000uF plot1 vdbout in db(volts) 0 Resr 1m Lout -20.0 f (Hz) Cout -40.0 RLf Resr -60.0 A buck equivalent circuit ⎛ 1 ⎞ Z out = ( sLout + RLf ) || ⎜ Resr + ⎟ sCout ⎠ ⎝ www.onsemi.com 23 2 Crossover region 1 10 100 1k frequency in hertz 10k 100k To avoid stability issues, fc >> f0 1Meg Closing the Loop… At the crossover frequency Zout,CL ≈ Zout,OL 100 |T(s)| fc Plot1 vdbout#b, vdbout, vdberr in db(volts) 50.0 0 |Zout,OL| 2 -50.0 5 3 |Zout,CL|≈| Zout,OL| |Zout,CL| -100 1 10 100 1k frequency in hertz www.onsemi.com 24 10k 100k Calculating the Output Impedance the closed-loop output impedance is dominated by Cout Z out ,CL 1 1 1 ≈ ≈ 2π f c Cout 1 + T ( s ) 2π f cCout 1 2 − 2 cos (ϕm ) 2 Zout improves Zout degrades Open-loop phase margin affects the closed-loop output impedance 1 1 + T ( fc ) 1 ϕm ° 0 www.onsemi.com 25 20 40 60 80 An Example with a Buck Let’s assume an output capacitor of 1 mF The spec states a 80 mV undershoot for a 2 A step How to select the crossover frequency? ΔVout ≈ ΔI out 2π f c Cout 2 fc ≈ = 4 kHz 80m ×1m × 2π fc ≈ ΔI out ΔVout Cout 2π 1 Z Cout @ 4 kHz = = 40 mΩ 2π × 4k ×1m Select a 1000-µF capacitor featuring less than a 40-mΩ ESR www.onsemi.com 26 Setting the Right Crossover Frequency 180 80.0 90.0 40.0 0 -90.0 vdberr in db(volts) Plot1 ph_verr in degrees Compensate the converter for a 4 kHz fc Compensated open-loop gain Buck operated in voltage-mode ϕm = 70° phase 0 4 fc -40.0 3 gain -180 -80.0 10 100 1k frequency in hertz 10k 4 kHz www.onsemi.com 27 100k Step Load the Output a c rLf 10m 7 L1 100u Vout 3 d 11 PWM switch VM Vin 10 vout R10 1m p I1 X3 PWMVM L = 100u Fs = 100k 16 C5 1mF H(s) vout 12 GAIN X1 GAIN K = 0.5 the load varies from 100 mA to 2.1 A C2 {C2} PWM gain R7 {R3} C1 {C1} R2 {R2} Rupper 10k 13 8 C3 {C3} 5 1 6 Verr X2 AMPSIMP V2 2.5 Rlower 10k G(s) www.onsemi.com 28 Measure the Obtained Undershoot 5.00 5 ΔV ≈ 40m Plot1 vout in volts 4.98 4.96 ΔV ≈ 40m × ΔI 2 − 2 cos (ϕm ) 2 = 70 mV 1.14 4.94 70 mV 4.92 1.61m www.onsemi.com 29 2.42m 3.23m time in seconds 4.05m 4.86m Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 30 How do we Stabilize the Converter? Select the crossover frequency fc (assume 4 kHz) Provide a high dc gain for a low static error and good input rejection Shoot for a 70° phase margin at fc Evaluate the needed phase boost at fc to meet (3) Shape the G(s) path to comply with 1, 2 and 3 40.0 180 20.0 90.0 0 ph_voutin degrees Plot1 vdboutin db(volts) 1. 2. 3. 4. 5. Gain Phase -20.0 -90.0 -40.0 -180 www.onsemi.com Asc ,CL ( s ) = 0 10 31 Open-loop Bode plot of the power stage, H(s) Arg H(s) @ fc |H(s)| @ fc 100 1k frequency in hertz 10k 1 100k Asc ,OL ( s ) 1+ T ( s) First, Provide Mid-Band Gain at Crossover 1. Adjust G(s) to boost the gain by +21 dB at crossover ¾ Create the so-called mid-band gain 180 40.0 90.0 0 ph_voutin degrees Plot1 vdboutin db(volts) 20.0 Gain Push the gain up. 0 [email protected] 0 Tailor G(s) to exhibit a gain of +21 [email protected] fc. Phase |H(s)|= -21 dB -20.0 -90.0 Arg H(s)= -175° -40.0 -180 10 www.onsemi.com 32 100 1k frequency in hertz 4 kHz 10k 100k Second, Provide High Gain in DC 2. An integrator provides a high dc gain but rotates by -270° ¾ This is the origin pole C1 100n 60 dB 360 60.0 1 R1 10k 2 E1 1k Vout 4 180 0 -30.0 p in unknown Plot1 vdbout in db(volts) 30.0 -20 dB per decade slope -1 V1 AC = 1 0 -180° by inverting op amp -180 -90° by pole at the origin -60.0 10 -360 100m www.onsemi.com 33 8 1 10 100 frequency in hertz 1k 10k 100k -270° Third, Evaluate the Phase Boost at fc Plot1 ph_vout#a in degrees 0 -40.0 arg H(s) at 4 kHz arg H(s) -80.0 -120 -160 arg H(s) -175° 18 arg G(s) Plot3 p in unknown 0 -90.0 -113° arg G(s) -180 +155° Plot2 p in unknown 0 Phase boost at fc -90.0 ϕm = 70° arg H(s)G(s) -180 -270 ϕm -360 10 100 1k frequency in hertz 1 10k arg H ( f c ) − 270° + BOOST − ϕm = −360° BOOST = ϕm − arg H ( f c ) − 90° = 70° + 175 − 90 = 155° www.onsemi.com 34 11 -270 -360 + 100k How do We Boost the Phase at fc? The phase boost is created by combining zeros and poles ⎛ ⎜1 + G ( jω ) = ⎝ ⎛ ⎜⎜1 + ⎝ j ω ⎞ ⎟ ω z1 ⎠ ω ⎞ j ⎟ ω p1 ⎟⎠ ⎛ ⎜1 + arg G ( jω ) = boost = arg ⎝ ⎛ ⎜⎜1 + ⎝ j ω ⎞ ⎟ ω z1 ⎠ ω ⎞ j ⎟ ω p1 ⎟⎠ ⎛ fc ⎞ ⎛ fc ⎞ arg G ( f c ) = arctan ⎜ ⎟⎟ ⎟ − arctan ⎜⎜ f f ⎝ z1 ⎠ ⎝ p1 ⎠ Assume 1 zero placed at 705 Hz, 1 pole at 22 kHz and a 4-kHz crossover frequency: ⎛ 4k ⎞ ⎛ 4k ⎞ arg G ( 4 kHz ) = arctan ⎜ arctan − ⎟ ⎜ ⎟ = 80 − 10.3 ≈ 70° ⎝ 705 ⎠ ⎝ 22k ⎠ If poles and zeros are coincident, no phase boost! www.onsemi.com 35 40.0 360 20.0 180 0 p in unknown plot1 vdbout in db(volts) How do We Boost the Phase at fc? Gain |G(s)| G100 Hz = 38 dB Gain at fc = 21 dB 33 0 fp = 22 kHz fz = 705 Hz -20.0 -180 -270° -40.0 32 -360 10 www.onsemi.com 36 Phase boost at fc = 71° Phase Arg G(s) 100 1k frequency in hertz 4 kHz 10k 100k Type 2 How do We Boost the Phase at fc? The type 1 configuration No phase boost, pure integral term Permanent phase lag of -270° Ok if argH(fc) < -45° for a ϕm of 45° C1 10n 1 R1 10k 2 G (s) = E1 10k Vout 4 V1 AC = 1 Vout ( s ) Vin ( s ) = 1 1 = s sR1C1 1 ω p1 = R1C1 ω0 1 pole at the origin Type 1 www.onsemi.com 37 How do We Boost the Phase at fc? The type 2 configuration Phase boost up to 90° Ok if argH(fc) < -90° C2 62pF C1 2nF 1 R1 10k 1 + sR2C1 G (s) = − ⎛ ⎡ C1C2 ⎤ ⎞ sR1 ( C1 + C2 ) ⎜⎜1 + sR2 ⎢ ⎥ ⎟⎟ + C C 2 ⎦⎠ ⎣ 1 ⎝ R2 116k 2 4 E1 10k If C2 << C1 Vout 3 V1 AC = 1 ω po = 1 1 1 ω p1 = ω z1 = R2C2 R2C1 R1C1 1 pole at the origin 1 zero 1 pole Type 2 www.onsemi.com 38 How do We Boost the Phase at fc? The type 3 configuration Phase boost up to 180° Ok if argH(fc) < -180° G (s) = − C2 350pF C1 11nF 1 C3 22nF R3 321 R2 20k 2 If C2 << C1 and R3 << R1 4 E1 10k ω z1 = 5 Vout 3 V1 AC = 1 R1 10k sC3 ( R1 + R3 ) + 1 sR2C1 + 1 ⎛ C C ⎞ ( sR3C3 + 1) sR1 ( C1 + C2 ) ⎜1 + sR2 1 2 ⎟ C1 + C2 ⎠ ⎝ 1 R2C1 ω p1 = 1 R1C3 1 = R2C2 ωz2 = 1 ω p2 R3C3 1 pole at the origin 2 zeros 2 poles www.onsemi.com 39 ω po = 1 R1C1 Type 3 Finally, We Test the Open-Loop Gain 5. 6. Given the necessary boost of 155°, we select a type-3 amplifier A SPICE simulation can give us the whole picture! a c rLf 10m 7 L1 100u Vout d 11 PWM switch VM Vin 10 vout 3 R10 1m p X3 PWMVM L = 100u Fs = 100k R11 1 16 C5 1mF Buck stage vout 12 GAIN X1 GAIN K = 0.5 C2 {C2} R7 {R3} C1 {C1} 2 R2 {R2} Rupper 10k 13 8 C3 {C3} 5 LoL 1kH 1 6 CoL 1kF Verr X2 AMPSIMP V2 2.5 Rlower 10k 9 Vstim AC = 1 Type 3 www.onsemi.com 40 1 pole at the origin 2 zeros at 500 Hz 2 poles at 50 kHz Finally, We Test the Open-Loop Gain 80.0 360 40.0 180 0 p in unknown plot1 vdberr in db(volts) An ac simulation gives us the open-loop Bode plot fc = 4 kHz 0 -40.0 -180 -80.0 -360 10 www.onsemi.com 41 Gain T(s) 15 ϕm = 70° Phase Arg T(s) 14 100 1k frequency in hertz 10k 100k Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 42 Type 2 with a TL431 Litterature examples use op amps to close the loop. Reality differs as the TL431 is widely implemented. How to convert a type 2 to a TL431 circuit? K R K R TL431A A 2.5V A www.onsemi.com 43 A shunt regulator! R A K Type 2 with a TL431 A TL431 implements a two-loop configuration FB signal Rpullup FB D2 MBR20100CT L1 2.2u Vout solution A Vdd Rbias RLED Rupper Gnd slow lane fast lane Vcc FB FB signal Rpulldown Gnd www.onsemi.com C3 100uF Czero X1 TL431A solution B 44 C2 1mF Rlower Adding a Pole for a Type 2 Circuit The pole is a simple capacitor on the collector Rpullup FB Vdd Vdd FB Rpulldown Cpole ⎛ sRupper C zero + 1 ⎞ ⎛ VFB ( s ) 1 G (s) = = −⎜ ⎜ sRupper C zero ⎟⎟ ⎜⎜ 1 + sR pullup C pole Vout ( s ) ⎝ ⎠⎝ f po = 1 2π Rupper Czero Pole at the origin www.onsemi.com 45 fz = 1 2π Rupper Czero Low frequency zero G= R pullup RLED CTR Mid-band gain Cpole Or on the emitter ⎞ R pullup CTR ⎟⎟ ⎠ RLED fp = 1 2π R pullup C pole High frequency pole The Type 2 Final Implementation The LED resistor fixes the mid-band gain Vout RLED Vdd Rupper 1 3 U2A Rpullup Czero 2 Cpole www.onsemi.com 46 U2B X1 TL431 Rlower What TL431? The TL431 is available under several grades TL431AI, 2.495 V, ± 2.2% TA = -25 °C to +85 °C TL431AC, 2.495 V, ± 1.6% TA = -25 °C to +85 °C TL431BI, 2.495 V, ± 0.8% TA = -25 °C to +85 °C • BV = 37 V, IK,max = 100 mA and IK,min = 1 mA The TLV431 can regulate to a lower output TLV431A, 1.24 V, ± 2% TA = -25 °C to +85 °C TLV431B, 1.24 V, ± 1% TA = -25 °C to +85 °C • BV = 18 V, IK,max = 20 mA and IK,min = 100 µA NCP100 down to 0.9 V www.onsemi.com 47 Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 48 The Optocoupler is the Treator Here! You need galvanic isolation between the prim. and the sec. An optocoupler transmits light only, no electrical link LED Creepage path a c Silicone dome Detector IF Ic 500 µm Detector e CTR = k Ic × 100 IF Current Transfer Ratio www.onsemi.com 49 Clearance LED French specimen Luigi Galvani, 1737-1798 Italian physician and physicist The Internal Pole should be Known The photons are collected by a collector-base area. This area offers a large parasitic capacitance: opto pole! Vdd Vout Vdd Rpullup Rpullup RLED RLED VFB C CTR VFB ( s ) Vout ( s ) www.onsemi.com 50 =− R pullup CTR RLED 1 1 + sR pullup C If fp is above 5 times fc, its effect is negligible If fp is close to fc, phase margin degradation Assess the CTR Variations CTR changes with the operating current! Try to select collector bias currents around 2-5 mA CTR between 0.63 and 1.25 Normalized to 1 (0 dB) 0.63 gives –4 dB 1.25 gives +2 dB fc Watch out for crossover frequency changes and phase margin at CTR extremes! SFH-615 www.onsemi.com 51 Changing the Pullup Affects the Pole Position A low pullup resistor offers better bandwidth! 10 kHz 30 kHz Rpullup = 1 kΩ Rpullup = 4.7 kΩ Changing the bias point affects the CTR CTR 5 kHz Rpullup = 15 kΩ www.onsemi.com 52 VFB ( s ) Vout ( s ) =− R pullup RLED CTR If Rpullup = RLED, then |G0| = 0 dB…? Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 53 Stabilizing a DCM Flyback Converter We want to stabilize a 20 W DCM adapter Vin = 85 to 265 Vrms Vout = 12 V/1.7 A Fsw = 60 kHz Selected controller: NCP1216 1. 2. 3. 4. 5. Obtain a power stage open-loop Bode plot, H(s) Look for gain and phase values at cross over Compensate gain and build phase at cross over, G(s) Run a loop gain analysis to check for margins, T(s) Test transient responses in various conditions www.onsemi.com 54 Stabilizing a DCM Flyback Converter Capture a SPICE schematic with an averaged model DC 6 vc a duty-cycle 389mV 90.0V X2x XFMR RATIO = -166m 3 p 2 PWM switch CM 839mV -76.1V c Vin 90 AC = 0 D1A mbr20200ctp 12.0V vout 4 12.6V R10 20m 0V X9 PWMCM L = Lp Fs = 65k Ri = 0.7 Se = Se 13 L1 {Lp} 8 V(errP)/3 > 1 ? 1 : V(errP)/3 12.0V 1 C5 3mF B1 Voltage Coming from FB Look for the bias points values: Vout = 12 V, ok www.onsemi.com 55 vout Rload 7.2 Stabilizing a DCM Flyback Converter The feedback portion includes the optocoupler pole parameters Vdd 5 5.00V errP vout 2.52V 5 K Rled {Rled} Rpullup {Rpullup} S+A X4 POLE FP = pole K=1 2.52V 2.52V 11.7V Verr Rupper2 {Rupper} LoL 1kH err 18 11 X7 Optocoupler Cpole = 1/(6.28*pole*pullup) CTR = CTR 9 2.52V 14 CoL 1kF 0V Cpole2 {Cpole} 10 10.7V Czero1 {Czero} 15 Vstim AC = 1 2.49V X10 TL431_G Rlower2 {Rlower} Vout=12 Ibridge=250u Rlower=2.5/Ibridge Rupper=(Vout-2.5)/Ibridge Lp=450u Se=100m fc=1k from pm=60 Bode Gfc=-24 pfc=-77 G=10^(-Gfc/20) boost=pm-(pfc)-90 pi=3.14159 K=tan((boost/2+45)*pi/180) Fzero=fc/k Fpole=k*fc Rpullup=20k RLED=CTR*Rpullup/G Czero=1/(2*pi*Fzero*Rupper) Cpole=1/(2*pi*Fpole*Rpullup) CTR=1.5 Pole=6k Automated compensation www.onsemi.com 56 Stabilizing a DCM Flyback Converter Get the open-loop power stage transfer function, H(s) 60.0 Gain at 1 kHz -22.7 dB 30.0 0 -30.0 1 |H(s)| -60.0 180 Phase at 1 kHz -79 ° 90.0 0 -90.0 argH(s) -180 10 www.onsemi.com 57 2 100 1k 10k 100k Stabilizing a DCM Flyback Converter Boost the gain by +22 dB, boost the phase at fc 4 80.0 GM 35 dB 40.0 0 -40.0 5 |T(s)| -80.0 Cross over 1 kHz 180 90.0 0 Margin at 1 kHz 60° -90.0 argT(s) -180 10 www.onsemi.com 58 100 1k 10k 4 100k Stabilizing a DCM Flyback Converter Test the response at both input levels, 90 and 265 Vrms Sweep ESR values and check margins again 12.04 Vout(t) Hi line 12.00 6 4 11.96 11.92 100 mV Low line 11.88 200 mA to 2 A in 1 A/µs 3.00m www.onsemi.com 59 9.00m 15.0m 21.0m 27.0m Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 60 Stabilizing a CCM Flyback Converter We want to stabilize a 90 W CCM adapter Vin = 85 to 265 Vrms Vout = 19 V/4.8 A Fsw = 60 kHz Selected controller: NCP1230 1. 2. 3. 4. 5. Obtain a power stage open-loop Bode plot, H(s) Look for gain and phase values at cross over Compensate gain and build phase at cross over, G(s) Run a loop gain analysis to check for margins, T(s) Test transient responses in various conditions www.onsemi.com 61 Stabilizing a CCM Flyback Converter 6 a 90.0V X2x XFMR RATIO = -0.25 -78.8V p 2 PWM switch CM DC duty-cycle 467mV vc Capture a SPICE schematic with an averaged model 4 vout vout 19.7V 19.0V c Vin 90 AC = 0 3 D1A mbr20200ctp R10 14.4m 0V X9 PWMCM L = Lp Fs = 65k Ri = 0.25 Se = 0 13 L1 {Lp} Rload 4 19.0V 786mV 8 V(errP)/3 > 1 ? 1 : V(errP)/3 1 C5 6600u B1 Voltage Look for the bias points values: Vout = 19 V, ok Vsetpoint < 1 V, enough margin on current sense www.onsemi.com 62 Stabilizing a CCM Flyback Converter Capture a SPICE schematic with an averaged model parameters Vdd 5 5.00V errP 2.36V vout 5 K Rpullup {Rpullup} S+A X4 POLE FP = pole K=1 Rled {Rled} 2.36V 2.36V 18.7V Verr Rupper2 {Rupper} LoL 1kH err 18 11 R7 1 X8 Optocoupler Fp = Pole CTR = CTR 2.36V 14 CoL 1kF 0V 15 17.7V 9 2.49V Vstim AC = 1 www.onsemi.com 63 Cpole2 {Cpole} X10 TL431_G 10 Czero1 {Czero} Rlower2 {Rlower} Vout=19 Ibridge=250u Rlower=2.5/Ibridge Rupper=(Vout-2.5)/Ibridge Lp=350u Se=20k fc=1k from pm=60 Bode Gfc=-22 pfc=-71 G=10^(-Gfc/20) boost=pm-(pfc)-90 pi=3.14159 K=tan((boost/2+45)*pi/180) Fzero=fc/k Fpole=k*fc Rpullup=20k RLED=CTR*Rpullup/G Czero=1/(2*pi*Fzero*Rupper) Cpole=1/(2*pi*Fpole*Rpullup) CTR=1.5 Pole=6k Stabilizing a CCM Flyback Converter Capture a SPICE schematic with an averaged model 32.0 Gain at 1 kHz -22 dB 16.0 Sub harmonic poles 0 -16.0 4 180 Phase at 1 kHz -71 ° 90.0 Inject ramp compensation 0 -90.0 argH(s) -180 10 www.onsemi.com 64 100 1k 10k ramp |H(s)| -32.0 6 100k Stabilizing a CCM Flyback Converter The easiest way to damp the poles: ¾ Calculate the equivalent quality coefficient at Fsw/2 ¾ Calculate the external ramp to make Q less than 1 1 Q= ⎛ π ⎜D' ⎝ Se = ⎞ Se 1 + − D⎟ Sn 2 ⎠ = 1 =8 3.14 × ( 0.5 − 0.46 ) Sn ⎛ 1 90 × 0.25 ⎞ Vin Ri ⎛ 1 ⎞ ⎛ 1 ⎞ − 0.5 + 0.46 ⎟ = 36 kV s ⎜ − 0.5 + D ⎟ = ⎜ − 0.5 + D ⎟ = ⎜ D'⎝π ⎠ Lp D ' ⎝ π ⎠ 320u × (1 − 0.46 ) ⎝ 3.14 ⎠ 2.3 Vpp Rramp 18 kΩ DRV CS NCP1230 internal www.onsemi.com 65 Se 36k = = 51% Vin Ri On-time slope S n 70k Lp 2.3 S ramp = = 153 kV s 15u M S R 0.51× 70k × 18k Rcurrent = r n ramp = = 4.1 k Ω S ramp 153k Mr = Rcurrent Ri Stabilizing a CCM Flyback Converter Boost the gain by +22 dB, boost the phase at fc 11 Cross over 1 kHz 80.0 40.0 GM 20 dB 0 -40.0 10 |T(s)| -80.0 180 90.0 0 Margin at 1 kHz 60° -90.0 argT(s) -180 10 www.onsemi.com 66 100 1k 10k 11 100k Stabilizing a CCM Flyback Converter Test the response at both input levels, 90 and 265 Vrms Sweep ESR values and check margins again 19.11 Vout(t) Hi line 19.03 12 11 18.95 112 mV 18.87 Low line 18.79 1.80m www.onsemi.com 67 5.40m 9.00m time in seconds 12.6m 16.2m Agenda Feedback generalities Conditions for stability Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Compensating with a TL431 Watch the optocoupler! Compensating a DCM flyback Compensating a CCM flyback Simulation and bench results Conclusion www.onsemi.com 68 Testing a UC3843 Converter A 19 V/3 A converter is built around an UC3843 The converter operates in CCM or DCM T1 86H-6232 0.18 : 1 : 0.25 HV-bulk R19 47k R13 47k R3 47k C2 10n D5 MBR20100 - + 400V . IC4 KBU4K C11 100p R6 6k Vref C10 470n X2 R23 1Meg R7 10k 1 CMP Ref 2 FB Vcc 7 3 CS DRV 6 8 C5a 1.2mF C5b 1.2mF C7 220uF 25V 25V 25V C13 2.2nF Type = Y1 R17 47k IN L1 2 x 10mH Schaffner RN122-1.5/02 C4 100uF . . D2 MUR160 L2 2.2u D8 1N4937 R1 330 Gnd R8 1k R14 4.7k M1 400V R11 10k 4 Rt GND U1 UC3843 5 R12 10k SPP11N60S5 R16 10 Vref R18 47k R10 56k U3B R24 1Meg U3A R5 1k 85-260 Vac R6a 1 R15 4.7k C12 220p C16 4.7nF C15 10nF Vout C3 220uF C6 100n R6b 1 IC2 TL431 R9 10k Gnd www.onsemi.com 69 Full Load Leads to CCM Operation 2 simulated 2 CCM operation, Rload = 6.3 Ω www.onsemi.com 70 Reduce the Load to Enter in DCM simulated DCM operation, Rload = 20 Ω www.onsemi.com 71 From the Open-Loop Bode Plot, Compensate The TL431 is tailored to pass a 1 kHz bandwidth Vref Vout RLed Rupper 66 kΩ Cpole RLED = R pullup CTR 10 18 20 = 4.7 k × 0.45 = 266 Ω 7.94 We place a zero at 300 Hz: 1 kΩ CTR = 45% Calculate mid-band gain: +18 dB Czero C zero = Rpulldown Rlower 10 kΩ 1 2π f zero Rupper = 1 = 8 nF 6.28 × 300 × 66k We place a pole at 3.3 kHz: C pole = 1 1 = = 10 nF 2π f pole R pulldown 6.28 × 3.3k × 4.7 k k factor method “Switch-Mode Power Supplies: SPICE Simulations and Practical Designs”, McGraw-Hill www.onsemi.com 72 Verify in the Lab. the Open-Loop Gain Sweep extreme voltages and loads as well! Simulated CCM operation, Rload = 6.3 Ω, Vin = 150 Vdc www.onsemi.com 73 Verify in the Lab. the Open-Loop Gain Simulated 0 100 1k 10k CCM operation, Rload = 6.3 Ω, Vin = 330 Vdc www.onsemi.com 74 100 Verify in the Lab. the Open-Loop Gain Simulated DCM operation, Rload = 20 Ω, Vin = 330 Vdc www.onsemi.com 75 As a Final Test, Step Load the Output Good agreement between curves! Simulated www.onsemi.com 76 Vin = 150 V CCM 2 to 3 A 1 A/µs As a final test, Step Load the Output DCM operation at high line is also stable Simulated www.onsemi.com 77 Vin = 330 V DCM 0.5 to 1 A 1 A/µs Conclusion DC-DC loop compensation cannot be overlooked It is important to understand the impact of phase margin The crossover frequency affects the output impedance Current mode CCM or DCM is ok with a TL431-based type 2 Make sure the optocoupler is characterized, watch the pole! Use SPICE before going to the bench: NO trial and error! Once the simulation is stable, build the prototype Simulations and laboratory debug: the success recipe! www.onsemi.com 78 For More Information • View the extensive portfolio of power management products from ON Semiconductor at www.onsemi.com • View reference designs, design notes, and other material supporting the design of highly efficient power supplies at www.onsemi.com/powersupplies www.onsemi.com 79

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