A1388 and A1389 Datasheet

A1388 and A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Features and Benefits
Description
•5.0 V supply operation
•QVO temperature coefficient programmed at Allegro™ for
improved accuracy
•Miniature package options
•High bandwidth, low noise analog output
•High speed chopping scheme minimizes QVO drift across
operating temperature range
•Temperature-stable quiescent voltage output and sensitivity
•Precise recoverability after temperature cycling
•Output voltage clamps provide short circuit diagnostic
capabilities
•Undervoltage lockout (UVLO)
•Wide ambient temperature range: –40°C to 150°C
•Immune to mechanical stress
•Enhanced EMC performance for stringent automotive
applications
New applications for linear output Hall-effect sensors, such
as displacement and angular position, require higher accuracy
and smaller package sizes. The Allegro A1388 and A1389
linear Hall-effect sensor ICs have been designed specifically to
meet both requirements. These temperature-stable devices are
available in both surface-mount and through hole packages.
Packages
3-pin SOT23-W
2 mm × 3 mm × 1 mm
(suffix LH)
3-pin ultramini SIP
1.5 mm × 4 mm × 3 mm
(suffix UA)
The accuracy of each device is enhanced via end-of-line
optimization. Each device features non-volatile memory to
optimize device sensitivity and the quiescent voltage output
(QVO: output in the absence of a magnetic field) for a given
application or circuit. This A1388 and A1389 optimized
performance is sustained across the full operating temperature
range by programming the temperature coefficient for both
sensitivity and QVO at Allegro end-of-line test.
These ratiometric Hall-effect sensor ICs provide a voltage
output that is proportional to the applied magnetic field. The
quiescent voltage output is adjusted around 50% of the supply
voltage.
The features of these linear devices make them ideal for use in
automotive and industrial applications requiring high accuracy,
and they operate across an extended temperature range,
–40°C to 150°C.
Each BiCMOS monolithic circuit integrates a Hall element,
temperature-compensating circuitry to reduce the intrinsic
Continued on the next page…
Approximate footprint
Functional Block Diagram
V+
CBYPASS
Tuned Filter
Dynamic Offset
Cancellation
VCC
Sensitivity and
Sensitivity TC
GND
A13889-DS, Rev. 1
VOUT
Offset and
Offset TC
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Description (continued)
sensitivity drift of the Hall element, a small-signal high-gain amplifier,
a clamped low-impedance output stage, and a proprietary dynamic
offset cancellation technique.
The A1388 and A1389 sensor ICs are are offered in two package
styles. The LH is a SOT-23W style, miniature, low profile package
for surface-mount applications. The UA is a 3-pin, ultra-mini, single
inline package (SIP) for through-hole mounting. Both packages are
lead (Pb) free, with 100% matte tin leadframe plating.
Selection Guide
Output
Polarity
Sensitivity
(typ) (mV/G)
A1388LLHLX-2-T
Forward
2.5
10,000 pieces per reel
3-pin SOT-23W surface mount
A1388LUA-2-T
Forward
2.5
500 pieces per bag
3-pin SIP through hole
A1389LLHLX-9-T
Forward
9
10,000 pieces per reel
3-pin SOT-23W surface mount
500 pieces per bag
3-pin SIP through hole
10,000 pieces per reel
3-pin SOT-23W surface mount
Part Number
A1389LUA-9-T
Forward
9
A1389LLHLX-RP9-T
Reverse
–9
Packing*
Package
*Contact Allegro™ for additional packing options
Absolute Maximum Ratings
Rating
Unit
Forward Supply Voltage
Characteristic
Symbol
VCC
Notes
8
V
Reverse Supply Voltage
VRCC
–0.1
V
Forward Output Voltage
VOUT
7
V
Reverse Output Voltage
VROUT
Output Source Current
IOUT(SOURCE)
VOUT to GND
IOUT(SINK)
VCC to VOUT
Output Sink Current
V
2
mA
10
mA
–40 to 150
ºC
TJ(max)
165
ºC
Tstg
–65 to 170
ºC
Operating Ambient Temperature
TA
Maximum Junction Temperature
Storage Temperature
–0.1
Range L
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Pin-out Diagrams
Terminal List Table
3
Name
1
2
Number
LH
UA
VCC
1
1
VOUT
GND
2
3
3
2
Description
Input power supply; tie to
GND with bypass capacitor
Output signal
Ground
LH Package
1
2
3
UA Package
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Package Thermal Resistance
Symbol
RθJA
Test Conditions
Value Units
Package LH, 1-layer PCB with copper limited to solder pads
228
ºC/W
Package LH, 2-layer PCB with 0.463 in.2 of copper area each
side connected by thermal vias
110
ºC/W
Package UA, 1-layer PCB with copper limited to solder pads
165
ºC/W
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
OPERATING CHARACTERISTICS Valid through TA , CBYPASS = 0.1 µF, VCC = 5 V; unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit1
Electrical Characteristics
Supply Voltage
VCC
4.5
5.0
5.5
V
VUVLOHI
Tested at TA = 25°C and TA = 150°C (device
powers on)
–
–
3
V
VUVLOLO
Tested at TA = 25°C and TA = 150°C (device
powers off)
2.5
–
–
V
–
9
11.5
mA
Undervoltage Threshold2
Supply Current
ICC
No load on VOUT
Time3,4
tPO
TA = 25°C, CL(PROBE) = 10 pF
–
50
–
µs
VCC Ramp Time3,4
tVCC
TA = 25°C
0.005
–
100
ms
VCCOFF
TA = 25°C
0
–
0.55
V
Power On
VCC Off Level3,4
Delay to
Clamp3,4
tCLP
TA = 25°C, CL = 10 nF
–
30
–
µs
Supply Zener Clamp Voltage
VZ
TA = 25°C, ICC = 14.5 mA
6
7.3
–
V
Bandwidth3
BWi
Internal
Small signal –3 dB
–
20
–
kHz
fC
TA = 25°C
–
400
–
kHz
VN
VCC = 5 V, TA = 25°C, CBYPASS = open,
Sens = 9 mV/G, no load on VOUT
–
15
–
mV(p-p)
Input Referred RMS Noise Density3
VNRMS
VCC = 5 V, TA = 25°C, CBYPASS = open,
Sens = 9 mV/G, no load on VOUT,
fmeasured << BWi
–
1.5
–
mG/√Hz
DC Output Resistance3
ROUT
–
<1
–
Ω
Chopping Frequency3,5
Output Characteristics
Output Referred Noise3
Output Load
Resistance3
Output Load Capacitance3
Output Voltage Clamp6
Sensitivity
Quiescent Voltage Output (QVO)
Sensitivity Temperature Coefficient
RL
VOUT to GND
4.7
–
–
kΩ
CL
VOUT to GND
–
–
10
nF
VCLPHIGH
TA = 25°C, B = +400 G, RL = 10 kΩ (VOUT to GND)
4.35
4.5
4.65
V
VCLPLOW
TA = 25°C, B = –400 G, RL = 10 kΩ (VOUT to VCC)
0.40
0.55
0.70
V
A1388LLHLX-2-T
2.4
2.5
2.6
mV/G
A1388LUA-2-T
2.4
2.5
2.6
mV/G
Sens
VOUT(Q)
TCSens
A1389LLHLX-9-T
TA = 25°C
8.73
9
9.27
mV/G
A1389LUA-9-T
8.73
9
9.27
mV/G
A1389LLHLX-RP9-T
–9.27
–9
–8.73
mV/G
A1388LLHLX-2-T
2.488
2.5
2.512
V
A1388LUA-2-T
2.488
2.5
2.512
V
A1389LLHLX-9-T
TA = 25°C
2.488
2.5
2.512
V
A1389LUA-9-T
2.488
2.5
2.512
V
A1389LLHLX-RP9-T
2.488
2.5
2.512
V
Programmed at TA = 150°C, calculated relative
to Sens at 25°C
0.08
0.12
0.16
%/°C
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
OPERATING CHARACTERISTICS (continued) Valid through TA , CBYPASS = 0.1 µF, VCC = 5 V; unless otherwise noted
Characteristics
Min.
Typ.
Max.
Unit1
LinERR
–
±1.5
–
%
SymERR
–
±1.5
–
%
Symbol
Test Conditions
Error Components
Linearity Sensitivity Error
Symmetry Sensitivity Error
Ratiometry Quiescent Voltage
Output Error7
Ratiometry Sensitivity Error7
Ratiometry Clamp Error8
RatVOUT(Q)
Across supply voltage range (relative to VCC =
5 V)
–
±1.5
–
%
RatSens
Across supply voltage range (relative to VCC =
5 V)
–
±1.5
–
%
TA = 25°C, across supply voltage range (relative
to VCC = 5 V)
–
±1.5
–
%
A1388LLHLX-2-T
–20
–
0
mV
A1388LUA-2-T
–10
0
10
mV
–30
–
0
mV
–20
0
10
mV
RatVOUTCLP
Drift Characteristics
Typical Quiescent Voltage Output Drift
Across Temperature Range
∆VOUT(Q)
A1389LLHLX-9-T
TA = 150°C
A1389LUA-9-T
A1389LLHLX-RP9-T
–30
–
0
mV
A1388LLHLX-2-T
0.08
0.12
0.16
%
0.08
0.12
0.16
%
0.08
0.12
0.16
%
A1389LUA-9-T
0.08
0.12
0.16
%
A1389LLHLX-RP9-T
0.08
0.12
0.16
%
A1388LUA-2-T
Sensitivity Drift Due to
Package Hysteresis9
∆SensPKG
A1389LLHLX-9-T
TA = 25°C, after
temperature cycling
1 1
G (gauss) = 0.1 mT (millitesla),
2On power-up, the output of the device is held low until V
CC exceeds VUVLOHI. After the device is powered, the output remains valid until VCC drops
below VUVLOLO , when the output is pulled low.
3Determined by design and characterization, not evaluated at final test.
4See the Characteristic Definitions section.
5f varies as much as approximately ±20% across the full operating ambient temperature range and process.
C
6V
CLPLOW and VCLPHIGH scale with VCC due to ratiometry.
7Percent change from actual value at V
CC = 5 V, for a given temperature.
8Percent change from actual value at V
CC = 5 V, TA = 25°C.
9Sensitivity drift through the life of the part, ΔSens
LIFE , can have a typical error value ±3% in addition to package hysteresis effects.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Characteristic Definitions
Power On Time When the supply is ramped to its operating
voltage, the device output requires a finite time to react to an
input magnetic field. Power On Time, tPO , is defined as the time
it takes for the output voltage to begin responding to an applied
magnetic field after the power supply has reached its minimum
specified operating voltage, VCC(min), as shown in figure 1.
Delay to Clamp A large magnetic input step may cause the
clamp to overshoot its steady state value. The Delay to Clamp,
tCLP , is defined as the time it takes for the output voltage to settle
within 1% of its steady state value, after initially passing through
its steady state voltage, as shown in figure 2.
Quiescent Voltage Output In the quiescent state (no significant magnetic field: B = 0 G), the output, VOUT(Q), is at a constant ratio to the supply voltage, VCC, across the entire operating
ranges of VCC and Operating Ambient Temperature, TA.
Quiescent Voltage Output Drift Across Temperature
Range Due to internal component tolerances and thermal
considerations, the Quiescent Voltage Output, VOUT(Q), may
drift due to temperature changes within the Operating Ambient
Temperature, TA. For purposes of specification, the Quiescent
Voltage Output Drift Across Temperature Range, ∆VOUT(Q) (mV),
is defined as:
V
VOUT
90% VOUT
tPO
t2
t1= time at which power supply reaches
minimum specified operating voltage
+t
 1 
SensT2 – SensT1
TCSens = 
× 100  T2–T1 (%/°C)
(3)
Sens
T1



where T1 is the baseline Sens programming temperature of 25°C,
and T2 is the TCSENS programming temperature of 150°C.
Figure 1. Definition of Power On Time, tPO
Device Output, VOUT (V)
VOUT
tCLP
t1
t2
t1= time at which output voltage initially
reaches steady state clamp voltage
t2= time at which output voltage settles to
within 1% of steady state clamp voltage
time (µs)
Magnetic Input Signal
Magnetic Input Signal
VCLPHIGH
Sens =
Sensitivity Temperature Coefficient The device sensitivity
changes as temperature changes, with respect to its Sensitivity
Temperature Coefficient, TCSENS. TCSENS is programmed at
150°C, and calculated relative to the baseline sensitivity programming temperature of 25°C. TCSENS is defined as:
t2= time at which output voltage settles
within ±10% of its steady state value
under an applied magnetic field
0
VOUT(B+) – VOUT(B–)
(2)
(B+) – (B–)
where B+ is the magnetic flux density in a positive field (south
polarity) and B– is the magnetic flux density in a negative field
(north polarity).
VCC(min)
t1
(1)
Sensitivity The amount of the output voltage change is proportional to the magnitude and polarity of the magnetic field applied.
This proportionality is specified as the magnetic sensitivity,
Sens (mV/G), of the device and is defined as:
VCC
VCC(typ)
∆VOUT(Q) = VOUT(Q)(TA) –VOUT(Q)(25°C)
The ideal value of Sens across the full ambient temperature
range, SensIDEAL(TA), is defined as:
SensIDEAL(TA) = SensT1 × [100 (%) + TCSENS (TA –T1)] (4)
Sensitivity Drift Across Temperature Range Second order
sensitivity temperature coefficient effects cause the magnetic
sensitivity, Sens, to drift from its ideal value across the operating
ambient temperature range, TA. For purposes of specification,
the Sensitivity Drift Across Temperature Range, ∆SensTC, is
Figure 2. Definition of Delay to Clamp, tCLP
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
defined as:
∆SensTC =
SensTA – SensIDEAL(TA)
SensIDEAL(TA)
× 100
(%)
(5)
Sensitivity Drift Due to Package Hysteresis Package
stress and relaxation can cause the device sensitivity at TA = 25°C
to change during and after temperature cycling. This change in
sensitivity follows a hysteresis curve. For purposes of specification, the Sensitivity Drift Due to Package Hysteresis, ∆SensPKG,
is defined as:
∆SensPKG =
Sens(25°C)(2) – Sens(25°C)(1)
Sens(25°C)(1)
× 100
(%) (6)
where Sens(25°C)(1) is the programmed value of sensitivity
at TA = 25°C, and Sens(25°C)(2) is the value of sensitivity at
TA = 25°C after temperature cycling TA up to 150°C, down to
–40°C, and back to up 25°C.
Linearity Sensitivity Error The A1388 and A1389 are
designed to provide linear output in response to a ramping
applied magnetic field. Consider two magnetic fields, B1 and B2.
Ideally, the sensitivity of a device is the same for both fields, for
a given supply voltage and temperature. Linearity error is present
when there is a difference between the sensitivities measured at
B1 and B2.
Linearity Sensitivity Error, LINERR , is calculated separately for
positive (LinERR+) and negative (LinERR– ) applied magnetic
fields. LINERR (%) is measured and defined as:
 Sens(B+)(2) 
 × 100
LinERR+ = 1–
 Sens(B+)(1) 
(%)
 Sens(B–)(2)
 × 100
LinERR– = 1–
 Sens(B–)(1)
(%)
(7)
|VOUT(Bx) – VOUT(Q)|
Bx
(8)
and Bx are positive and negative magnetic fields, with respect to
the quiescent voltage output, such that
The effective linearity error is:
BMAX(–)  =
VCLPHIGH – VOUT(Q)
(10)
Sens
VOUT(Q) – VCLPLOW
Sens
Symmetry Sensitivity Error The magnetic sensitivity of the
device is constant for any two applied magnetic fields of equal
magnitude and opposite polarities. Symmetry error, SymERR (%),
is measured and defined as:
 Sens(B+) 
 × 100 (%)
SymERR = 1–
(11)
 Sens(B–) 
where SensBx is as defined in equation 10, and B+ and B– are
positive and negative magnetic fields such that |B+| = |B–|.
Ratiometry Error The A1388 and A1389 provide ratiometric
output. This means that the Quiescent Voltage Output, VOUT(Q) ,
magnetic sensitivity, Sens, and clamp voltages, VCLPHIGH and
VCLPLOW , are proportional to the supply voltage, VCC. In other
words, when the supply voltage increases or decreases by a
certain percentage, each characteristic also increases or decreases
by the same percentage. Error is the difference between the
measured change in the supply voltage relative to 5 V, and the
measured change in each characteristic.
The ratiometric error in quiescent voltage output, RatVOUT(Q)
(%), for a given supply voltage, VCC, is defined as:
 VOUT(Q)(VCC) / VOUT(Q)(5V) 
 × 100
RatVOUT(Q) = 1–
VCC / 5 (V)


(%)
(12)
The ratiometric error in magnetic sensitivity, RatSens (%), for a
given supply voltage, VCC, is defined as:
 Sens(VCC) / Sens(5V) 
 × 100 (%)
RatSens = 1–
VCC / 5 (V)


(13)
The ratiometric error in the clamp voltages, RatVOUTCLP (%), for
a given supply voltage, VCC, is defined as:
|B(+)(2)| > |B(+)(1)| and |B(–)(2)| > |B(–)(1)|
LinERR = max(|LinERR+| , |LinERR– |)
BMAX(+)  =
where:
SensBx =
operating magnetic range of the applied field in which the device
provides a linear output. The maximum positive and negative
applied magnetic fields in the operating range can be calculated:
The output voltage clamps, VCLPHIGH and VCLPLOW , limit the
(9)
 VCLP(VCC) / VCLP(5V) 
 × 100
RatVOUTCLP = 1–
VCC / 5 (V)


(%)
(14)
where VCLP is either VCLPHIGH or VCLPLOW .
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Undervoltage Lockout The A1388 and A1389 provide an
undervoltage lockout feature which ensures that the device outputs a VOUT signal only when VCC is above certain thresholds .
The undervoltage lockout feature provides a hysteresis of operation to eliminate indeterminate output states.
The output of the A1388 and A1389 is held low (GND) until
VCC exceeds VUVLOHI . After VCC exceeds VUVLOHI , the device
VOUT output is enabled, providing a ratiometric output voltage
that is proportional to the input magnetic signal and VCC . If VCC
should drop back down below VUVLOLO for longer than tUVLO
after the device is powered up, the output would be pulled low
(see figure 3) until VUVLOHI is reached again and VOUT would
be reenabled.
VUVLOHI
VCC
tUVLO
VOUT
time
Figure 3. Definition of Undervoltage Lockout
VCC Ramp Time The time taken for VCC to ramp from 0 V to
VCC(typ). 5.0 V (see figure 4).
tVCC
VCC(typ)
Supply Voltage, VCC (V)
VCC Off Level For applications in which the VCC pin of the
A1388 or A1389 is being power-cycled (for example using a
multiplexer to toggle the part on and off), the specification of
VCC Off Level, VCCOFF , determines how high a VCC off voltage
can be tolerated while still ensuring proper operation and startup
of the device (see figure 4).
VUVLOLO
VCCOFF
0
time
Figure 4. Definition of VCC Ramp Time, tVCC
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Application Information
A1388
A1389
VOUT
VCC
5V
0.1 µF
RL
GND
4.7 nF
Figure 5. Typical Application Circuit
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed across
the Hall element. This voltage is disproportionally small relative
to the offset that can be produced at the output of the Hall sensor
IC. This makes it difficult to process the signal while maintaining an accurate, reliable output over the specified operating
temperature and voltage ranges. Chopper stabilization is a unique
approach used to minimize Hall offset on the chip. Allegro
employs a patented technique to remove key sources of the output drift induced by thermal and mechanical stresses. This offset
reduction technique is based on a signal modulation-demodulation process. The undesired offset signal is separated from the
magnetic field-induced signal in the frequency domain, through
modulation. The subsequent demodulation acts as a modulation
process for the offset, causing the magnetic field-induced signal
to recover its original spectrum at base band, while the DC offset
becomes a high-frequency signal. The magnetic-sourced signal
then can pass through a low-pass filter, while the modulated DC
offset is suppressed. In addition to the removal of the thermal and
mechanical stress related offset, this novel technique also reduces
the amount of thermal noise in the Hall sensor IC while completely removing the modulated residue resulting from the chopper operation. The chopper stabilization technique uses a high
frequency sampling clock. For demodulation process, a sample
and hold technique is used. This high-frequency operation allows
a greater sampling rate, which results in higher accuracy and
faster signal-processing capability. This approach desensitizes
the chip to the effects of thermal and mechanical stresses, and
produces devices that have extremely stable quiescent Hall output
voltages and precise recoverability after temperature cycling.
This technique is made possible through the use of a BiCMOS
process, which allows the use of low-offset, low-noise amplifiers
in combination with high-density logic integration and sampleand-hold circuits.
Regulator
Clock/Logic
Hall Element
Amp
Anti-aliasing Tuned
LP Filter
Filter
Figure 6. Chopper Stabilization Technique
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Package LH, 3-Pin (SOT-23W)
+0.12
2.98 –0.08
1.49 D
4°±4°
3
A
+0.020
0.180–0.053
0.96 D
+0.10
2.90 –0.20
+0.19
1.91 –0.06
2.40
0.70
D
0.25 MIN
1.00
2
1
0.55 REF
0.25 BSC
0.95
Seating Plane
Gauge Plane
8X 10° REF
B
PCB Layout Reference View
C
Branding Reference View
Branded Face
1.00 ±0.13
0.95 BSC
+0.10
0.05 –0.05
0.40 ±0.10
For Reference Only; not for tooling use (reference DWG-2840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
B
Active Area Depth, 0.28 mm REF
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C
Branding scale and appearance at supplier discretion
D
Hall element, not to scale
389
1
89R
1
A1388LLHLX-2-T
A1389LLHLX-RP9-T
A1389LLHLX-9-T
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Package UA, 3-Pin SIP
+0.08
4.09 –0.05
45°
B
C
E
+0.08
3.02 –0.05
2.04
1.52 ±0.05
1.44
E
10°
Mold Ejector
Pin Indent
E
Branded
Face
A
1.02
MAX
45°
0.79 REF
NNN
1
1
2
D Standard Branding Reference View
3
= Supplier emblem
N = Last three digits of device part number
+0.03
0.41 –0.06
14.99 ±0.25
For Reference Only; not for tooling use (reference DWG-9065)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
+0.05
0.43 –0.07
A
Dambar removal protrusion (6X)
B
Gate and tie bar burr area
C
Active Area Depth, 0.50 mm REF
D
Branding scale and appearance at supplier discretion
E
Hall element (not to scale)
1.27 NOM
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
A1388 and
A1389
Linear Hall-Effect Sensor ICs with Analog Output
Available in a Miniature, Low Profile Surface Mount Package
Revision History
Revision
Revision Date
Rev. 1
June 27, 2014
Description of Revision
Update product offerings
Copyright ©2009-2014, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
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