A8425 Datasheet

A8425
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
Discontinued Product
This device is no longer in production. The device should not be
purchased for new design applications. Samples are no longer available.
Date of status change: March 4, 2013
Recommended Substitutions:
For existing customer transition, and for new customers or new applications, contact Allegro Sales.
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A8425
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
Features and Benefits
Description
▪ Wide battery voltage range: 1.5 to 11 V
▪ Integrated 55 V DMOS switch in very thin profile
3 mm × 3 mm, 0.75 mm nominal height package
▪ Peak current limit continuously adjustable from 1.0 to 3.2 A
▪ Output voltage sensing on primary side: no resistor divider
required
▪ >75% efficiency
▪ Fast charge time
▪ Charge Complete indication
▪ Flexible, high current IGBT drive
▪ Independent IGBT driver supply
▪ Separate sink and source pins with 6 Ω pull-up and
20 Ω pull-down
▪ Interlocked trigger pin improves noise immunity
▪ No primary-side Schottky diode needed
The A8425 charges photoflash capacitors for digital cameras,
camcorders, and DSC combos. An integrated 55 V DMOS
switch drives the transformer in a flyback topology optimized
for 2-cell Li+ battery input. An integrated IGBT driver with
separate source and sink pins allows high performance red-eye
reduction implementation.
The A8425 offers programmable peak switch current limit from
1.0 to 3.2 A, continuously adjustable using a resistor to ground.
A proprietary control scheme optimizes the capacitor charging
time. Low quiescent current and low shutdown current further
improve system efficiency and extend battery life.
The A8425 is available in 16-contact 3 mm × 3 mm TQFN
packages. This small, very thin profile (0.75 mm nominal overall
height) package is ideal for space-constrained applications. It
is lead (Pb) free, with 100% matte-tin leadframe plating.
Package: 16-contact TQFN (suffix ES)
Applications include:
▪ SLR camera flash
▪ Digital camcorder/DSC combo flash
▪ 2 Li+ input strobe
Approximate Scale 1:1
Typical Application
Bias Input
3.0 to 5.5V
Battery Input
1.5 to 11 V
1 : 10
+
VIN
VOUT Detect
Control
Block
SW
ISW sense
RSET
CHARGE
100 μF
315 V
VBAT
TLIM
ISET
COUT
C1
C2
VPULLUP
DONE
100 kΩ
DONE
VDRV
IGBT Driver
GSRC
TRIGGER1
IGBT Gate
TRIGGER2
GSNK
GND
A8425-DS, Rev. 1
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
Selection Guide
Part Number
A8425EESTR-T
Packing*
Tape and reel, 1500 pieces/reel
*Contact Allegro for additional packing options.
Absolute Maximum Ratings*
Rating
Units
SW Pin
Characteristic
Symbol
VSW
–0.3 to 55
V
VBAT Pin
VBAT
–0.3 to 12
V
VIN
–0.3 to 7
V
VIN Pin
Notes
–0.3 to VIN + 0.3 V
V
–40 to 85
ºC
TJ(max)
150
ºC
Tstg
–55 to 150
ºC
Remaining Pins
Operating Ambient Temperature
Maximum Junction
TA
Storage Temperature
Range E
*With respect to GND.
Thermal Characteristics
Characteristic
Package Thermal Resistance
Symbol
RθJA
Test Conditions*
On 4-layer PCB based on JEDEC standard
Value
Units
47
ºC/W
*Additional thermal information available on Allegro website.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
13 VBAT
14 VSEL
8
9
TRIGGER2
4
10 TRIGGER1
7
GND
11 DONE
EP
NC
3
6
VIN
12 TLIM
5
2
NC
1
GSINK
CHARGE
GSOURCE
15 ISET
16 VDRV
Pin-out Diagram
SW
(Top View)
Terminal List Table
Number
1
Name
GSOURCE
2
GSINK
3
VIN
4
GND
5
CHARGE
6, 7
NC
8
TRIGGER2
9
SW
10
TRIGGER1
11
¯N̄¯Ē¯
D̄¯Ō
Function
IGBT gate drive – source connection
IGBT gate drive – sink connection
Input voltage; connect to a 3.0 to 5.5 V voltage source
Ground connection
Pull high to initiate charging; pull low to enter low-power standby mode
No connection
IGBT input trigger 2; internally ANDed with TRIGGER1 pin
Drain connection of internal power MOSFET switch; connect to the other terminal of the transformer primary winding
IGBT input trigger 1; internally ANDed with TRIGGER2 pin
Pulls low when output reaches target value and CHARGE pin is high; remains low until CHARGE pin is cycled
12
TLIM
Sets time limit for minimum pulse width (secondary-side conduction time); apply logic high for shorter pulses or logic
low for longer pulses; see Selection of Transformer section for details
13
VBAT
Battery voltage; connect to the same power supply as is used for the transformer primary winding
14
VSEL
15
ISET
16
VDRV
–
EP
Output voltage selection; use in conjunction with transformers of differing turns ratios (N = 8, 9, or 10) to achieve
target output voltage and optimal efficiency (this feature is not yet finalized)
Sets the maximum switch current; connect an external resistor (value of 25 to 80 kΩ) between this pin and GND to
set the target peak current (between 1.0 and 3.2 A)
Supply for IGBT gate driver
Exposed pad for enhanced thermal dissipation (not connected electrically)
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
Functional Block Diagram
SW
VIN
DCM‫ޓ‬Detector
VBAT
tOFF(max)
DMOS
18 μs
ILIM Comparator
VSW 㧙VBAT
㧗
VDS Ref
ISET
H→L
Triggered
‫ޓ‬Timer
㧙
ISET
Buffer
S
Q
R
㧙
Q
Enable
tON(max)
18 μs
DONE
VSEL
RC
㧗
Gain
Vth
㧙
TLIM
CHARGE
S
Q
R
㧙
Q
One-Shot
VDRV
GSOURCE
TRIGGER1
GSINK
TRIGGER2
Exposed Pad
GND
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
ELECTRICAL CHARACTERISTICS typical values valid at VIN = VBAT= 3.6 V, RSET = 40 kΩ, ISWlim = 2.0 A, and TA=25°C, unless otherwise noted
Characteristics
VBAT Pin Voltage
Range1
VIN Pin Voltage Range1
UVLO Enable Threshold
Symbol
Min.
Typ.
VBAT
1.5
VIN
3.0
VINUV
UVLO Hysteresis
Test Conditions
VIN rising
VINUVhys
Switch Current Limit2
SW Current Limit to ISET Current Ratio
ISET Pin Voltage While Charging
2.55
2.65
2.75
V
–
150
–
mV
2.9
3.2
3.5
A
–
1.0
–
A
–
58.5
–
kA/A
ISET = 55 μA, CHARGE = high, ISW = 0 A (VBAT
disconnected)
–
1.182
–
V
–
1.268
–
V
–
330
–
Ω
VSET
RSET(INT)
ISWlk
IIN
IBAT
CHARGE Pin Input Current
V
ISET = 55 μA, CHARGE = high
RGND(INT)
VBAT Pin Supply Current
V
5.5
Minimum, ISET = 17 μA
RSWDS(on)
VIN Pin Supply Current
11
–
ISWlimMIN
ISWlim/ISET
GND Pin Internal Resistance
Switch Leakage
–
Maximum, ISET = 55 μA
Switch On-Resistance
Current1
Unit
ISWlimMAX
ISET = 55 μA, CHARGE = high, ISW = 3.2 A
ISET Pin Internal Resistance
Max.
27
–
mΩ
–
0.2
–
Ω
VSW = VBAT = 11 V, in shutdown
–
–
1
μA
Shutdown (CHARGE = 0 V, TRIGGER = 0 V
–
0.01
1
μA
Charging done
–
25
50
μA
Charging (CHARGE = VIN, TRIGGER = 0 V)
–
2
–
mA
Shutdown (CHARGE = 0 V, TRIGGER = 0 V)
–
0.01
1
μA
Charging done
–
–
1
μA
Charging (CHARGE = VIN, TRIGGER = 0 V)
–
25
50
uA
–
36
–
μA
CHARGE Pin Input Voltage High1
ICHARGE(H)
Over input supply range, VIN
1.4
–
–
V
Low1
ICHARGE(L)
Over input supply range, VIN
–
–
0.4
V
CHARGE Pin Pull-down Resistor
RCHARGE
–
100
–
kΩ
Maximum Switch-off Timeout
toffMAX
–
18
–
μs
Maximum Switch-on Timeout
tonMAX
–
18
–
μs
¯N̄¯Ē¯ Pin Output Leakage Current1
D̄¯Ō
IDONElk
–
–
1
μA
¯N̄¯Ē¯ Pin Output Low Voltage1
D̄¯Ō
VDONEL
CHARGE Pin Input Voltage
ICHARGE
–
VIN = 3.6 V, ID = 800 mA, TA = 25°C
Output Comparator Trip Voltage (measured as
VSW – VBAT; see 1 for VSEL= GND)
Output Comparator Overdrive
Minimum dV/dt for ZVS Comparator
VOUTTRIP
VOUTOV
dV/dt
VCHARGE = VIN
¯N̄¯Ē¯ pin
32 μA into D̄¯Ō
–
–
100
mV
VSEL = GND
31
31.5
32
V
VSEL = open
–
35
–
V
VSEL = VIN
–
39.4
–
V
200 ns pulse width (90% to 90%)
–
200
400
mV
Measured at SW pin
–
20
–
V/μs
Continued on the next page …
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
ELECTRICAL CHARACTERISTICS (continued) typical values valid at VIN = VBAT= 3.6 V, RSET = 40 kΩ, ISWlim = 2.0 A, and TA=25°C, unless
otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
3
–
5.5
V
–
36
–
μA
V
IGBT Driver
VDRV Pin IGBT Driver Supply Voltage
VDRV
TRIGGERx Pins Input Current
ITRIG
VTRIGGER = VIN
TRIGGERx Pins High Input Voltage1
VTRIG(H)
Over input supply range, VIN
1.4
–
–
TRIGGERx Pins Low Input Voltage1
VTRIG(L)
Over input supply range, VIN
–
–
0.4
V
TRIGGERx Pins Pull-down Resistor
RTRIGPD
–
100
–
kΩ
GSOURCE On-Resistance to VDRV
RSrcDS(on)
VDRV = 3.6 V, VGSOURCE= 1.8 V
–
6
–
Ω
GSINK On-Resistance to GND
RSnkDS(on)
VDRV = 3.6 V, VGSINK= 1.8 V
–
20
34
Ω
Propagation Delay (Rising)
tdr
–
30
–
ns
Propagation Delay (Falling)
tdf
–
140
–
ns
Output Rise Time
tr
Output Fall Time
tf
Connect GSOURCE to GSINK, RGATE = 12 Ω,
CLOAD = 6500 pF, VDRV = 3.6 V
–
80
–
ns
–
320
–
ns
1Specifications
2Current
over the range TA= –40°C to 85°C; guaranteed by design and characterization.
limit guaranteed by design and correlation to static test. Refer to Application Information section for peak current in actual circuits.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
Performance Characteristics
Charging Time at Various Peak Current Levels
Common Parameters
Symbol
Parameter Units/Division
C1
VOUT
50 V
C2
VBAT
2V
C3
IIN
250 mA
t
time
500 ms
Conditions Parameter
Value
VIN
3.6 V
VBAT
3.6 V
COUT
100 μF/330 V
Transformer = DCT9.5/5ER, LP = 7 μH, N = 10
VOUT
VBAT
Conditions
Parameter
RSET
IP
Value
25 kΩ
≈3.15 A
C1
C2
C3
C1
C2
IIN
C3
tCHARGE= 1.77 s
t
VOUT
C1
VBAT
Conditions
Parameter
RSET
IP
Value
30 kΩ
≈2.6 A
C1
C2
C3
C2
IIN
C3
tCHARGE= 2.17 s
t
VOUT
C1
VBAT
Conditions
Parameter
RSET
IP
Value
45 kΩ
≈1.8 A
C1
C2
C3
C2
IIN
tCHARGE= 3.58 s
C3
t
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
Performance Characteristics
Efficiency versus Battery Voltage
Charge Time versus Battery Voltage
Transformer Lp= 7 μH, N = 10; TLIM = Low;
VIN = 3.6 V; COUT= 100 μF / 330 V UCC; TA=25°
79
78
4.5
4.0
3.5
RSET
(kΩ)
58
IP
(A)
≈ 1.4
45
≈ 1.8
36.5
≈ 2.2
30
≈ 2.6
25
≈ 3.2
77
76
75
Efficiency (%)
5.0
Time (s)
Transformer LP= 7.3 μH; VIN= 3 V; COUT= 100 μF UCC; TA=25°
3.0
2.5
74
73
72
71
2.0
69
1.5
1.0
0.5
IP
(A)
≈ 1.4
RSET
(kΩ)
58
70
45
≈ 1.8
68
36.5
≈ 2.2
67
30
≈ 2.6
66
25
≈ 3.2
65
3
4
5
6
7
8
9
10
11
1
VBAT (V)
COUT= 100 μF. For larger or smaller capacitances, charging time
scales proportionally.
2
3
4
5
6
VBAT (V)
7
8
9
10
11
This data was obtained using a TDK DCT9.5/5ERUxxS003 transformer
(LP = 7.6 μH, 3.2 A, N = 10). Highest efficiency is achieved at high battery voltage and large peak current (1.4 to 1.8 A). At a maximum peak
current of 3.2 A, conduction losses from the MOSFET and from the
transformer windings dominate, so efficiency suffers.
Average Input Current versus Battery Voltage
Transformer Lp= 7 μH, N = 10, TLIM = Low
VIN = 3.6 V, COUT= 100 μF 330 V UCC, TA= 25°
1.50
1.40
1.30
1.20
IIN (A)
1.10
RSET
(kΩ)
25
30
36.5
45
58
1.00
0.90
0.80
IP
(A)
≈ 3.2
≈ 2.6
≈ 2.2
≈ 1.8
≈ 1.4
0.70
0.60
0.50
0.40
0.30
3
4
5
6
7
8
9
10
11
VBAT (V)
The average input current decreases with higher VBAT. .
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
Timing and IGBT Interlock Function
The two TRIGGER signals are internally ANDed together. As
shown in the timing diagram, below, triggering is enabled when
the CHARGE pin is low. This feature improves noise immunity.
UVLO
VIN
CHARGE
SW
Target VOUT
VOUT
DONE
TRIGGER
T1
T3
T2
IGBTDRV
A
B
C
D
E
F
Explanation of Events
A
Start charging process by pulling CHARGE pin high, provided that VIN is above the UVLO level.
¯N̄¯Ē¯ pins are both high).
Triggering (T1) is locked during the charging process (CHARGE and D̄¯Ō
B
Charging stops when VOUT reaches the target voltage level. Triggering (T2) is enabled after
¯N̄¯Ē¯ pin is low).
completion of charging (CHARGE pin is high and D̄¯Ō
C
Start a new charging process with a low-to-high transition at the CHARGE pin.
D
Pull the CHARGE pin low to put the controller into the low-power standby mode. Triggering (T3) is
always enabled when CHARGE is low.
E
Charging does not start, because VIN is below the UVLO level when the CHARGE pin goes high.
F
After VIN goes above the UVLO level, another low-to-high transition at the CHARGE pin is required
to start the charging process.
IGBT Drive Timing Definition
TRIGGER
50%
tdr
GSOURCE
or GSINK
50%
tr
tdf
90%
10%
tf
90%
10%
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
A8425
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
Application Information
Circuit Description
The A8425 is a photoflash capacitor charger control
IC with a high current limit (up to 3.2 A) and low
RDS(on) (0.23 Ω maximum). The IC also integrates an
IGBT driver for strobe operation of the flash, dramatically saving board space in comparison with discrete
solutions for strobe flash operation.
The IC is turned on by a low-to-high signal on the
CHARGE pin. When the charging cycle is initiated,
the primary current ramps up linearly at a rate determined by the battery voltage and the primary side
inductance. When the primary current reaches the set
limit, the internal MOSFET is turned off immediately
to allow the energy to be dumped into the photoflash
capacitor through the secondary winding. The secondary current drops linearly as the output capacitor
is charged. The charging cycle starts again when the
transformer flux is reset or after a predetermined time
period (18 μs maximum off-time) has passed, whichever occurs first.
Timer Mode and Fast Charging Mode
The A8425 achieves fast charging times and high efficiency by operating in discontinuous conduction mode
(DCM) through most of the charging process. The
relationship of Timer Mode and Fast Charging Mode
is shown in figure 1.
The IC operates in Timer Mode when beginning to
charge a completely discharged photoflash capacitor,
usually when the output voltage, VOUT, is less than
approximately 40 V (actual value depends on input
voltage and transformer inductance). Timer Mode is a
fixed period, 18 μs, off-time control. One advantage of
having Timer Mode is that it limits the initial battery
current surge and thus acts as a “soft-start.” A time
expanded view of a Timer Mode interval is shown in
figure 2.
As soon as a sufficient voltage has built up at the
output capacitor, the IC enters Fast-Charging Mode.
In this mode, the next switching cycle starts after the
secondary side current has stopped flowing, and the
switch voltage has dropped to a minimum value. A
proprietary circuit is used to allow minimum-voltage
switching, even if the SW pin voltage does not drop to
0 V. This enables Fast-Charging Mode to start earlier
than previously possible, thereby reducing the overall
VOUT
VSW
Timer Mode
Fast Charging Mode
VOUT
VBAT
ISW
ISW
t = 2 μs/div; VOUT =10 V/div; VBAT =2 V/div.; VSW =2 V/div;
ISW =200 mA/div. VIN = 3.6 V; VBAT =5.5 V; RSET = 66.5 kΩ;
Transformer LP= 7.5 μH, N = 10
Figure 1. Relationship of Timer mode and Fast Charging mode
Figure 2. Timer Mode
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
charging time. Minimum-voltage switching is shown
in figure 3.
During Fast-Charging Mode, when VOUT is high
enough such that the reflected voltage (VOUT / N) is
greater than VBAT, true zero-voltage switching (ZVS)
is achieved. This further improves efficiency as well
as reduces switching noise. A ZVS interval is shown in
figure 4.
Selection of Switching Current Limit
The A8425 features continuously adjustable peak
switching current between 1.0 and 3.2 A. This is done
by selecting the value of the external resistor RSET
(connected between the ISET pin and GND), which
determines the ISET bias current, and therefore the
switching current limit, ISWlim.
To the first order approximation, ISWlim is related to
ISET and RSET by the following equation:
ISWlim = ISET × K
VSW
VOUT
= (VSET × RSET ) × K ,
VBAT
(6)
where VSET = 1.2 V, K = 59000 when the IC bias voltage, VIN , is 3.6 V.
ISW
t = 1 μs/div; VOUT =10 V/div; VBAT =2 V/div.; VSW =2 V/div;
ISW =200 mA/div. VIN = 3.6 V; VBAT =5.5 V; RSET = 66.5 kΩ;
Transformer LP= 7.5 μH, N = 10
Figure 3. Fast Charging Mode, minimum voltage
In real applications, the switching current limit is
affected by bias voltage, battery voltage, and the
transformer primary inductance, LP . If necessary, the
following expressions can be used to determine ISWlim
more accurately:
ISET = VSET / (RSET + RSET(INT) – K × RG(INT) ) ,(7)
VOUT
VSW
VBAT
ISW
t = 1 μs/div; VOUT =10 V/div; VBAT =2 V/div.; VSW =2 V/div;
ISW =200 mA/div. VIN = 3.6 V; VBAT =5.5 V; RSET = 66.5 kΩ;
Transformer LP= 7.5 μH, N = 10
Figure 4. Zero-voltage switching
where RSET(INT) is the internal resistance of the ISET
pin (330 Ω typical), RG(INT) is the internal resistance
of the bonding wire for the GND pin (27 mΩ typical),
and:
ISWlim = ISET × (K' + VIN × K")
+ (VBAT / LP ) × td ,
(8)
where K' = 47500, K" ≈ 3500 at TA= 25°C, and td is
the delay in SW turn-off (0.1 μs typical).
Figure 5 can be used to determine the relationship
between RSET and ISWlim at various bias voltages.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
also be connected to the TLIM pin to reduce the minimum pulse width. The disadvantage of this method is
that the 20 μA current is always flowing whenever the
BL signal goes high.
Smart Current Limit (Optional)
With the help of some simple external logic, the user
can change the charging current according to the
battery voltage. As an example (refer to the circuit
diagram below), assume that the ISET current level
is normally 50 μA (for ISWlim = 3.0 A). Further, when
BL
RBL
In another example of a possible application, we can
make use of a PTC thermistor to decrease the switch
current limit when the board temperature exceeds
65°C. Referring to the following figure, R3 is a
PTC type thermistor such as the Murata
PRF18BG471QB1RB.
ISET
RSET
ISET
RSET
the battery voltage drops below 2.5 V, an external BL
(battery-low) signal comes high. A resistor, RBL, connected from the BL node to the ISET pin, then injects
20 μA into RSET. This effectively reduces ISET current to 30 μA (for ISWlim = 1.8 A). If necessary, BL can
R1
73.2 kΩ
+t°
R2
37.2 kΩ
R3
470 Ω
Peak Current Limit versus ISET Resistance at Various Bias Voltages
VBAT = 3.6 V, Transformer LP = 7.5 μH, TA=25°C
3.4
3.2
3.0
2.8
VIN = 5.0 V
2.6
ISWlim (A)
2.4
VIN = 3.6 V
2.2
VIN = 3.0 V
2.0
1.8
1.6
1.4
1.2
1.0
0.8
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
RSET (kΩ)
Figure 5. Chart of current versus limit settings
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
In this configuration, the peak currents at various PCB
temperatures are as follows:
TPCB
(°C)
R3
(kΩ)
RSET
(kΩ)
Ipeak
(A)
25
0.470
25.0
3.2
65
4.7
26.6
3.0
80
47.0
39.2
2.0
IGBT Gate Driver Application
The integrated IGBT driver is used to drive an external
flash trigger IGBT. Separate GSOURCE and GSINK
pins allow the user to adjust IGBT turn-on and turnoff rise times. For the Electrical Characteristics table
in this document, IGBT drive timing is defined with
the GSOURCE and GSINK pins connected together,
and supplying a load comprising a 12 Ω resistor and a
6500 pF capacitor.
IGBT Gate Driver Interlock
The TRIGGERx pins are ANDed together to control
the IGBT gate driver. If only one trigger pin is used,
the other pin must be connected to VIN to ensure
it is at logic high. However, triggering is disabled
(locked) during charging. This is to prevent switching
noises from interfering with the IGBT driver. After
the CHARGE pin goes high (at the start of a charging
cycle), the IC must wait for completion of the charg¯¯¯¯ Ō¯¯N̄¯Ē
¯ goes low) before triggering can be
ing cycle (D
enabled, according to the following chart:
Conditions
Resulting State
CHARGE
¯N̄¯Ē
¯
D̄¯Ō
IGBT Gate Driver
Low
Don’t Care
Enabled
High
High
Disabled
High
Low
Enabled
Red Eye Reduction
The IGBT gate driver is always enabled when the
CHARGE pin is low. If the CHARGE pin is disabled
before sufficient voltage has built up on the output
capacitor, the flash may not fire. In the case of redeye reduction flashes, it is recommended to keep the
CHARGE pin low until completion of triggering
pulses. This ensures that the IGBT gate driver will
¯ pin state.
remain enabled regardless of the ¯¯¯
D¯ Ō¯¯N̄¯Ē
Selection of Transformer
1. The transformer turns ratio (N = NS/NP) determines
the output voltage:
VOUT = K × N – Vd ,
(6)
where K is 31.5 typical and Vd is the forward drop of
the output diode (approximately 2 V).
2. The primary inductance LP determines the on-time
of the switch:
ton = –LP / R × ln (1 – ISWlim × R / VBAT) , (7)
where R is the total resistance in the primary current
path (including the RDS(on) of SW and the DC resistance of the transformer).
If VBAT is much larger than ISWlim × R, then ton can be
approximated by:
ton = ISWlim × LP / VBAT .
(8)
3. The secondary inductance, LS , determines the
off-time of the switch:
toff = (ISWlim / N ) × LS / VOUT .
(9)
Because LS / LP = N × N:
toff = (ISWlim × LP × N ) / VOUT .
(10)
The minimum pulse width for toff determines what
is the minimum primary inductance required for the
transformer. For example, if ISWlim = 0.7 A, N = 10,
and VOUT = 315 V, then LP must be at least 9 μH in
order to keep toff at 200 ns or longer.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
In general, choosing a transformer with a larger LP
results in higher efficiency (because a larger LP means
lower switch frequency and hence lower switching
loss). But a transformer with a larger LP also requires
more windings and a larger magnetic core. Therefore a
trade-off must be made between transformer size and
efficiency. The TLIM pin can be used to select between
two minimum pulse width settings (200 ns and 400 ns),
in order to provide greater design flexibility.
using transformers with lower turns ratios, an efficiency gain of 1% to 2% can be typically expected.
Component Selection
Selection of the flyback transformer should be based
on the peak current, according to the following table.
Note: The maximum peak current must be derated at
higher temperatures.
IPeak Range
Sup-
(A)
plier
1.0 to 2.0
TDK
LDT565630T-001
6
10.4
1.0 to 2.0
TDK
DCT5EPL-UxxS002
8
10
1.0 to 3.2
TDK
DCT9.5/5ER-UxxS003
7.6
10
1.4 to 3.2
TCE
T-17-160 (TTRN-060)
5.6
10.2
An additional feature allows wider choices of transformers. The VSEL pin selects the value of K, among
31.5, 35, and 39.4. These values correspond to transformers with an N of 10, 9, and 8 respectively for the
same target output voltage of approximately 315 V. By
ton
LP
Part Number
(μH)
N
toff
VSW
ISW
Vr
tf
VIN
VIN
ISW
VSW
tneg
Figure 6. Relationship of toff and switch output.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
14
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
Package ES, 3 mm x 3 mm 16-Contact TQFN
with Exposed Thermal Pad
0.30
3.00 ±0.15
0.90
16
1
2
A
0.50
16
1
3.00 ±0.15
1.70
3.10
1.70
17X
D
SEATING
PLANE
0.08 C
+0.05
0.25 –0.07
C
3.10
C
PCB Layout Reference View
0.75 ±0.05
0.50
For reference only
(reference JEDEC MO-220WEED)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
+0.15
0.40 –0.10
A Terminal #1 mark area
B
1.70
2
1
16
1.70
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference IPC7351
QFN50P300X300X80-17W4M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
D Coplanarity includes exposed thermal pad and terminals
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
15
High Current Photoflash Capacitor Charger
with IGBT Driver for Two Li+ Batteries
A8425
Revision History
Revision
Revision Date
Description of Revision
Rev. 1
April 19, 2012
Update Selection Guide, miscellaneous format changes
Copyright ©2007-2012, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
16
Similar pages