DATASHEET

ISL3232E, ISL4221E, ISL4223E
®
Data Sheet
May 13, 2010
FN6045.6
QFN Packaged, ±15kV ESD Protected,
+2.7V to +5.5V, 150nA, 250kbps, RS-232
Transmitters/Receivers
Features
The Intersil ISL3232E and ISL4221E, ISL4223E devices are
2.7V to 5.5V powered RS-232 transmitters/receivers which
meet ElA/TIA-232 and V.28/V.24 specifications, even at
VCC = 3.0V. Additionally, they provide ±15kV ESD protection
(IEC61000-4-2 Air Gap and Human Body Model) on
transmitter outputs and receiver inputs (RS-232 pins).
Targeted applications are PDAs, Palmtops, and hand-held
products where the low operational, and even lower standby,
power consumption is critical. Efficient on-chip charge pumps,
coupled with manual and automatic power-down functions,
reduce the standby supply current to a 150nA trickle. Tiny
5mmx5mm Quad Flat No-Lead (QFN) packaging and the
use of small, low value capacitors ensure board space
savings as well. Data rates greater than 250kbps are
guaranteed at worst case load conditions.
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
The ISL4221E is a 1 driver, 1 receiver device and the
ISL3232E and ISL4223E are 2 driver, 2 receiver devices
that, coupled with the 5mmx5mm QFN package, provide the
industry’s smallest, lowest power serial port suitable for
PDAs, and hand-held applications. The 5mmx5mm QFN
requires 40% less board area than a 20 Ld TSSOP, and is
nearly 20% thinner.
The ISL4221E, ISL4223E versions feature an automatic
power-down function that powers down the on-chip power
supply and driver circuits. This occurs when an attached
peripheral device is shut off or the RS-232 cable is removed,
conserving system power automatically without changes to
the hardware or operating system. It powers up again when
a valid RS-232 voltage is applied to any receiver input.
Table 1 summarizes the features of the IC’s, while
Application Note AN9863 summarizes the features of each
device comprising the 3V RS-232 family.
• Available in Near Chip Scale QFN (5mmx5mm) Package,
which is 40% Smaller than a 20 Ld TSSOP
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• RS-232 Compatible with VCC = 2.7V
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
• Manual and Automatic Power-down Features (Except
ISL3232E)
• Receiver Hysteresis For Improved Noise Immunity
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Wide Power Supply Range . . . . . . Single +2.7V to +5.5V
• Low Supply Current in Power-down State . . . . . . . .150nA
• Pb-Free Available (RoHS Compliant)
Applications
• Any Space Constrained System Requiring RS-232 Ports
- Battery Powered, and Portable Equipment
- Hand-Held Products (GPS Receivers, Bar Code
Scanners, etc.)
- PDAs and Palmtops, Data Cables
- Cellular/Mobile Phones, Digital Cameras
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
• Technical Brief TB379 “Thermal Characterization of
Packages for ICs”
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
TABLE 1. SUMMARY OF FEATURES
NO. OF NO. OF
PART NUMBER
Tx.
Rx.
QFN PKG.
AVAILABLE?
DATA RATE
(kbps)
Rx. ENABLE
FUNCTION?
MANUAL
POWER-DOWN?
AUTOMATIC POWER-DOWN
FUNCTION?
YES
YES
YES
ISL4221E
1
1
YES
250
ISL3232E
2
2
YES
250
NO
NO
NO
ISL4223E
2
2
YES
250
YES
YES
YES
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2007, 2008, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL3232E, ISL4221E, ISL4223E
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE (°C)
PKG.
DWG. #
PACKAGE
ISL3232EIRZ* (Note)
ISL3232 EIRZ
-40 to +85
16 Ld QFN (Pb-free)
L16.5x5B
ISL4221EIR*
ISL 4221EIR
-40 to +85
16 Ld QFN
L16.5x5B
ISL4221EIRZ* (Note)
ISL4221 EIRZ
-40 to +85
16 Ld QFN (Pb-free)
L16.5x5B
ISL4223EIR*
ISL 4223EIR
-40 to +85
20 Ld QFN
L20.5x5
ISL4223EIRZ* (Note)
ISL4223 EIRZ
-40 to +85
20 Ld QFN (Pb-free)
L20.5x5
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
ISL4221E
(16 LD QFN)
TOP VIEW
C2+
2
11 R1IN
C2-
3
10 R1OUT
V-
4
9
5
6
7
8
T2OUT
R2IN
R2OUT
T2IN
PD
V+
1
C1-
2
VCC
12 T1OUT
16
15
14
13
12 GND
11 T1OUT
PD
T1IN
C2+
3
10 FORCEON
C2-
4
9
5
6
7
8
INVALID
1
FORCEOFF
C1-
R1OUT
13
EN
GND
14
R1IN
VCC
15
C1+
C1+
16
V-
V+
ISL3232E
(16 LD QFN)
TOP VIEW
T1IN
2
C1+
EN
FORCEOFF
VCC
GND
ISL4223E
(20 LD QFN)
TOP VIEW
20
19
18
17
16
V+
1
15 T1OUT
C1-
2
14 R1IN
C2+
3
C2-
4
12 FORCEON
V-
5
11 T1IN
13 R1OUT
6
7
8
9
10
T2OUT
R2IN
R2OUT
INVALID
T2IN
PD
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Pin Descriptions
PIN
VCC
FUNCTION
System power supply input (2.7V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection. This is also the potential of the thermal pad (PD)
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
TIN
TOUT
RIN
ROUT
INVALID
TTL/CMOS compatible transmitter Inputs.
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
±15kV ESD Protected, RS-232 compatible receiver inputs.
TTL/CMOS level receiver outputs.
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2).
FORCEON
Active high input to override automatic power-down circuitry thereby keeping transmitters active. (FORCEOFF must be high).
EN
Active low receiver enable control.
PD
Exposed Thermal Pad. Connect to GND.
Typical Operating Circuits
ISL3232E
+3.3V
C1
0.1µF
+
C2
0.1µF
+
T1IN
T2IN
TTL/CMOS
LOGIC LEVELS
+
R1OUT
0.1µF
15
1
2
3
9
8
C1+
14
VCC
C1C2+
V-
C2T1
16
C
+ 3
0.1µF
4
C4
0.1µF
+
12
T2
5
10
11
5kΩ
R1
R2OUT
V+
7
6
5kΩ
R2
T1OUT
T2OUT
R1IN
RS-232
LEVELS
R2IN
GND
13
3
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Typical Operating Circuits
ISL4221E
+3.3V
+
0.1µF
13
16
+ C1+
2
C13
+ C2+
4
C2-
C1
0.1µF
C2
0.1µF
T1IN
TTL/CMOS
LOGIC
LEVELS R1
OUT
VCC
V+
1
V- 5
T1
9
11
7
6
5kΩ
R1
+ C3
0.1µF
C4
+ 0.1µF
T1OUT
R1IN
RS-232
LEVELS
15 EN
FORCEOFF
10
FORCEON
GND
INVALID
14
8
VCC
TO POWER
CONTROL LOGIC
12
ISL4223E
+3.3V
C1
0.1µF
+
C2
0.1µF
+
T1IN
T2IN
TTL/CMOS
LOGIC LEVELS
+
R1OUT
0.1µF
20
C1+
2
17
VCC
C13
C2+
4
C2-
VT1
11
10
5
C4
0.1µF
+
14
5kΩ
8
7
EN
5kΩ
R2
FORCEOFF
12
C
+ 3
0.1µF
6
13
19
1
15
T2
R1
R2OUT
V+
INVALID
FORCEON
18
9
T1OUT
T2OUT
R1IN
RS-232
LEVELS
R2IN
VCC
TO POWER
CONTROL LOGIC
GND
16
4
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Absolute Maximum Ratings
Thermal Information
VCC to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN, FORCEOFF, FORCEON, EN . . . . . . . . . . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
ROUT, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
16 Ld QFN Package (Notes 1, 2). . . . .
35
4.3
20 Ld QFN Package (Notes 1, 2). . . . .
32
4.3
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379, and Tech Brief TB389.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 through C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = +25°C
TEMP
(°C)
MIN
(Note 4)
TYP
MAX
(Note 4)
UNITS
Supply Current, Automatic Power-down All RIN Open, FORCEON = GND, FORCEOFF = VCC
(Except ISL3232E)
25
-
0.15
1
µA
Supply Current, Power-down
FORCEOFF = GND (Except ISL3232E)
25
-
0.15
1
µA
Supply Current,
Automatic Power-down Disabled
VCC = 3.15V
All Outputs Unloaded,
FORCEON = FORCEOFF = VCC
25
-
0.3
1.0
mA
PARAMETER
TEST CONDITIONS
DC CHARACTERISTICS
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
TIN, FORCEON, FORCEOFF, EN
Full
-
-
0.8
V
Input Logic Threshold High
TIN, FORCEON, FORCEOFF, EN VCC = 3.3V
Full
2.0
-
-
V
VCC = 5.0V
Full
2.4
-
-
V
Input Leakage Current
TIN, FORCEON, FORCEOFF, EN
Full
-
±0.01
±1.0
µA
Output Leakage Current
EN = VCC (Except ISL3232E)
Full
-
±0.05
±10
µA
Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
Output Voltage High
IOUT = -1.0mA
Full
-
V
VCC - 0.6 VCC - 0.1
AUTOMATIC POWER-DOWN (FORCEON = GND, FORCEOFF = VCC, Except ISL3232E)
Receiver Input Thresholds to Enable
Transmitters
ISL4221E, ISL4223E Powers Up (See Figure 6)
Full
-2.7
-
2.7
V
Receiver Input Thresholds to Disable
Transmitters
ISL4221E, ISL4223E Powers Down (See Figure 6)
Full
-0.3
-
0.3
V
INVALID Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
INVALID Output Voltage High
IOUT = -1.0mA
Full
VCC - 0.6
-
-
V
Receiver Threshold to Transmitters
Enabled Delay (tWU)
25
-
100
-
µs
Receiver Positive or Negative Threshold
to INVALID High Delay (tINVH)
25
-
1
-
µs
Receiver Positive or Negative Threshold
to INVALID Low Delay (tINVL)
25
-
30
-
µs
5
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 through C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = +25°C (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 4)
TYP
MAX
(Note 4)
UNITS
25
-25
-
25
V
1.2
-
V
RECEIVER INPUTS
Input Voltage Range
Input Threshold Low
VCC = 3.3V
25
0.6
VCC = 5.0V
25
0.8
1.5
-
V
Input Threshold High
VCC = 3.3V
25
-
1.5
2.4
V
VCC = 5.0V
25
-
1.8
2.4
V
Input Hysteresis
25
-
0.5
-
V
Input Resistance
25
3
5
7
kΩ
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
±5.0
±5.4
-
V
Output Resistance
VCC = V+ = V- = 0V, Transmitter Output = ±2V
Full
300
10M
-
Ω
Output Short-Circuit Current
Full
-
±35
±60
mA
VOUT = ±12V, VCC = 0V, or VCC = 3V to 5.5V,
with Automatic Power-down or FORCEOFF = GND
Full
-
-
±25
µA
Maximum Data Rate
RL = 3kΩ, CL = 1000pF, One Transmitter Switching
Full
250
500
-
kbps
Receiver Propagation Delay
Receiver Input to Receiver
Output, CL = 150pF
tPHL
25
-
0.15
-
µs
tPLH
25
-
0.15
-
µs
Output Leakage Current
TIMING CHARACTERISTICS
Receiver Output Enable Time
Normal Operation (Except ISL3232E)
25
-
200
-
ns
Receiver Output Disable Time
Normal Operation (Except ISL3232E)
25
-
200
-
ns
Transmitter Skew
tPHL - tPLH (Note 3)
25
-
100
-
ns
Receiver Skew
tPHL - tPLH
25
-
50
-
ns
Transition Region Slew Rate
VCC = 3.3V, RL = 3kΩ to 7kΩ,
Measured From 3V to -3V
or -3V to 3V
CL = 150pF to
2500pF
25
4
-
30
V/µs
CL = 150pF to
1000pF
25
6
-
30
V/µs
25
-
±15
-
kV
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN)
Human Body Model
All Other Pins
IEC61000-4-2 Contact Discharge
25
-
±8
-
kV
IEC61000-4-2 Air Gap Discharge
25
-
±15
-
kV
Human Body Model
25
-
±2
-
kV
NOTES:
3. Transmitter skew is measured at the transmitter zero crossing points.
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
6
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Detailed Description
The ISL4221E, ISL4223E and ISL3232E operate from a
single +2.7V to +5.5V supply, guarantee a 250kbps minimum
data rate, require only four small external 0.1µF capacitors,
feature low power consumption, and meet all ElA RS-232C
and V.28 specifications even with VCC = 3.0V. The circuit is
divided into three sections: The charge pump, the transmitters
and the receivers.
input high whenever the UART powers down. Figure 3 also
shows that the INVALID output can be used to determine
when the UART should be powered down. When the RS-232
cable is disconnected, INVALID switches low indicating that
the UART is no longer needed. Reconnecting the cable drives
INVALID back high, indicating that the UART should be
powered up.
VCC
Charge-Pump
RXOUT
RXIN
Intersil’s new RS-232 devices utilize regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a VCC supply as
low as 3.0V. This allows them to maintain RS-232 compliant
output levels over the ±10% tolerance range of 3.3V
powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
voltage doubler and inverter functions. The charge pumps
operate discontinuously (i.e., they turn off as soon as the V+
and V- supplies are pumped up to the nominal values),
resulting in significant power savings.
-25V ≤ VRIN ≤ +25V
GND ≤ VROUT ≤ VCC
5kΩ
GND
FIGURE 1. INVERTING RECEIVER CONNECTIONS
VCC
VCC
CURRENT
FLOW
VCC
VOUT = VCC
Transmitters
The transmitters are proprietary, low dropout, inverting drivers
that translate TTL/CMOS inputs to EIA/TIA-232 output levels.
Coupled with the on-chip ±5.5V supplies, these transmitters
deliver true RS-232 levels over a wide range of single supply
system voltages.
All ISL4221E, ISL4223E transmitter outputs disable and
assume a high impedance state when the device enters the
power-down mode (see Table 2). These outputs may be driven
to ±12V when disabled.
Rx
POWERED
DOWN
UART
Tx
GND
SHDN = GND
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
The devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one
transmitter operating at full speed. Under more typical
conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one
transmitter easily operates at 900kbps.
Transmitter inputs float if left unconnected, and may cause
ICC increases. Connect unused inputs to GND for the best
performance.
OLD
RS-232 CHIP
VCC
TRANSITION
DETECTOR
TO
WAKE-UP
LOGIC
ISL4221E, ISL4223E
VCC
INVALID
Receivers
All these RS-232 devices contain standard inverting receivers,
and the ISL4221E, ISL4223E receivers three-state via the EN
control line. All the receivers convert RS-232 signals to CMOS
output levels and accept inputs up to ±25V while presenting
the required 3kΩ to 7kΩ input impedance (see Figure 1) even
if the power is off (VCC = 0V). The receivers’ Schmitt trigger
input stage uses hysteresis to increase noise immunity and
decrease errors due to slow input signal transitions.
RX
POWERED
DOWN
UART
VOUT = HI-Z
ROUT
TX
RIN
TIN
EN = VCC
TOUT
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
Receivers driving a powered down UART must be disabled to
prevent current flow through, and possible damage to, the
UART’s protection diodes (see Figures 2 and 3). This can be
accomplished on the ISL4221E, ISL4223E by driving the EN
7
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
TABLE 2. POWER-DOWN AND ENABLE LOGIC TRUTH TABLE (EXCLUDING ISL3232E)
RS-232 SIGNAL
PRESENT AT
RECEIVER INPUT?
FORCEOFF FORCEON
EN
TRANSMITTER RECEIVER INVALID
INPUT
INPUT
INPUT
OUTPUTS
OUTPUTS OUTPUT
MODE OF OPERATION
NO
H
H
L
Active
Active
L
NO
H
H
H
Active
High-Z
L
YES
H
L
L
Active
Active
H
YES
H
L
H
Active
High-Z
H
NO
H
L
L
High-Z
Active
L
NO
H
L
H
High-Z
High-Z
L
YES
L
X
L
High-Z
Active
H
Manual Power-down
YES
L
X
H
High-Z
High-Z
H
Manual Power-down w/Rcvr. Disabled
NO
L
X
L
High-Z
Active
L
Manual Power-down
NO
L
X
H
High-Z
High-Z
L
Manual Power-down w/Rcvr. Disabled
Low Power Operation
These 3V devices require a nominal supply current of
0.3mA, even at VCC = 5.5V, during normal operation (not in
power-down mode). This is considerably less than the 5mA
to 11mA current required by comparable 5V RS-232 devices,
allowing users to reduce system power simply by switching to
this new family.
Normal Operation
(Auto Power-down Disabled)
Normal Operation
(Auto Power-down Enabled)
Power-down Due to Auto Power-down
Logic
The time to recover from automatic power-down mode is
typically 100µs.
FORCEOFF
PWR
MGT
LOGIC
FORCEON
INVALID
ISL4221E, ISL4223E
Power-down Functionality (Excluding
ISL3232E)
The already low current requirement drops significantly when
the device enters power-down mode. In power-down, supply
current drops to 150nA because the on-chip charge pump
turns off (V+ collapses to VCC, V- collapses to GND) and the
transmitter outputs three-state. Receiver outputs are
unaffected by power-down; refer to Table 2 for details. This
micro-power mode makes the ISL4221E, ISL4223E ideal for
battery-powered and portable applications.
Software Controlled (Manual) Power-down
I/O
UART
CPU
FIGURE 4. CONNECTIONS FOR MANUAL POWER-DOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
The ISL4221E, ISL4223E family provides pins that allow the
user to force the IC into the low power, standby state.
The ISL4221E, ISL4223E utilize a two pin approach where
the FORCEON and FORCEOFF inputs determine the IC’s
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between active
and power-down modes, under logic or software control, only
the FORCEOFF input need be driven. The FORCEON state
isn’t critical, as FORCEOFF dominates over FORCEON.
Nevertheless, if strictly manual control over power-down is
desired, the user must strap FORCEON high to disable the
automatic power-down circuitry.
Connecting FORCEOFF and FORCEON together disables
the automatic power-down feature, enabling them to function
as a manual SHUTDOWN input (see Figure 4).
8
POWER
MANAGEMENT
UNIT
MASTER POWER-DOWN LINE
0.1µF
FORCEOFF
1MΩ
FORCEON
ISL4221E, ISL4223E
FIGURE 5. CIRCUIT TO PREVENT AUTO POWER-DOWN
FOR 100ms AFTER FORCED POWER-UP
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
2.7V
VALID RS-232 LEVEL - ISL4221E, ISL4223E IS ACTIVE
INDETERMINATE - POWER-DOWN MAY OR
MAY NOT OCCUR
0.3V
INVALID LEVEL - POWER-DOWN OCCURS AFTER 30µs
-0.3V
INDETERMINATE - POWER-DOWN MAY OR
MAY NOT OCCUR
-2.7V
VALID RS-232 LEVEL - ISL4221E, ISL4223E IS ACTIVE
Some applications may need more time to wake up from
shutdown. If automatic power-down is being utilized, the
RS-232 device will re-enter power-down if valid receiver
levels aren’t reestablished within 30µs of the ISL4221E,
ISL4223E powering up. Figure 5 illustrates a circuit that
keeps the ISL4221E, ISL4223E from initiating automatic
power-down for 100ms after powering up. This gives the
slow-to-wake peripheral circuit time to re-establish valid
RS-232 output levels.
The time to recover from automatic power-down mode is
typically 100µs.
INVALID Output (Excluding ISL3232E)
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
INVALID
} REGION
RECEIVER
INPUTS
TRANSMITTER
OUTPUTS
INVALID
OUTPUT
VCC
0
tINVL
tINVH
PWR UP
AUTOPWDN
V+
VCC
0
V-
FIGURE 7. AUTOMATIC POWER-DOWN AND INVALID
TIMING DIAGRAMS
Automatic Power-down (Excluding ISL3232E)
Even greater power savings is available by using the
automatic power-down function. When no valid RS-232
voltages (see Figure 6) are sensed on any receiver input for
30µs, the charge pump and transmitters power-down,
thereby reducing supply current to 150nA. Invalid receiver
levels occur whenever the driving peripheral’s outputs are
shut off (powered down) or when the RS-232 interface cable
is disconnected. The ISL4221E, ISL4223E powers back up
whenever it detects a valid RS-232 voltage level on any
receiver input. This automatic power-down feature provides
additional system power savings without changes to the
existing operating system.
Automatic power-down operates when the FORCEON input is
low, and the FORCEOFF input is high. Tying FORCEON high
disables automatic power-down, but manual power-down is
always available via the overriding FORCEOFF input. Table 2
summarizes the automatic power-down functionality.
9
The INVALID output always indicates whether or not a valid
RS-232 signal (see Figure 6) is present at any of the
receiver inputs (see Table 2), giving the user an easy way to
determine when the interface block should power down.
Invalid receiver levels occur whenever the driving
peripheral’s outputs are shut off (powered down) or when the
RS-232 interface cable is disconnected. In the case of a
disconnected interface cable where all the receiver inputs
are floating (but pulled to GND by the internal receiver pull
down resistors), the INVALID logic detects the invalid levels
and drives the output low. The power management logic
then uses this indicator to power-down the interface block.
Reconnecting the cable restores valid levels at the receiver
inputs, INVALID switches high, and the power management
logic wakes up the interface block. INVALID can also be
used to indicate the DTR or RING INDICATOR signal, as
long as the other receiver inputs are floating, or driven to
GND (as in the case of a powered down driver).
INVALID switches low after invalid levels have persisted on all
of the receiver inputs for more than 30µs (see Figure 7).
INVALID switches back high 1µs after detecting a valid
RS-232 level on a receiver input. INVALID operates in all
modes (forced or automatic power-down, or forced on), so it is
also useful for systems employing manual power-down
circuitry. When automatic power-down is utilized, INVALID = 0
indicates that the ISL4221E, ISL4223E is in power-down
mode.
Capacitor Selection
The charge pumps require 0.1µF, or greater, capacitors for
proper operation. Increasing the capacitor values (by a
factor of 2) reduces ripple on the transmitter outputs and
slightly reduces power consumption.
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Power Supply Decoupling
VCC
0.1µF
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple VCC to ground with a
capacitor of the same value as the charge-pump capacitor C1.
Connect the bypass capacitor as close as possible to the IC.
C1
Transmitter Outputs when Exiting
Power-down
C2
VCC
V+
+
C1+
+
C1ISL4221E, ISL4223E
VC2+
Note that the transmitters enable only when the magnitude
of the supplies exceed approximately 3V.
TIN
C3
C4
TOUT
RIN
ROUT
FORCEON
VCC
+
+
C2-
Figure 8 shows the response of two transmitter outputs
when exiting power-down mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF.
1000pF
5k
FORCEOFF
FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT
Operation Down to 2.7V
ISL4221E, ISL4223E and ISL3232E transmitter outputs
meet RS-562 levels (±3.7V), at the full data rate, with VCC
as low as 2.7V. RS-562 levels typically ensure inter
operability with RS-232 devices.
High Data Rates
The ISL4221E, ISL4223E and ISL3232E maintain the RS232 ±5V minimum transmitter output voltages even at high
data rates. Figure 9 details a transmitter loopback test
circuit, and Figure 10 illustrates the loopback test result at
120kbps. For this test, all transmitters were simultaneously
driving RS-232 loads in parallel with 1000pF, at 120kbps.
Figure 11 shows the loopback results for a single transmitter
driving 1000pF and an RS-232 load at 250kbps. The static
transmitters were also loaded with an RS-232 receiver.
5V/DIV
+
5V/DIV
T1IN
T1OUT
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
TIME (5µs/DIV)
FIGURE 10. LOOPBACK TEST AT 120kbps
5V/DIV
FORCEOFF
T1
T1IN
T1OUT
2V/DIV
T2
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
VCC = +3.3V
C1 - C4 = 0.1µF
TIME (20µs/DIV)
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWER-DOWN
10
TIME (2µs/DIV)
FIGURE 11. LOOPBACK TEST AT 250kbps
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Interconnection with 3V and 5V Logic
Human Body Model (HBM) Testing
The ISL4221E, ISL4223E and ISL3232E directly interface
with 5V CMOS and TTL logic families. Nevertheless, with the
ISL4221E, ISL4223E and ISL3232E at 3.3V, and the logic
supply at 5V, AC, HC, and CD4000 outputs can properly
drive ISL4221E, ISL4223E and ISL3232E inputs, but
ISL4221E, ISL4223E and ISL3232E outputs do not reach
the minimum VIH for these logic families. See Table 3 for
more information.
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
VCC
SYSTEM
POWER-SUPPLY SUPPLY
VOLTAGE
VOLTAGE
(V)
(V)
3.3
3.3
5
5
5
3.3
IEC61000-4-2 Testing
COMPATIBILITY
Compatible with all CMOS
families.
Compatible with all TTL and
CMOS logic families.
Compatible with ACT and HCT
CMOS, and with TTL. ISL4221E,
ISL4223E and ISL3232E outputs
are incompatible with AC, HC,
and CD4000 CMOS inputs.
The IEC61000-4-2 test method applies to finished
equipment, rather than to an individual IC. Therefore, the
pins most likely to suffer an ESD event are those that are
exposed to the outside world (the RS-232 pins in this case),
and the IC is tested in its typical application configuration
(power applied) rather than testing each pin-to-pin
combination. The lower current limiting resistor coupled with
the larger charge storage capacitor yields a test that is much
more severe than the HBM test. The extra ESD protection
built into this device’s RS-232 pins allows the design of
equipment meeting level 4 criteria without the need for
additional board level protection on the RS-232 port.
±15kV ESD Protection
AIR-GAP DISCHARGE TEST METHOD
All pins on ISL4221E, ISL4223E and ISL3232E devices
include ESD protection structures, but the RS-232 pins
(transmitter outputs and receiver inputs) incorporate
advanced structures, which allow them to survive ESD
events up to ±15kV. The RS-232 pins are particularly
vulnerable to ESD damage because they typically connect to
an exposed port on the exterior of the finished product.
Simply touching the port pins, or connecting a cable, can
cause an ESD event that might destroy unprotected ICs.
These new ESD structures protect the device whether or not
it is powered-up, protect without allowing any latchup
mechanism to activate, and don’t interfere with RS-232
signals as large as ±25V.
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The “E” device RS-232 pins withstand
±15kV air-gap discharges.
11
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Typical Performance Curves
VCC = 3.3V, TA = +25°C
25
VOUT+
4
20
2
SLEW RATE (V/µs)
TRANSMITTER OUTPUT VOLTAGE (V)
6
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
0
-2
15
-SLEW
+SLEW
10
VOUT -
-4
-6
0
1000
2000
3000
4000
5
5000
0
1000
LOAD CAPACITANCE (pF)
FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
45
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
5000
ISL4223E/ISL3232E
40
250kbps
30
25
20
120kbps
15
10
20kbps
5
250kbps
35
30
25
120kbps
20
15
20kbps
10
5
0
1000
2000
3000
4000
5000
0
0
1000
LOAD CAPACITANCE (pF)
3.5
2.5
4000
5000
Die Characteristics
SUBSTRATE AND QFN THERMAL PAD POTENTIAL
(POWERED UP):
GND
2.0
TRANSISTOR COUNT:
ISL3232E: 296
ISL4221E: 286
ISL4223E: 357
1.5
1.0
PROCESS:
0.5
0
2.5
3000
FIGURE 15. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
NO LOAD
ALL OUTPUTS STATIC
3.0
2000
LOAD CAPACITANCE (pF)
FIGURE 14. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
SUPPLY CURRENT (mA)
4000
45
35
0
3000
FIGURE 13. SLEW RATE vs LOAD CAPACITANCE
ISL4221E
40
2000
LOAD CAPACITANCE (pF)
Si Gate CMOS
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
FIGURE 16. SUPPLY CURRENT vs SUPPLY VOLTAGE
12
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Package Outline Drawing
L16.5x5B
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 2, 02/08
4X 2.4
5.00
12X 0.80
A
B
13
6
PIN 1
INDEX AREA
6
PIN #1 INDEX AREA
16
12
5.00
1
3 . 10 ± 0 . 15
9
(4X)
4
0.15
5
8
TOP VIEW
0.10 M C A B
+0.15
16X 0 . 60
-0.10
4 0.33 +0.07 / -0.05
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
1.00 MAX
C
BASE PLANE
SEATING PLANE
0.08 C
( 4 . 6 TYP )
SIDE VIEW
(
( 12X 0 . 80 )
3 . 10 )
C
( 16X 0 .33 )
0 . 2 REF
5
( 16 X 0 . 8 )
0 . 00 MIN.
0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
13
FN6045.6
May 13, 2010
ISL3232E, ISL4221E, ISL4223E
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L20.5x5
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
NOTES
A
0.80
0.90
1.00
-
A1
-
0.02
0.05
-
A2
-
0.65
1.00
9
0.38
5, 8
A3
b
0.20 REF
0.23
0.30
9
D
5.00 BSC
-
D1
4.75 BSC
9
D2
2.95
E
E1
E2
3.10
3.25
7, 8
5.00 BSC
-
4.75 BSC
2.95
e
3.10
9
3.25
7, 8
0.65 BSC
-
k
0.20
-
-
-
L
0.35
0.60
0.75
8
N
20
2
Nd
5
3
Ne
5
3
P
-
-
0.60
9
θ
-
-
12
9
Rev. 4 11/04
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Compliant to JEDEC MO-220VHHC Issue I except for the "b"
dimension.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
14
FN6045.6
May 13, 2010
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