DATASHEET

ISL28156
ESIGNS
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Data
Sheet
January 16, 2014
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8
8
1-8
39µA Micropower Precision Rail-to-Rail
Input-Output (RRIO) Low Input Bias
Current Op Amp
The ISL28156 is a micropower precision operational
amplifier optimized for single supply operation at 5V and can
be operated down to 2.4V.
This device features an Input Range Enhancement Circuit
(IREC), which enables it to maintain CMRR performance for
input voltages greater than the positive supply. The input
signal is capable of swinging 0.5V above a 5.0V supply
(0.25V for a 2.5V supply) and to within 10mV from ground.
The output operation is rail-to-rail.
The 1/f corner of the voltage noise spectrum is at 1kHz. This
results in low frequency noise performance, which can only
be found on devices with an order of magnitude higher than
the supply current.
The ISL28156 can be operated from one lithium cell or two
Ni-Cd batteries. The input range includes both positive and
negative rail. The output swings to both rails.
Features
• 39µA typical supply current
• 5nA max input bias current
• 250kHz gain bandwidth product (AV = 1)
• 2.4V to 5.5V single supply voltage range
• Rail-to-rail input and output
• Enable pin
• Pb-free (RoHS compliant)
Applications
• Battery- or solar-powered systems
• 4mA to 20mA current loops
• Handheld consumer products
• Medical devices
• Sensor amplifiers
• ADC buffers
• DAC output amplifiers
Ordering Information
PART NUMBER
(Note 2)
FN6154.6
PART
MARKING
PACKAGE
(Pb-free)
PKG.
DWG. #
Pinouts
GABV (Note3)
6 Ld SOT-23
P6.064A
ISL28156FBZ
28156 FBZ
8 Ld SOIC
M8.15E
OUT 1
ISL28156FBZ-T7
(Note 1)
28156 FBZ
8 Ld SOIC
M8.15E
V- 2
ISL28156EVAL1Z
Evaluation Board
IN+ 3
1. Please refer to TB347 for details on reel specifications.
ISL28156
(8 LD SOIC)
TOP VIEW
ISL28156
(6 LD SOT-23)
TOP VIEW
ISL28156FHZ-T7
(Note 1)
+ -
6 V+
NC 1
5 ENABLE
IN- 2
4 IN-
IN+ 3
V- 4
8 ENABLE
+
7 V+
6 OUT
5 NC
2. These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials,
and 100% matte tin plate plus anneal (e3 termination finish,
which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet
or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. The part marking is located on the bottom of the parts.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2006, 2007, 2008, 2014, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL28156
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Resistance
JA (°C/W)
6 Ld SOT-23 Package (Note 4) . . . . . . . . . . . . . . . .
230
6 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
110
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, TA = +25°C unless otherwise specified. Boldface limits apply over the
operating temperature range, -40°C to +125°C. Temperature data established by characterization.
PARAMETER
VOS
DESCRIPTION
Input Offset Voltage
CONDITIONS
8 Ld SOIC
MIN
(Note 5)
TYP
-120
-7
-200
6 Ld SOT-23
-400
Input Offset Drive vs Temperature
IOS
Input Offset Current
-7
120
µV
400
1.5
-1.5
Input Bias Current
-2
µV
450
0.34
-5
IB
UNIT
250
-450
V OS
--------------T
MAX
(Note 5)
µV/°C
1.2
nA
2.5
1.14
-3.5
5
nA
5
EN
Input Noise Voltage Density
FO = 1kHz
46
nV/Hz
IN
Input Noise Current Density
FO = 1kHz
0.14
pA/Hz
CMIR
Input Common-Mode Voltage Range
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
PSRR
Power Supply Rejection Ratio
VS = 2.4V to 5V
0
80
5
V
110
dB
104
dB
412
V/mV
70
V/mV
75
90
75
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4.5V, RL = 100k
200
175
VO = 0.5V to 4.5V, RL = 1k
35
30
VOUT
Maximum Output Voltage Swing
Output low, RL = 100k
3
6
mV
8
Output low, RL = 1k
130
150
mV
200
Output high, RL = 100k
4.992
4.985
V
4.88
V
4.99
Output high, RL = 1k
4.85
4.8
2
FN6154.6
January 16, 2014
ISL28156
Electrical Specifications V+ = 5V, V- = 0V,VCM = 2.5V, TA = +25°C unless otherwise specified. Boldface limits apply over the
operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued)
PARAMETER
DESCRIPTION
SR
Slew Rate
GBW
Gain Bandwidth Product
IS,ON
Supply Current, Enabled
CONDITIONS
MIN
(Note 5)
AV = 1
29
TYP
Supply Current, Disabled
UNIT
0.05
V/µs
250
kHz
39
18
IS,OFF
MAX
(Note 5)
47
µA
56
10
14
µA
16
IO+
Short-Circuit Output Current
RL = 10
28
31
mA
26
mA
23
IO-
Short-Circuit Output Current
RL = 10
24
18
VSUPPLY
Supply Operating Range
VENH
Enable Pin High Level
Guaranteed by PSRR test
2.4
5
V
VENL
Enable Pin Low Level
IENH
Enable Pin Input Current
VEN = 5V
1
IENL
Enable Pin Input Current
VEN = 0V
16
tEN
Enable to Output On-state Delay Time
VOUT = 1V (enable state);
VEN = High-to-Low
10.8
µs
tEN
Enable to Output Off-state Delay Time
VOUT = 0V (disabled state);
VEN = Low-to- High
0.1
µs
2
V
0.8
V
1.2
µA
1.2
25
nA
30
NOTE:
5. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.
3
FN6154.6
January 16, 2014
ISL28156
Typical Performance Curves
3
RL = 1k
1
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
2
0
-1
RL = 10k
-2
RL = 100k
-3
-4
-5
AV = 1
CL = 16.3pF
VOUT = 10mVP-P
-6
-7
-8
1k
10k
100k
FREQUENCY (Hz)
1M
8
7
6
5
4
3
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
CL = 63.3pF
CL = 55.3pF
CL = 49.3pF
CL = 43.3pF
CL = 38.3pF
CL = 34.3pF
AV = 1
RL = 10k
VOUT = 10mVP-P
1k
60
RL = 10k
CL = 16.3pF
VOUT = 10mVP-P
GAIN (dB)
50
Rf = 100k, Rg = 1k, RL = 10k
40
30
20
10
Rf = 9.09, Rg = 1k, RL = INF
1
0
Rf = 0, Rg = INF, RL = 10k
-10
100
1k
10k
100k
VS = 2.4V
0
NORMALIZED GAIN (dB)
Rf = 1M, Rg = 1k, RL = 10k
1M
-1
VS = 5V
-2
-3
-4
-5
-6
AV = 1
RL = 10k
-8
VOUT = 10mVP-P
-9
1k
10k
-7
0
VOUT = 50mV
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
1
VOUT = 10mV
1
0
-1
-2
VOUT = 100mV
VOUT = 1V
-3
-4
-5
-6
-7
-8
1k
AV = 1
RL = 1k
CL = 16.3pF
-1
100k
FREQUENCY (Hz)
FIGURE 5. GAIN vs FREQUENCY vs VOUT
4
1M
VOUT = 1V
-2
VOUT = 10mV
-3
-4
-5
-6
-7
-8
10k
1M
FIGURE 4. GAIN vs FREQUENCY vs VS
FIGURE 3. CLOSED LOOP GAIN vs FREQUENCY
2
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
3
1M
FIGURE 2. GAIN vs FREQUENCY vs CL
FIGURE 1. GAIN vs FREQUENCY vs RL
70
10k
100k
FREQUENCY (Hz)
-9
VOUT = 50mV
AV = 1
RL = 10k
CL = 16.3pF
1k
VOUT = 100mV
10k
100k
1M
FREQUENCY (Hz)
FIGURE 6. GAIN vs FREQUENCY vs VOUT
FN6154.6
January 16, 2014
ISL28156
Typical Performance Curves (Continued)
1
-1
VOUT = 1V
-10
-2
-3
VOUT = 50mV
-4
-5
-6
-8
-9
VOUT = 100mV
AV = 1
RL = 100k
CL = 16.3pF
-7
AV = 1
RL = 10k
CL = 16.3pF
VCM = 1VP-P
PP
0
CMRR (dB)
NORMALIZED GAIN (dB)
10
VOUT = 10mV
0
VS = 2.4V
-20
VS = 5V
-30
-40
-50
-60
1k
10k
100k
-70
1M
100
1k
FREQUENCY (Hz)
FIGURE 7. GAIN vs FREQUENCY vs VOUT
AV = 1
RL = 1k
CL = 16.3pF
VOUT = 1VP-P
VS = 2.4V
0
-10
PSRR (dB)
-20
-30
10
-10
PSRR-
-40
-50
-20
-30
PSRR-
-40
-50
PSRR+
-70
-80
100
1k
10k
100k
-90
1M
100
1k
100k
1M
FIGURE 10. PSRR vs FREQUENCY, VS = 5V
FIGURE 9. PSRR vs FREQUENCY, VS = 2.4V
1.4
INPUT CURRENT NOISE (pA/Hz)
160
140
120
100
80
60
40
20
0
10k
FREQUENCY (Hz)
FREQUENCY (Hz)
INPUT VOLTAGE NOISE (nV/Hz)
1M
-60
PSRR+
-70
-80
AV = 1
RL = 1k
CL = 16.3pF
VOUT = 1VP-P
VS = 5V
0
-60
100k
FIGURE 8. CMRR vs FREQUENCY
PSRR (dB)
10
10k
FREQUENCY (Hz)
1
10
100
1k
FREQUENCY (Hz)
FIGURE 11. INPUT VOLTAGE NOISE vs FREQUENCY
5
10k
1.2
1.0
0.8
0.6
0.4
0.2
0
1
10
100
1k
10k
FREQUENCY (Hz)
FIGURE 12. INPUT CURRENT NOISE vs FREQUENCY
FN6154.6
January 16, 2014
ISL28156
Typical Performance Curves (Continued)
0
-0.4
RF = Ri = RL = 10k
AV = 2
CL = 16.3pF
VOUT = 10mVP-P
22
SMALL SIGNAL (mV)
-0.2
-0.6
-0.8
-1.0
20
18
16
14
-1.2
12
-1.4
0
1
2
3
4
5
6
7
8
9
10
10
0
50
100
150
TIME (s)
6
0.4
5
0
-0.6
RF = Ri = RL = 10k
AV = 2
CL = 16.3pF
VOUT = 1VP-P
0
100
0.8
3
2
0.4
0.2
0
300
400
-1
0
VOUT
0
10
20
30
40
50
60
70
80
90
-0.2
100
TIME (µs)
FIGURE 16. ENABLE TO OUTPUT DELAY
14.5
MAX
n = 1000
13.5
MAX
12.5
48
CURRENT (µA)
CURRENT (µA)
0.6
RF = Ri =RL = 10k
AV = 2
CL = 16.3pF
VOUT = 10mVP-P
FIGURE 15. LARGE SIGNAL STEP RESPONSE
53
400
1.0
1
200
n = 1000
350
V-ENABLE
TIME (µs)
58
300
1.2
4
0.2
ENABLE (V)
LARGE SIGNAL (V)
0.6
-0.4
250
FIGURE 14. SMALL SIGNAL STEP RESPONSE
FIGURE 13. 1Hz TO 10Hz INPUT NOISE
-0.2
200
TIME (µs)
OUTPUT (V)
INPUT NOISE (µV)
24
AV = 1000
RF = 100k
Ri = 100
RL = 10k
MEDIAN
43
38
33
11.5
9.5
8.5
MIN
28
7.5
23
-40
6.5
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 17. SUPPLY CURRENT ENABLED vs TEMPERATURE
VS = ±2.5V
6
MEDIAN
10.5
MIN
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 18. SUPPLY CURRENT DISABLED vs
TEMPERATURE VS = ±2.5V
FN6154.6
January 16, 2014
ISL28156
Typical Performance Curves (Continued)
400
380
n = 1000
280
VIO (µV)
VIO (µV)
MEDIAN
80
-20
-120
MIN
-320
-420
-40
0
-100
-20
0
MIN
-300
20
40
60
80
TEMPERATURE (°C)
100
-400
-40
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 19. VIO SO8 PACKAGE vs TEMPERATURE VS = ±2.5V
FIGURE 20. VIO SO8 PACKAGE vs TEMPERATURE VS = ±1.2V
380
400
280
300
MAX
n = 1000
180
n = 1000
MAX
200
80
MEDIAN
VIO (µV)
VIO (µV)
MEDIAN
100
-200
-220
-20
-120
-220
100
MEDIAN
0
-100
-200
MIN
-320
-420
-40
-20
0
MIN
-300
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 21. VIO SOT-23 PACKAGE vs TEMPERATURE
VS = ±2.5V
-400
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
5
n = 1000
n = 1000
MAX
IBIAS- (nA)
2
1
MEDIAN
0
3
2
1
MEDIAN
MIN
-1
MIN
-2
-3
-40
120
MAX
4
3
100
FIGURE 22. VIO SOT-23 PACKAGE vs TEMPERATURE
VS = ±1.2V
4
IBIAS+ (nA)
MAX
200
180
5
n = 1000
300
MAX
-20
0
20
40
0
60
80
100
120
TEMPERATURE (°C)
FIGURE 23. IBIAS+ vs TEMPERATURE VS = ±2.5V
7
-1
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 24. IBIAS- vs TEMPERATURE VS = ±2.5V
FN6154.6
January 16, 2014
ISL28156
Typical Performance Curves (Continued)
10
2
n = 1000
n = 1000
8
MAX
MAX
6
0
-1
IBIAS- (nA)
IBIAS+ (nA)
1
MEDIAN
-2
MEDIAN
4
2
0
-3
-2
MIN
-4
-40
-20
0
20
40
60
MIN
80
100
-4
-40
120
-20
0
TEMPERATURE (°C)
120
FIGURE 26. IBIAS- vs TEMPERATURE VS = ±1.2V
4
4
n = 1000
0
1
IOS (nA)
0
-1
-2
MEDIAN
-3
-2
MEDIAN
-4
-6
MIN
-4
MIN
-8
-5
-6
-40
-20
0
20
40
60
80
100
-10
120
-40
-20
0
40
60
80
130
135
PSRR (dB)
120
115
MEDIAN
105
100
115
110
100
95
90
90
-40
85
-40
0
MEDIAN
105
95
MIN
-20
MAX
120
110
120
n = 1000
125
MAX
n = 1000
100
FIGURE 28. IOS vs TEMPERATURE VS = ±1.5V
FIGURE 27. IOS vs TEMPERATURE VS = ±2.5V
125
20
TEMPERATURE (°C)
TEMPERATURE (°C)
130
n = 1000
MAX
2
MAX
2
IOS (nA)
100
FIGURE 25. IBIAS+ vs TEMPERATURE VS = ±1.5V
3
CMRR (dB)
20
40
60
80
TEMPERATURE (°C)
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 29. CMRR vs TEMPERATURE V+ = ±2.5V, ±1.5V
8
MIN
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 30. PSRR vs TEMPERATURE ±1.2V to ±2.5V
FN6154.6
January 16, 2014
ISL28156
Typical Performance Curves (Continued)
4.900
4.9984
n = 1000
4.895
4.890
MAX
4.9980
MEDIAN
VOUT (V)
VOUT (V)
4.885
4.880
4.875
4.870
MIN
4.865
4.9978
MEDIAN
4.9976
4.9974
MIN
4.9972
4.860
4.9970
4.855
4.850
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
4.9968
-40
4.9984
MAX
4.9982
-20
0
20
40
60
80
TEMPERATURE (°C)
5.0
n = 1000
VOUT (mV)
MEDIAN
4.9976
4.9974
MAX
4.0
3.5
MEDIAN
MIN
4.9972
3.0
MIN
4.9970
4.9968
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
FIGURE 33. VOUT LOW VS = ±2.5V, RL = 1k
9
120
120
n = 1000
4.5
4.9980
4.9978
100
FIGURE 32. VOUT HIGH VS = ±2.5V, RL = 100k
FIGURE 31. VOUT HIGH vs TEMPERATURE VS = ±2.5V, RL = 1k
VOUT (V)
n = 1000
MAX
4.9982
2.5
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 34. VOUT LOW VS = ±2.5V, RL = 100k
FN6154.6
January 16, 2014
ISL28156
Pin Descriptions
ISL28156
(6 Ld SOT-23)
4
ISL28156
(8 Ld SOIC)
PIN NAME
1, 5
NC
Not connected
2
IN-
Inverting input
FUNCTION
EQUIVALENT CIRCUIT
V+
IN-
IN+
VCircuit 1
3
3
IN+
2
4
V-
1
6
OUT
Non-inverting input
(See Circuit 1)
Negative supply
Output
V+
OUT
VCircuit 2
6
7
V+
5
8
ENABLE
Positive supply
Chip enable
V+
CE
VCircuit 3
10
FN6154.6
January 16, 2014
ISL28156
The loading effects of the feedback resistors of the disabled
amplifier must be considered when multiple amplifier outputs
are connected together.
Applications Information
Introduction
The ISL28156 is a BiMOS rail-to-rail input, output (RRIO)
operational amplifier with an enable feature. The device is
designed to operate from single supply (2.4V to 5.0V) or dual
supplies (±1.2V to ±2.5V) while drawing only 39µA of supply
current. This combination of low power and precision
performance makes this device suitable for a variety of low
power applications including battery powered systems.
Current Limiting
This device has no internal current-limiting circuitry. If the
output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
Power Dissipation
This device features bi-polar inputs, which have an input
common mode range that extends up to 0.5V beyond the V+
rail, and to within 10mV of the V- rail. The CMOS outputs
typically swing to within about 4mV of the supply rails with a
100k load. The NMOS sinks current to swing the output in
the negative direction. The PMOS sources current to swing the
output in the positive direction.
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related using
Equation 1:
Input Protection
T JMAX = T MAX +   JA xPD MAXTOTAL 
Rail-to-Rail Input/Output
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals. For
applications where the input differential voltage is expected to
exceed 0.5V, external series resistors must be used to ensure
the input currents never exceed 5mA (Figure 35).
(EQ. 1)
where:
• PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
PDMAX for each amplifier can be calculated using Equation 2:
V OUTMAX
PD MAX = 2*V S  I SMAX +  V S - V OUTMAX   ---------------------------R
L
(EQ. 2)
VIN
RIN
VOUT
RL
+
FIGURE 35. INPUT CURRENT LIMITING
Enable/Disable Feature
The ISL28156 offers an EN pin that disables the device when
pulled up to at least 2.0V. In the disabled state (output in a
high impedance state), the part consumes typically 10µA. By
disabling the part, multiple ISL28156 parts can be connected
together as a MUX. In this configuration, the outputs are tied
together in parallel and a channel can be selected by the EN
pin. The EN pin also has an internal pull-down. If left open, the
EN pin will pull to the negative rail and the device will be
enabled by default.
where:
• TMAX = Maximum ambient temperature
• JA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
• VS = Supply voltage
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the
application
• RL = Load resistance
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
FN6154.6
January 16, 2014
ISL28156
Package Outline Drawing
P6.064A
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 0, 2/10
1.90
0-3°
0.95
D
0.08-0.20
A
5
6
4
PIN 1
INDEX AREA
2.80
3
1.60
3
0.15 C D
2x
1
(0.60)
3
2
0.20 C
2x
0.40 ±0.05
B
5
SEE DETAIL X
3
0.20 M C A-B
D
TOP VIEW
2.90
5
END VIEW
10° TYP
(2 PLCS)
0.15 C A-B
2x
H
1.14 ±0.15
C
SIDE VIEW
0.10 C
0.05-0.15
1.45 MAX
SEATING PLANE
DETAIL "X"
(0.25) GAUGE
PLANE
0.45±0.1
4
(0.60)
(1.20)
NOTES:
(2.40)
(0.95)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
3.
Dimension is exclusive of mold flash, protrusions or gate burrs.
4.
Foot length is measured at reference to guage plane.
5.
This dimension is measured at Datum “H”.
6.
Package conforms to JEDEC MO-178AA.
(1.90)
TYPICAL RECOMMENDED LAND PATTERN
12
FN6154.6
January 16, 2014
ISL28156
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.10 C
0.175 ± 0.075
SIDE VIEW “A
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
(5.40)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5.
The pin #1 identifier may be either a mold or mark feature.
6.
Reference to JEDEC MS-012.
TYPICAL RECOMMENDED LAND PATTERN
13
FN6154.6
January 16, 2014
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