INTERSIL HGTD3N60A4S

HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Data Sheet
January 2000
File Number
600V, SMPS Series N-Channel IGBT
Features
The HGTD3N60A4S, HGT1S3N60A4S and the
HGTP3N60A4 are MOS gated high voltage switching
devices combining the best features of MOSFETs and
bipolar transistors. These devices have the high input
impedance of a MOSFET and the low on-state conduction
loss of a bipolar transistor. The much lower on-state voltage
drop varies only moderately between 25oC and 150oC.
• >100kHz Operation at 390V, 3A
This IGBT is ideal for many high voltage switching
applications operating at high frequencies where low
conduction losses are essential. This device has been
optimized for high frequency switch mode power
supplies.
• Low Conduction Loss
• 200kHz Operation at 390V, 2.5A
• 600V Switching SOA Capability
• Typical Fall Time. . . . . . . . . . . . . . . . . 70ns at TJ = 125oC
• 12mJ EAS Capability
• Temperature Compensating SABER Model
www.intersil.com
Formerly Developmental Type TA49327.
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Ordering Information
Packaging
PART NUMBER
PACKAGE
JEDEC TO-252AA
BRAND
HGTD3N60A4S
TO-252AA
3N60A4
HGT1S3N60A4S
TO-263AB
3N60A4
4825
COLLECTOR
HGTP3N60A4
TO-220AB
(FLANGE)
G
3N60A4
E
NOTE: When ordering, use the entire part number. Add the suffix 9A
to obtain the TO-252AA or the TO-263AB in tape and reel, i.e.
HGT1S3N60A4S9A
JEDEC TO-263AB
Symbol
COLLECTOR
(FLANGE)
C
G
E
G
JEDEC TO-220AB
E
E
C
G
COLLECTOR
(FLANGE)
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,598,461
4,682,195
4,803,533
4,888,627
4,417,385
4,605,948
4,684,413
4,809,045
4,890,143
4,430,792
4,620,211
4,694,313
4,809,047
4,901,127
1
4,443,931
4,631,564
4,717,679
4,810,665
4,904,609
4,466,176
4,639,754
4,743,952
4,823,176
4,933,740
4,516,143
4,639,762
4,783,690
4,837,606
4,963,951
4,532,534
4,641,162
4,794,432
4,860,080
4,969,027
4,587,713
4,644,637
4,801,986
4,883,767
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES
Collector Current Continuous
At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25
At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ICM
Gate to Emitter Voltage Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM
Switching Safe Operating Area at TJ = 150oC, Figure 2 . . . . . . . . . . . . . . . . . . . . . . . .SSOA
Single Pulse Avalanche Energy at TC = 25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Lead Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TPKG
ALL TYPES
UNITS
600
V
17
8
40
±20
±30
15A at 600V
12mJ at 3A
70
0.56
-55 to 150
A
A
A
V
V
W
W/oC
oC
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. Pulse width limited by maximum junction temperature.
TJ = 25oC, Unless Otherwise Specified
Electrical Specifications
MIN
TYP
MAX
UNITS
Collector to Emitter Breakdown Voltage
PARAMETER
SYMBOL
BVCES
IC = 250µA, VGE = 0V
600
-
-
V
Emitter to Collector Breakdown Voltage
BVECS
IC = 10mA, VGE = 0V
15
-
-
V
-
-
250
µA
-
-
2.0
mA
-
2.0
2.7
V
-
1.6
2.2
V
4.5
6.1
7.0
V
Collector to Emitter Leakage Current
Collector to Emitter Saturation Voltage
Gate to Emitter Threshold Voltage
ICES
VCE(SAT)
VGE(TH)
TEST CONDITIONS
VCE = 600V
IC = 3A,
VGE = 15V
TJ = 25oC
TJ = 125oC
TJ = 25oC
TJ = 125oC
IC = 250µA, VCE = 600V
Gate to Emitter Leakage Current
IGES
VGE = ±20V
-
-
±250
nA
Switching SOA
SSOA
TJ = 150oC, RG = 50Ω, VGE = 15V
L = 200µH, VCE = 600V
15
-
-
A
EAS
ICE = 3A, L = 2.7mH
12
-
-
mJ
VGEP
IC = 3A, VCE = 300V
-
8.8
-
V
VGE = 15V
-
21
25
nC
VGE = 20V
-
26
32
nC
-
6
-
ns
-
11
-
ns
-
73
-
ns
-
47
-
ns
-
37
-
µJ
Pulsed Avalanche Energy
Gate to Emitter Plateau Voltage
On-State Gate Charge
Qg(ON)
Current Turn-On Delay Time
td(ON)I
Current Rise Time
trI
Current Turn-Off Delay Time
td(OFF)I
Current Fall Time
tfI
IC = 3A,
VCE = 300V
IGBT and Diode at TJ = 25oC
ICE = 3A
VCE = 390V
VGE = 15V
RG = 50Ω
L = 1mH
Test Circuit - Figure 20
Turn-On Energy (Note 3)
EON1
Turn-On Energy (Note 3)
EON2
-
55
70
µJ
Turn-Off Energy (Note 2)
EOFF
-
25
35
µJ
2
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
TJ = 25oC, Unless Otherwise Specified (Continued)
Electrical Specifications
PARAMETER
SYMBOL
Current Turn-On Delay Time
TEST CONDITIONS
IGBT and Diode at TJ = 125oC
ICE = 3A
VCE = 390V
VGE = 15V
RG = 50Ω
td(ON)I
Current Rise Time
trI
Current Turn-Off Delay Time
td(OFF)I
Current Fall Time
tfI
L = 1mH
Test Circuit - Figure 20
MIN
TYP
MAX
UNITS
-
5.5
8
ns
-
12
15
ns
-
110
165
ns
-
70
100
ns
-
37
-
µJ
µJ
Turn-On Energy (Note 3)
EON1
Turn-On Energy (Note 3)
EON2
-
90
100
Turn-Off Energy (Note 2)
EOFF
-
50
80
µJ
1.8
oC/W
Thermal Resistance Junction To Case
RθJC
-
-
NOTES:
2. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
3. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2
is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in
Figure 20.
Unless Otherwise Specified
VGE = 15V
16
12
8
4
0
25
50
75
100
125
150
20
TJ = 150oC, RG = 50Ω, VGE = 15V, L = 200µH
16
12
8
4
0
0
TC , CASE TEMPERATURE (oC)
VGE
75oC
15V
fMAX1 = 0.05 / (td(OFF)I + td(ON)I)
fMAX2 = (PD - PC) / (EON2 + EOFF)
PC = CONDUCTION DISSIPATION
(DUTY FACTOR = 50%)
RØJC = 1.8oC/W, SEE NOTES
TJ = 125oC, RG = 50Ω, L = 1mH, V CE = 390V
1
2
3
4
5
ICE, COLLECTOR TO EMITTER CURRENT (A)
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
3
6
tSC , SHORT CIRCUIT WITHSTAND TIME (µs)
fMAX, OPERATING FREQUENCY (kHz)
TC
200
50
300
400
500
600
700
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
300
100
200
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 1. DC COLLECTOR CURRENT vs CASE
TEMPERATURE
600
100
20
64
VCE = 390V, RG = 50Ω, TJ = 125oC
18
56
tSC
48
16
14
40
ISC
12
32
10
24
8
16
6
8
4
10
11
12
13
14
VGE , GATE TO EMITTER VOLTAGE (V)
0
15
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
ISC, PEAK SHORT CIRCUIT CURRENT (A)
ICE , DC COLLECTOR CURRENT (A)
20
ICE, COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
20
DUTY CYCLE < 0.5%, VGE = 12V
PULSE DURATION = 250µs
16
Unless Otherwise Specified (Continued)
TJ = 150oC
TJ = 125oC
12
8
4
TJ = 25oC
0
0
1
2
3
4
5
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
20
DUTY CYCLE < 0.5%, VGE = 15V
PULSE DURATION = 250µs
16
TJ = 125oC
TJ = 150oC
12
8
4
0
TJ = 25oC
0
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
4
140
RG = 50Ω, L = 1mH, VCE = 390V
EOFF, TURN-OFF ENERGY LOSS (µJ)
EON2 , TURN-ON ENERGY LOSS (µJ)
3
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
240
200
TJ = 125oC, VGE = 12V, VGE = 15V
160
120
80
40
TJ = 25oC, VGE = 12V, VGE = 15V
1
2
3
4
5
RG = 50Ω, L = 1mH, VCE = 390V
120
100
60
40
20
0
6
TJ = 125oC, VGE = 12V OR 15V
80
TJ = 25oC, VGE = 12V OR 15V
1
ICE , COLLECTOR TO EMITTER CURRENT (A)
2
3
4
5
6
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
16
32
RG = 50Ω, L = 1mH, VCE = 390V
RG = 50Ω, L = 1mH, VCE = 390V
28
12
trI , RISE TIME (ns)
td(ON)I, TURN-ON DELAY TIME (ns)
2
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
0
1
TJ = 25oC, TJ = 125oC, VGE = 12V
8
TJ = 25oC, TJ = 125oC, VGE = 15V
4
24
TJ = 25oC OR TJ = 125oC, VGE = 12V
20
16
12
8
0
1
2
3
4
5
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
4
6
4
TJ = 25oC OR TJ = 125oC, VGE = 15V
1
2
3
4
5
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
6
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Typical Performance Curves
Unless Otherwise Specified (Continued)
96
VGE = 15V, TJ = 125oC
RG = 50Ω, L = 1mH, VCE = 390V
104
88
VGE = 12V, TJ = 125oC
96
88
VGE = 15V, TJ = 25oC
80
72
VGE = 12V, TJ = 25oC
64
72
64
56
TJ = 25oC, VGE = 12V OR 15V
RG = 50Ω, L = 1mH, VCE = 390V
40
1
2
3
4
5
ICE , COLLECTOR TO EMITTER CURRENT (A)
6
1
16
VGE, GATE TO EMITTER VOLTAGE (V)
DUTY CYCLE < 0.5%, VCE = 10V
PULSE DURATION = 250µs
16
12
TJ = 25oC
4
TJ = 125oC
4
6
TJ = -55oC
8
10
12
10
8
4
2
0
4
8
ICE = 3A
ICE = 1.5A
FIGURE 15. TOTAL SWITCHING LOSS vs CASE
TEMPERATURE
5
150
ETOTAL, TOTAL SWITCHING ENERGY LOSS (µJ)
ETOTAL, TOTAL SWITCHING ENERGY LOSS (µJ)
ICE = 4.5A
150
75
100
125
TC , CASE TEMPERATURE (oC)
12
16
20
24
28
FIGURE 14. GATE CHARGE WAVEFORMS
RG = 50Ω, L = 1mH, VCE = 390V, VGE = 15V
50
VCE = 400V
VCE = 200V
6
QG , GATE CHARGE (nC)
200
0
25
6
VCE = 600V
12
0
14
ETOTAL = EON2 + EOFF
50
5
IG(REF) = 1mA, RL = 100Ω, TJ = 25oC
FIGURE 13. TRANSFER CHARACTERISTIC
100
4
14
VGE, GATE TO EMITTER VOLTAGE (V)
250
3
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER
CURRENT
20
8
2
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
0
TJ = 125oC, VGE = 12V OR 15V
80
48
56
48
ICE, COLLECTOR TO EMITTER CURRENT (A)
tfI , FALL TIME (ns)
td(OFF)I , TURN-OFF DELAY TIME (ns)
112
1000
TJ = 125oC, L = 1mH, VCE = 390V, VGE = 15V
ETOTAL = EON2 + EOFF
ICE = 4.5A
ICE = 3A
100
ICE = 1.5A
30
3
10
100
1000
RG, GATE RESISTANCE (Ω)
FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Unless Otherwise Specified (Continued)
700
FREQUENCY = 1MHz
C, CAPACITANCE (pF)
600
500
400
CIES
300
CRES
200
100
0
COES
0
20
40
60
80
100
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
Typical Performance Curves
2.7
DUTY CYCLE < 0.5%, TJ = 25oC
PULSE DURATION = 250µs,
2.6
2.5
2.4
ICE = 4.5A
2.3
ICE = 3A
2.2
2.1
2.0
ICE = 1.5A
8
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
ZqJC , NORMALIZED THERMAL RESPONSE
10
12
14
16
VGE, GATE TO EMITTER VOLTAGE (V)
FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE
vs GATE TO EMITTER VOLTAGE
100
0.5
0.2
10-1
0.1
t1
0.05
PD
0.02
0.01
10-2
t2
DUTY FACTOR, D = t1 / t2
PEAK TJ = (PD X ZqJC X RqJC) + TC
SINGLE PULSE
10-5
10-4
10-3
10-2
10-1
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 19. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
6
100
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Test Circuit and Waveforms
HGTP3N60A4D
DIODE TA49369
VGE
90%
10%
EON2
EOFF
L = 1mH
ICE
RG = 50Ω
ICE
90%
DUT
VCE
+
-
10%
VDD = 390V
tfI
td(ON)I
trI
td(OFF)I
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 21. SWITCHING TEST WAVEFORMS
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to gateinsulation damage by the electrostatic discharge of energy
through the devices. When handling these devices, care
should be exercised to assure that the static charge built in
the handler’s body capacitance is not discharged through
the device. With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (ICE) plots are possible using
the information shown for a typical unit in Figures 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows fMAX1 or fMAX2; whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD™ LD26” or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate opencircuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup
on the input capacitor due to leakage currents or pickup.
fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. td(OFF)I and td(ON)I are defined in Figure 21.
Device turn-off delay can establish an additional frequency
limiting condition for an application other than TJM.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The
allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device switching and conduction losses must not
exceed PD. A 50% duty factor was used (Figure 3) and the
conduction losses (PC) are approximated by PC = (VCE x
ICE)/2.
EON2 and EOFF are defined in the switching waveforms
shown in Figure 21. EON2 is the integral of the
instantaneous power loss (ICE x VCE) during turn-on and
EOFF is the integral of the instantaneous power loss (ICE x
VCE) during turn-off. All tail losses are included in the
calculation for EOFF; i.e., the collector current equals zero
(ICE = 0).
7. Gate Protection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
7
ECCOSORBD™ is a trademark of Emerson and Cumming, Inc.
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
TO-252AA
SURFACE MOUNT JEDEC TO-252AA PLASTIC PACKAGE
E
H1
A
b2
SYMBOL
A
A1
b
b1
b2
b3
c
D
E
e
e1
H1
J1
L
L1
A1
SEATING
PLANE
D
L2
1
L
3
b1
b
L1
e
c
e1
J1
0.265
(6.7)
TERM. 4
b3
L3
L2
L3
0.265 (6.7)
0.070 (1.8)
0.118 (3.0)
BACK VIEW
0.063 (1.6) TYP
0.090 (2.3) TYP
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
1.5mm
DIA. HOLE
INCHES
MIN
MAX
0.086
0.094
0.018
0.022
0.028
0.032
0.033
0.040
0.205
0.215
0.190
0.018
0.022
0.270
0.290
0.250
0.265
0.090 TYP
0.180 BSC
0.035
0.045
0.040
0.045
0.100
0.115
MILLIMETERS
MIN
MAX
2.19
2.38
0.46
0.55
0.72
0.81
0.84
1.01
5.21
5.46
4.83
0.46
0.55
6.86
7.36
6.35
6.73
2.28 TYP
4.57 BSC
0.89
1.14
1.02
1.14
2.54
2.92
0.020
0.025
0.170
0.51
0.64
4.32
0.040
-
NOTES
4, 5
4, 5
4
4, 5
2
4, 5
7
7
-
1.01
-
4, 6
3
2
NOTES:
1. These dimensions are within allowable dimensions of Rev. B of
JEDEC TO-252AA outline dated 9-88.
2. L3 and b3 dimensions establish a minimum mounting surface for
terminal 4.
3. Solder finish uncontrolled in this area.
4. Dimension (without solder).
5. Add typically 0.002 inches (0.05mm) for solder plating.
6. L1 is the terminal length for soldering.
7. Position of lead to be measured 0.090 inches (2.28mm) from bottom
of dimension D.
8. Controlling dimension: Inch.
9. Revision 9 dated 5-99.
4.0mm
USER DIRECTION OF FEED
2.0mm
TO-252AA
1.75mm
C
L
16mm TAPE AND REEL
16mm
8.0mm
22.4mm
COVER TAPE
13mm
330mm
50mm
GENERAL INFORMATION
1. 2500 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
8
16.4mm
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
TO-263AB
SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE
E
A
A1
H1
TERM. 4
D
L2
L1
L
1
3
b
b1
e
c
J1
e1
0.450
(11.43)
TERM. 4
L3
b2
3
0.350
(8.89)
0.700
(17.78)
0.150
(3.81)
1
0.080 TYP (2.03)
0.062 TYP (1.58)
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
1.5mm
DIA. HOLE
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.170
0.180
4.32
4.57
A1
0.048
0.052
1.22
1.32
4, 5
b
0.030
0.034
0.77
0.86
4, 5
b1
0.045
0.055
1.15
1.39
4, 5
b2
0.310
7.88
2
c
0.018
0.022
0.46
0.55
4, 5
D
0.405
0.425
10.29
10.79
E
0.395
0.405
10.04
10.28
e
0.100 TYP
2.54 TYP
7
e1
0.200 BSC
5.08 BSC
7
H1
0.045
0.055
1.15
1.39
J1
0.095
0.105
2.42
2.66
L
0.175
0.195
4.45
4.95
L1
0.090
0.110
2.29
2.79
4, 6
L2
0.050
0.070
1.27
1.77
3
L3
0.315
8.01
2
NOTES:
1. These dimensions are within allowable dimensions of Rev. C of
JEDEC TO-263AB outline dated 2-92.
2. L3 and b2 dimensions established a minimum mounting surface
for terminal 4.
3. Solder finish uncontrolled in this area.
4. Dimension (without solder).
5. Add typically 0.002 inches (0.05mm) for solder plating.
6. L1 is the terminal length for soldering.
7. Position of lead to be measured 0.120 inches (3.05mm) from bottom
of dimension D.
8. Controlling dimension: Inch.
9. Revision 10 dated 5-99.
4.0mm
USER DIRECTION OF FEED
2.0mm
TO-263AB
1.75mm
C
L
24mm TAPE AND REEL
24mm
16mm
COVER TAPE
40mm MIN.
ACCESS HOLE
30.4mm
13mm
330mm
100mm
GENERAL INFORMATION
1. 800 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
9
24.4mm
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
TO-220AB
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
A
INCHES
E
ØP
A1
Q
H1
TERM. 4
D
45o
E1
D1
L1
b1
L
b
c
MIN
MAX
MIN
MAX
NOTES
A
0.170
0.180
4.32
4.57
-
A1
0.048
0.052
1.22
1.32
-
b
0.030
0.034
0.77
0.86
3, 4
b1
0.045
0.055
1.15
1.39
2, 3
c
0.014
0.019
0.36
0.48
2, 3, 4
D
0.590
0.610
14.99
15.49
-
4.06
-
10.41
-
D1
-
0.160
E
0.395
0.410
E1
-
0.030
e
60o
1
2
e1
3
e
J1
e1
MILLIMETERS
SYMBOL
H1
0.100 TYP
0.200 BSC
0.235
0.255
10.04
-
0.76
-
2.54 TYP
5
5.08 BSC
5
5.97
6.47
-
J1
0.100
0.110
2.54
2.79
6
L
0.530
0.550
13.47
13.97
-
L1
0.130
0.150
3.31
3.81
2
ØP
0.149
0.153
3.79
3.88
-
Q
0.102
0.112
2.60
2.84
-
NOTES:
1. These dimensions are within allowable dimensions of Rev. J of
JEDEC TO-220AB outline dated 3-24-87.
2. Lead dimension and finish uncontrolled in L1.
3. Lead dimension (without solder).
4. Add typically 0.002 inches (0.05mm) for solder coating.
5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D.
6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D.
7. Controlling dimension: Inch.
8. Revision 2 dated 7-97.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
10
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029